CN116705948A - LED epitaxial wafer, preparation method thereof and LED chip - Google Patents

LED epitaxial wafer, preparation method thereof and LED chip Download PDF

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Publication number
CN116705948A
CN116705948A CN202310988223.2A CN202310988223A CN116705948A CN 116705948 A CN116705948 A CN 116705948A CN 202310988223 A CN202310988223 A CN 202310988223A CN 116705948 A CN116705948 A CN 116705948A
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layer
sub
doped gan
epitaxial wafer
aln
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CN116705948B (en
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刘春杨
吕蒙普
胡加辉
金从龙
顾伟
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Jiangxi Zhao Chi Semiconductor Co Ltd
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Jiangxi Zhao Chi Semiconductor Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

The invention discloses an LED epitaxial wafer, a preparation method thereof and an LED chip, and relates to the technical field of semiconductor devices; the epitaxial layer further comprises a capacitance layer, wherein the capacitance layer is arranged between the electron blocking layer and the P-type doped GaN layer, and the capacitance layer is a composite layer formed by mutually laminating a first AlN sub-layer, a P-type doped GaN sub-layer and a second AlN sub-layer. In the invention, the capacitance layer is manufactured between the electron blocking layer and the P-type doped GaN layer, so that electrons can be well locked in the capacitance layer in the process of moving towards the P layer under the condition of high current, and the capacity of storing charges of the chip is improved, thereby improving the antistatic capacity, namely the limit ESD capacity.

Description

LED epitaxial wafer, preparation method thereof and LED chip
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to an LED epitaxial wafer, a preparation method thereof and an LED chip.
Background
The LED chip is a semiconductor electronic element capable of emitting light, has the characteristics of small volume, high brightness, low energy consumption and the like, and is widely applied to the fields of illumination and the like. The LED chip is obtained by splitting an LED epitaxial wafer, and the LED epitaxial wafer comprises a substrate and a GaN epitaxial layer growing on the substrate.
At present, sapphire, silicon or silicon carbide and other materials are often used as a substrate, and as the use environment and working conditions of end application are more and more severe, the requirements on the device are more and more high, especially in the aspect of reliability, so that the antistatic capability (ESD) of the LED chip is more and more high.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims to provide an LED epitaxial wafer, a preparation method thereof and an LED chip, and aims to improve the limit ESD capacity of the LED chip by improving the LED epitaxial wafer.
The first aspect of the invention provides an LED epitaxial wafer, which comprises a substrate and an epitaxial layer stacked on the substrate, wherein the epitaxial layer comprises an electron blocking layer and a P-type doped GaN layer;
the epitaxial layer further comprises a capacitance layer, wherein the capacitance layer is arranged between the electron blocking layer and the P-type doped GaN layer, and the capacitance layer is a composite layer formed by mutually laminating a first AlN sub-layer, a P-type doped GaN sub-layer and a second AlN sub-layer.
According to an aspect of the above technical solution, the first AlN sub-layer is in contact with the electron blocking layer, the second AlN sub-layer is in contact with the P-type doped GaN layer, and the P-type doped GaN sub-layer is disposed between the first AlN sub-layer and the second AlN sub-layer.
According to an aspect of the above technical solution, the thicknesses of the first AlN sub-layer and the second AlN sub-layer are both 2nm-6nm, and the thickness of the P-type doped GaN sub-layer is 10nm-25nm.
According to an aspect of the above technical solution, the P-type doped GaN sub-layer is doped with Mg element, and the Mg element is dopedDegree of 1x10 17 atoms/cm 3 -1x10 18 atoms/cm 3 。
According to an aspect of the foregoing technical solution, the epitaxial layer further includes:
an AlN layer, a buffer layer, a three-dimensional GaN layer, an undoped GaN layer, an N-doped GaN layer, a stress release layer and a multi-quantum well layer which are sequentially laminated on the substrate;
the electron blocking layer, the capacitance layer and the P-type doped GaN layer are sequentially laminated on the multiple quantum well layer.
According to an aspect of the above technical solution, the electron blocking layer is a periodic structure in which AlGaN sublayers and GaN sublayers alternately grow.
According to an aspect of the above technical solution, the thickness of the electron blocking layer is 10nm-60nm, and the thickness of the P-type doped GaN layer is 5nm-100nm.
The second aspect of the present invention provides a method for preparing an LED epitaxial wafer, where the method is used to prepare the LED epitaxial wafer in the above technical solution, and the method includes:
providing a substrate;
manufacturing an epitaxial layer on the substrate; wherein the epitaxial layer comprises an electron blocking layer;
manufacturing a capacitance layer on the electron blocking layer;
manufacturing a P-type doped GaN layer on the capacitor layer;
the capacitor layer is a composite layer formed by stacking a first AlN sub-layer, a P-type doped GaN sub-layer and a second AlN sub-layer.
According to an aspect of the foregoing technical solution, the step of fabricating a capacitor layer over the electron blocking layer includes:
controlling the growth temperature in the reaction chamber to be 900-1000 ℃ and the growth pressure to be 100-300 torr;
introducing N into the reaction chamber 2 With NH 3 ，N 2 As carrier gas, NH 3 As a reaction gas;
introducing TMAL into the reaction chamber to serve as an MO source, and growing to obtain a first AlN sub-layer;
introducing TEGa into the reaction chamber to be taken together with TMAL as MO source, and introducing Cp 2 Mg is used as a doping source, and a P-type doped GaN sub-layer is obtained through growth;
stopping introducing TEGa and Cp into the reaction chamber 2 And Mg, growing to obtain a second AlN sub-layer.
The third aspect of the present invention provides an LED chip, where the LED chip includes the LED epitaxial wafer described in the above technical solution.
Compared with the prior art, the LED epitaxial wafer, the preparation method thereof and the LED chip have the beneficial effects that:
by manufacturing the capacitance layer between the electron blocking layer and the P-type doped GaN layer, electrons can be well locked in the capacitance layer in the process of moving towards the P layer under the condition of high current, and the capacitance layer can be understood as a miniature parallel plate capacitor, so that the capacity of the chip for storing charges is improved, and the antistatic capacity (ESD) is improved.
Drawings
The foregoing and/or additional aspects and advantages of the invention will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:
fig. 1 is a schematic structural diagram of an LED epitaxial wafer according to an embodiment of the present invention;
fig. 2 is a schematic view of a portion of an LED epitaxial wafer according to an embodiment of the present invention;
fig. 3 is a flow chart of a method for manufacturing an LED epitaxial wafer according to an embodiment of the present invention;
description of the drawings:
substrate 1, alN layer 2, buffer layer 3, three-dimensional GaN layer 4, undoped GaN layer 5, N type doped GaN layer 6, stress relief layer 7, multiple quantum well layer 8, electron blocking layer 9, P type doped GaN layer 10, capacitance layer 11, first AlN sublayer 111, P type doped GaN sublayer 112, second AlN sublayer 113.
Detailed Description
In order to make the objects, features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below. Several embodiments of the invention are presented in the figures. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "mounted" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
The first aspect of the invention provides an LED epitaxial wafer, which comprises a substrate and an epitaxial layer stacked on the substrate, wherein the epitaxial layer comprises an electron blocking layer and a P-type doped GaN layer;
the epitaxial layer further comprises a capacitance layer, wherein the capacitance layer is arranged between the electron blocking layer and the P-type doped GaN layer, and the capacitance layer is a composite layer formed by mutually laminating a first AlN sub-layer, a P-type doped GaN sub-layer and a second AlN sub-layer.
Further, the epitaxial layer comprises an AlN layer, a buffer layer, a three-dimensional GaN layer, an undoped GaN layer, an N-type doped GaN layer, a stress release layer, a multiple quantum well layer, an electron blocking layer and a P-type doped GaN layer which are sequentially stacked on the substrate.
Wherein the AlN layer may have a thickness of 10nm-30nm, which layer is grown in a PVD apparatus.
Wherein the thickness of the buffer layer can be 15nm-35nm, mainly the GaN layer which grows, and the buffer layer grows in MOCVD equipment.
Wherein the thickness of the three-dimensional GaN layer may be 500nm to 2000nm.
Wherein the thickness of the undoped GaN layer may be 800nm to 1200nm.
The thickness of the N-type doped GaN layer can be 1000nm-3000nm, and the layer provides electrons.
The stress release layer may be a periodic structure in which InGaN layers and GaN layers are alternately grown.
The multi-quantum well layer can be a periodic structure in which InGaN layers and GaN layers alternately grow; the thickness of the InGaN layer can be 2nm-4nm, the thickness of the GaN layer can be 8nm-12nm, and the period number is 6-14 in each period.
The electron blocking layer can be a periodic structure in which AlGaN layers and GaN layers alternately grow, and the thickness can be 10nm-60nm.
Wherein the thickness of the P-doped GaN layer may be 5nm-100nm, which layer provides holes.
Further, the first AlN sub-layer is in contact with the electron blocking layer, the second AlN sub-layer is in contact with the P-type doped GaN layer, and the P-type doped GaN sub-layer is arranged between the first AlN sub-layer and the second AlN sub-layer.
Further, the thicknesses of the first AlN sub-layer and the second AlN sub-layer are 2nm-6nm, and the thickness of the P-type doped GaN sub-layer is 10nm-25nm.
Further, the P-type doped GaN sub-layer is doped with Mg element, and the doping solubility of the Mg element is 1x10 17 atoms/cm 3 -1x10 18 atoms/cm 3 。
Further, the epitaxial layer further includes:
an AlN layer, a buffer layer, a three-dimensional GaN layer, an undoped GaN layer, an N-doped GaN layer, a stress release layer and a multi-quantum well layer which are sequentially laminated on the substrate;
the electron blocking layer, the capacitance layer and the P-type doped GaN layer are sequentially laminated on the multiple quantum well layer.
Further, the electron blocking layer is a periodic structure in which AlGaN sublayers and GaN sublayers alternately grow.
Further, the thickness of the electron blocking layer is 10nm-60nm, and the thickness of the P-type doped GaN layer is 5nm-100nm.
The second aspect of the present invention provides a method for preparing an LED epitaxial wafer, where the method is used to prepare the LED epitaxial wafer in the above technical solution, and the method includes:
providing a substrate;
manufacturing an epitaxial layer on the substrate; wherein the epitaxial layer comprises an electron blocking layer;
manufacturing a capacitance layer on the electron blocking layer;
manufacturing a P-type doped GaN layer on the capacitor layer;
the capacitor layer is a composite layer formed by stacking a first AlN sub-layer, a P-type doped GaN sub-layer and a second AlN sub-layer.
Further, the step of fabricating a capacitive layer over the electron blocking layer includes:
controlling the growth temperature in the reaction chamber to be 900-1000 ℃ and the growth pressure to be 100-300 torr;
introducing N into the reaction chamber 2 With NH 3 ，N 2 As carrier gas, NH 3 As a reaction gas;
introducing TMAL into the reaction chamber to serve as an MO source, and growing to obtain a first AlN sub-layer;
introducing TEGa into the reaction chamber to be taken together with TMAL as MO source, and introducing Cp 2 Mg is used as a doping source, and a P-type doped GaN sub-layer is obtained through growth;
stopping introducing TEGa and Cp into the reaction chamber 2 And Mg, growing to obtain a second AlN sub-layer.
The third aspect of the present invention provides an LED chip, where the LED chip includes the LED epitaxial wafer described in the above technical solution.
Compared with the prior art, the LED epitaxial wafer, the preparation method thereof and the LED chip have the beneficial effects that:
by manufacturing the capacitance layer between the electron blocking layer and the P-type doped GaN layer, electrons can be well locked in the capacitance layer in the process of moving towards the P layer under the condition of high current, and the capacitance layer can be understood as a miniature parallel plate capacitor, so that the capacity of the chip for storing charges is improved, and the antistatic capacity (ESD) is improved.
Example 1
A first embodiment of the present invention provides an LED epitaxial wafer, where the LED epitaxial wafer shown in this embodiment includes:
a substrate 1, and an epitaxial layer stacked on the substrate 1.
In this embodiment, the epitaxial layer includes an AlN layer 2, a buffer layer 3, a three-dimensional GaN layer 4, an undoped GaN layer 5, an N-type doped GaN layer 6, a stress release layer 7, a multiple quantum well layer 8, an electron blocking layer 9, and a P-type doped GaN layer 10, which are sequentially stacked on a substrate 1.
Wherein the substrate 1 is a sapphire substrate, i.e. Al 2 O 3 A substrate.
Wherein the AlN layer 2 has a thickness of 20nm, which layer is grown in a PVD apparatus.
Wherein the thickness of the buffer layer 3 is 25nm, mainly a grown GaN layer, and from the buffer layer 3, all functional layers of the LED epitaxial wafer are grown in MOCVD equipment.
Wherein the thickness of the three-dimensional GaN layer 4 is 1500nm.
Wherein the thickness of the undoped GaN layer 5 is 1000nm.
The thickness of the N-doped GaN layer 6 is 2000nm, which provides electrons.
The stress release layer 7 is a periodic structure in which InGaN layers and GaN layers are alternately grown.
The same as the stress release layer 7, the multiple quantum well layer 8 is also a periodic structure in which InGaN layers and GaN layers alternately grow; in each cycle of the multiple quantum well layer 8, the thickness of the InGaN layer was 3nm, the thickness of the gan layer was 10nm, and the number of cycles of the multiple quantum well layer 8 was 10 cycles.
The electron blocking layer 9 is a periodic structure in which AlGaN layers and GaN layers alternately grow, and the thickness of the electron blocking layer 9 is 50nm.
Wherein the thickness of the P-doped GaN layer 10 is 50nm, which layer provides holes; after the LED epitaxial wafer is fabricated into an LED chip, when the LED chip is powered on, electrons provided by the N-type doped GaN layer 6 and holes provided by the P-type doped GaN layer 10 meet in the multiple quantum well layer 8, and non-radiative recombination occurs, so that bright light is emitted.
In the process of using the LED chip, under the condition of instantly generating high voltage, electrons can obtain enough electric energy to be punched to the P layer and be combined with holes to generate a large amount of heat energy, so that the LED chip is burnt.
In order to improve the antistatic capability, i.e., the ESD capability, of the LED chip, in this embodiment, a capacitance layer 11 is disposed between the electron blocking layer 9 and the P-type doped GaN layer 10, and the capacitance layer 11 is used for blocking electrons released by the N-type doped GaN layer 6 in the process of moving to the P-layer, so that electrons are prevented from flowing into the P-layer under a high current condition, and the capability of storing charges of the LED chip can be effectively improved, thereby improving the ESD capability.
In this embodiment, in order to perform the function of blocking electrons, the capacitor layer 11 is a composite layer formed by compositing a plurality of functional layers, and the capacitor layer 11 includes a first AlN sub-layer 111, a P-doped GaN sub-layer 112, and a second AlN sub-layer 113.
Specifically, the first AlN sub-layer 111 is in contact with the electron blocking layer 9, the second AlN sub-layer 113 is in contact with the P-type doped GaN layer 10, and the P-type doped GaN sub-layer 112 is provided between the first AlN sub-layer 111 and the second AlN sub-layer 113. Namely, the capacitance layer 11 includes three sub-layers sequentially laminated between the electron blocking layer 9 and the P-type doped GaN layer 10.
In the present embodiment, the thicknesses of the first AlN sub-layer 111 and the second AlN sub-layer 113 are 2nm, and the thickness of the P-doped GaN sub-layer 112 is 10nm.
It should be noted that Mg element is doped in the P-type doped GaN sublayer 112, and the doping concentration of Mg element in the P-type doped GaN sublayer 112 is 1×10 17 atoms/cm 3 。
Referring to fig. 3, in the present embodiment, the method for manufacturing the LED epitaxial wafer includes steps S11-S14:
in step S11, a substrate is provided.
Step S12, manufacturing an epitaxial layer on the substrate; wherein the epitaxial layer comprises an electron blocking layer.
Step S13, a capacitance layer is manufactured on the electron blocking layer.
In this embodiment, the step of fabricating the capacitor layer over the electron blocking layer includes:
controlling the growth temperature in the reaction chamber to 950 ℃ and the growth pressure to 200torr;
introducing N into the reaction chamber 2 With NH 3 ，N 2 As carrier gas, NH 3 As a reaction gas;
introducing TMAL into the reaction chamber to serve as an MO source, and growing to obtain a first AlN sub-layer;
introducing TEGa into the reaction chamber to be taken together with TMAL as MO source, and introducing Cp 2 Mg is used as a doping source, and a P-type doped GaN sub-layer is obtained through growth;
stopping introducing TEGa and Cp into the reaction chamber 2 And Mg, growing to obtain a second AlN sub-layer.
Step S14, a P-type doped GaN layer is manufactured on the capacitor layer.
The capacitor layer 11 is a composite layer formed by stacking a first AlN sub-layer 111, a P-doped GaN sub-layer 112, and a second AlN sub-layer 113.
Specifically, the step of fabricating an epitaxial layer on the substrate 1 includes:
an AlN layer, a buffer layer, a three-dimensional GaN layer, an undoped GaN layer, an N-type doped GaN layer, a stress release layer, a multiple quantum well layer and an electron blocking layer are sequentially manufactured on the substrate.
And after the electron blocking layer is manufactured, continuously manufacturing a capacitor layer on the electron blocking layer, and manufacturing a P-type doped GaN layer on the capacitor layer, thereby obtaining the complete LED epitaxial wafer.
After the LED epitaxial wafer is manufactured, manufacturing a chip of the LED epitaxial wafer to obtain an LED chip, controlling the size of the chip to be 22 mils and 35 mils, and testing the antistatic capacity (ESD) of the LED chip by two modes of a Human Body Mode (HBM) and a Mechanical Mode (MM);
through testing, under the Human Body Mode (HBM) test, under the test conditions of 6000V, 8000V and 10000V, the ESD capacity of the LED chip is 98.6%, 88.7% and 65.8% respectively; under Mechanical Mode (MM) test, the ESD capability of the LED chip under 500V, 600V, 700V and 800V test conditions was 95.8%, 65.5%, 52.2% and 23.5%, respectively.
In summary, in the LED epitaxial wafer shown in this embodiment, by manufacturing the capacitor layer 11 between the electron blocking layer 9 and the P-doped GaN layer 10, under a high current condition, electrons can be better locked in the capacitor layer 11 in the process of moving towards the P-doped GaN layer, and the capacitor layer 11 can be understood as a miniature parallel plate capacitor, so that the capability of storing charges of the chip itself is improved, and the antistatic capability (ESD) is improved.
Example two
A second embodiment of the present invention provides an LED epitaxial wafer, which has a structure substantially similar to that of the LED epitaxial wafer shown in the first embodiment, except that:
in the present embodiment, the doping concentration of Mg element in the P-doped GaN sublayer 112 of the capacitor layer 11 is 5×10 17 atoms/cm 3 The Mg doping concentration in the P-type doped GaN sub-layer 112 is higher than that in the first embodiment.
After the LED epitaxial wafer is manufactured, manufacturing a chip of the LED epitaxial wafer to obtain an LED chip, controlling the size of the chip to be 22 mils and 35 mils, and testing the antistatic capacity (ESD) of the LED chip by two modes of a Human Body Mode (HBM) and a Mechanical Mode (MM);
through testing, under the Human Body Mode (HBM) test, under the test conditions of 6000V, 8000V and 10000V, the ESD capacity of the LED chip is 98.5%, 87.6% and 66.1% respectively; under Mechanical Mode (MM) test, the ESD capability of the LED chip under 500V, 600V, 700V and 800V test conditions was 96.1%, 66.1%, 53.5% and 22.9%, respectively.
Example III
A third embodiment of the present invention provides an LED epitaxial wafer, which has a structure substantially similar to that of the LED epitaxial wafer shown in the first embodiment, and is different from that of the first embodiment in that:
in the present embodiment, the doping concentration of Mg element in the P-doped GaN sublayer 112 of the capacitor layer 11 is 1×10 18 atoms/cm 3 The Mg doping concentration in the P-type doped GaN sub-layer 112 is higher than that in the first embodiment.
After the LED epitaxial wafer is manufactured, manufacturing a chip of the LED epitaxial wafer to obtain an LED chip, controlling the size of the chip to be 22 mils and 35 mils, and testing the antistatic capacity (ESD) of the LED chip by two modes of a Human Body Mode (HBM) and a Mechanical Mode (MM);
through testing, under the Human Body Mode (HBM) test, under the test conditions of 6000V, 8000V and 10000V, the ESD capacity of the LED chip is 98.7%, 88.5% and 65.6% respectively; under Mechanical Mode (MM) test, the ESD capability of the LED chip under 500V, 600V, 700V and 800V test conditions was 95.9%, 65.8%, 52.8% and 22.4%, respectively.
Example IV
A fourth embodiment of the present invention provides an LED epitaxial wafer, which is substantially similar to the LED epitaxial wafer shown in the first embodiment in structure, except that:
in the present embodiment, the thicknesses of the first AlN sub-layer 111 and the second AlN sub-layer 113 of the capacitor layer 11 are 4nm, and compared with the first embodiment, the thicknesses of the first AlN sub-layer 111 and the second AlN sub-layer 113 are 2 times, and the Mg doping concentration of the P-type doped GaN sub-layer 112 is unchanged.
After the LED epitaxial wafer is manufactured, manufacturing a chip of the LED epitaxial wafer to obtain an LED chip, controlling the size of the chip to be 22 mils and 35 mils, and testing the antistatic capacity (ESD) of the LED chip by two modes of a Human Body Mode (HBM) and a Mechanical Mode (MM);
through testing, under the Human Body Mode (HBM) test, under the test conditions of 6000V, 8000V and 10000V, the ESD capacity of the LED chip is 98.4%, 88.1% and 64.9% respectively; under Mechanical Mode (MM) test, the ESD capability of the LED chip under 500V, 600V, 700V and 800V test conditions was 96.2%, 66.5%, 53.2% and 24.1%, respectively.
Example five
A fifth embodiment of the present invention provides an LED epitaxial wafer, which is substantially similar to the LED epitaxial wafer shown in the first embodiment in structure, except that:
in the present embodiment, the thicknesses of the first AlN sub-layer 111 and the second AlN sub-layer 113 of the capacitor layer 11 are 6nm, and compared with the first embodiment, the thicknesses of the first AlN sub-layer 111 and the second AlN sub-layer 113 are 3 times, and the Mg doping concentration of the P-type doped GaN sub-layer 112 is unchanged.
After the LED epitaxial wafer is manufactured, manufacturing a chip of the LED epitaxial wafer to obtain an LED chip, controlling the size of the chip to be 22 mils and 35 mils, and testing the antistatic capacity (ESD) of the LED chip by two modes of a Human Body Mode (HBM) and a Mechanical Mode (MM);
through testing, under the Human Body Mode (HBM) test, under the test conditions of 6000V, 8000V and 10000V, the ESD capacity of the LED chip is 98.5%, 88.3% and 65.5% respectively; under Mechanical Mode (MM) test, the ESD capability of the LED chip under 500V, 600V, 700V and 800V test conditions was 95.8%, 66.4%, 52.9% and 23.8%, respectively.
Example six
A sixth embodiment of the present invention provides an LED epitaxial wafer, which is substantially similar to the LED epitaxial wafer shown in the first embodiment in structure, except that:
in the present embodiment, the thickness of the P-doped GaN sublayer 112 of the capacitor layer 11 is 15nm, which is 1.5 times as thick as the thickness of the P-doped GaN sublayer 112 in comparison with the first embodiment, but the Mg doping concentration in the P-doped GaN sublayer 112 is unchanged.
After the LED epitaxial wafer is manufactured, manufacturing a chip of the LED epitaxial wafer to obtain an LED chip, controlling the size of the chip to be 22 mils and 35 mils, and testing the antistatic capacity (ESD) of the LED chip by two modes of a Human Body Mode (HBM) and a Mechanical Mode (MM);
through testing, under the Human Body Mode (HBM) test, under the test conditions of 6000V, 8000V and 10000V, the ESD capacity of the LED chip is 99.1%, 94.6% and 88.9% respectively; under Mechanical Mode (MM) test, the ESD capability of the LED chip under 500V, 600V, 700V and 800V test conditions was 96.9%, 85.8%, 90.3% and 89.9%, respectively.
Example seven
A seventh embodiment of the present invention provides an LED epitaxial wafer, which has a structure substantially similar to that of the LED epitaxial wafer shown in the first embodiment, except that:
in the present embodiment, the thickness of the P-doped GaN sublayer 112 of the capacitor layer 11 is 20nm, and compared with the first embodiment, the thickness of the P-doped GaN sublayer 112 is 2 times, but the Mg doping concentration in the P-doped GaN sublayer 112 is unchanged.
After the LED epitaxial wafer is manufactured, manufacturing a chip of the LED epitaxial wafer to obtain an LED chip, controlling the size of the chip to be 22 mils and 35 mils, and testing the antistatic capacity (ESD) of the LED chip by two modes of a Human Body Mode (HBM) and a Mechanical Mode (MM);
through testing, under the Human Body Mode (HBM) test, under the test conditions of 6000V, 8000V and 10000V, the ESD capacity of the LED chip is 99.5%, 96.5% and 93.8% respectively; under Mechanical Mode (MM) test, the ESD capability of the LED chip under 500V, 600V, 700V and 800V test conditions was 98.8%, 94.6%, 93.8% and 92.7%, respectively.
Example eight
A seventh embodiment of the present invention provides an LED epitaxial wafer, which has a structure substantially similar to that of the LED epitaxial wafer shown in the first embodiment, except that:
in the present embodiment, the thickness of the P-doped GaN sublayer 112 of the capacitor layer 11 is 25nm, which is 2.5 times as thick as the thickness of the P-doped GaN sublayer 112 in comparison with the first embodiment, but the Mg doping concentration in the P-doped GaN sublayer 112 is unchanged.
After the LED epitaxial wafer is manufactured, manufacturing a chip of the LED epitaxial wafer to obtain an LED chip, controlling the size of the chip to be 22 mils and 35 mils, and testing the antistatic capacity (ESD) of the LED chip by two modes of a Human Body Mode (HBM) and a Mechanical Mode (MM);
through testing, under the Human Body Mode (HBM) test, under the test conditions of 6000V, 8000V and 10000V, the ESD capacity of the LED chip is 99.9%, 99.8% and 98.9% respectively; under Mechanical Mode (MM) test, the ESD capability of the LED chip under 500V, 600V, 700V and 800V test conditions was 99.5%, 98.8%, 97.9% and 96.8%, respectively.
Comparative example one
The first comparative example of the present invention also provides an LED epitaxial wafer according to the preparation method shown in the first embodiment, the LED epitaxial wafer shown in the first comparative example is substantially similar to the LED epitaxial wafer shown in the first embodiment in structure, except that:
in the first comparative example, the thickness of the P-doped GaN sublayer 112 of the capacitor layer 11 was 30nm, which is 3 times as thick as the P-doped GaN sublayer 112 in comparison with the first example, but the Mg doping concentration in the P-doped GaN sublayer 112 was unchanged.
After the LED epitaxial wafer is manufactured, manufacturing a chip of the LED epitaxial wafer to obtain an LED chip, controlling the size of the chip to be 22 mils and 35 mils, and testing the antistatic capacity (ESD) of the LED chip by two modes of a Human Body Mode (HBM) and a Mechanical Mode (MM);
through testing, under the Human Body Mode (HBM) test, under the test conditions of 6000V, 8000V and 10000V, the ESD capacity of the LED chip is 99.8%, 99.9% and 99.1% respectively; under Mechanical Mode (MM) test, the ESD capability of the LED chip under 500V, 600V, 700V and 800V test conditions was 99.6%, 99.1%, 98.0% and 97.0%, respectively.
Comparative example two
The second comparative example of the present invention also provides an LED epitaxial wafer according to the preparation method shown in the first embodiment, the LED epitaxial wafer shown in the first comparative example is substantially similar to the LED epitaxial wafer shown in the first embodiment in structure, except that:
in the second comparative example, the thickness of the P-doped GaN sublayer 112 of the capacitor layer 11 was 35nm, which is 3.5 times as thick as the thickness of the P-doped GaN sublayer 112 in comparison with the first embodiment, but the Mg doping concentration in the P-doped GaN sublayer 112 was unchanged.
After the LED epitaxial wafer is manufactured, manufacturing a chip of the LED epitaxial wafer to obtain an LED chip, controlling the size of the chip to be 22 mils and 35 mils, and testing the antistatic capacity (ESD) of the LED chip by two modes of a Human Body Mode (HBM) and a Mechanical Mode (MM);
through testing, under the Human Body Mode (HBM) test, under the test conditions of 6000V, 8000V and 10000V, the ESD capacity of the LED chip is 99.9%, 99.8% and 98.9% respectively; under Mechanical Mode (MM) test, the ESD capability of the LED chip under 500V, 600V, 700V and 800V test conditions was 99.6%, 99.0%, 98.1% and 96.9%, respectively.
Table 1 is a table of comparison of epitaxial wafer fabrication parameters for various examples of the present invention and comparative examples.
TABLE 1
According to the first to eighth embodiments and the first and second comparative examples, it is found through experiments that the antistatic ability (ESD) is significantly improved after the capacitor layer 11 is introduced, wherein the thicknesses of the first AlN sub-layer 111 and the second AlN sub-layer 113 and the Mg doping concentration in the P-type doped GaN sub-layer 112 have little effect on the improvement of the antistatic ability, and the thickness of the P-type doped GaN sub-layer 112 has a larger effect on the improvement of the antistatic ability, and the antistatic ability of the LED chip reaches a peak value when the thickness of the P-type doped GaN sub-layer 112 is increased to 25nm.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing examples illustrate only a few embodiments of the invention, and are described in detail, but are not to be construed as limiting the scope of the invention. It should be noted that it is possible for those skilled in the art to make several variations and modifications without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.

Claims (10)

1. The LED epitaxial wafer is characterized by comprising a substrate and an epitaxial layer which is laminated on the substrate, wherein the epitaxial layer comprises an electron blocking layer and a P-type doped GaN layer;
the epitaxial layer further comprises a capacitance layer, wherein the capacitance layer is arranged between the electron blocking layer and the P-type doped GaN layer, and the capacitance layer is a composite layer formed by mutually laminating a first AlN sub-layer, a P-type doped GaN sub-layer and a second AlN sub-layer.
2. The LED epitaxial wafer of claim 1, wherein the first AlN sub-layer is in contact with the electron blocking layer, the second AlN sub-layer is in contact with the P-doped GaN layer, and the P-doped GaN sub-layer is disposed between the first AlN sub-layer and the second AlN sub-layer.
3. The LED epitaxial wafer of claim 1, wherein the first AlN sub-layer and the second AlN sub-layer each have a thickness of 2nm-6nm, and the P-doped GaN sub-layer has a thickness of 10nm-25nm.
4. The LED epitaxial wafer of claim 1, wherein the P-doped GaN sub-layer is doped with Mg element having a doping solubility of 1x10 17 atoms/cm 3 -1x10 18 atoms/cm 3 。
5. The LED epitaxial wafer of any one of claims 1-4, wherein the epitaxial layer further comprises:
an AlN layer, a buffer layer, a three-dimensional GaN layer, an undoped GaN layer, an N-doped GaN layer, a stress release layer and a multi-quantum well layer which are sequentially laminated on the substrate;
the electron blocking layer, the capacitance layer and the P-type doped GaN layer are sequentially laminated on the multiple quantum well layer.
6. The LED epitaxial wafer of claim 5, wherein the electron blocking layer is a periodic structure in which AlGaN sublayers and GaN sublayers are alternately grown.
7. The LED epitaxial wafer of claim 6, wherein the electron blocking layer has a thickness of 10nm to 60nm and the P-doped GaN layer has a thickness of 5nm to 100nm.
8. A method for preparing an LED epitaxial wafer, wherein the method is used for preparing the LED epitaxial wafer according to any one of claims 1 to 7, and the method comprises:
providing a substrate;
manufacturing an epitaxial layer on the substrate; wherein the epitaxial layer comprises an electron blocking layer;
manufacturing a capacitance layer on the electron blocking layer;
manufacturing a P-type doped GaN layer on the capacitor layer;
the capacitor layer is a composite layer formed by stacking a first AlN sub-layer, a P-type doped GaN sub-layer and a second AlN sub-layer.
9. The method of manufacturing an LED epitaxial wafer of claim 8, wherein the step of fabricating a capacitive layer over the electron blocking layer comprises:
controlling the growth temperature in the reaction chamber to be 900-1000 ℃ and the growth pressure to be 100-300 torr;
introducing N into the reaction chamber 2 With NH 3 ，N 2 As carrier gas, NH 3 As a reaction gas;
introducing TMAL into the reaction chamber to serve as an MO source, and growing to obtain a first AlN sub-layer;
introducing TEGa into the reaction chamber to be taken together with TMAL as MO source, and introducing Cp 2 Mg is used as a doping source, and a P-type doped GaN sub-layer is obtained through growth;
stopping introducing TEGa and Cp into the reaction chamber 2 And Mg, growing to obtain a second AlN sub-layer.
10. An LED chip, characterized in that the LED chip comprises the LED epitaxial wafer of any one of claims 1-7.
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Publication number Priority date Publication date Assignee Title
KR20130007169A (en) * 2011-06-29 2013-01-18 엘지이노텍 주식회사 Light emitting device
CN108365062A (en) * 2017-01-26 2018-08-03 晶元光电股份有限公司 Semiconductor element
US20190013437A1 (en) * 2015-12-29 2019-01-10 Lg Innotek Co., Ltd. Light-emitting element and light-emitting element package comprising same
CN115995516A (en) * 2023-03-21 2023-04-21 江西兆驰半导体有限公司 Epitaxial wafer, epitaxial wafer preparation method and LED chip

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20130007169A (en) * 2011-06-29 2013-01-18 엘지이노텍 주식회사 Light emitting device
US20190013437A1 (en) * 2015-12-29 2019-01-10 Lg Innotek Co., Ltd. Light-emitting element and light-emitting element package comprising same
CN108365062A (en) * 2017-01-26 2018-08-03 晶元光电股份有限公司 Semiconductor element
CN115995516A (en) * 2023-03-21 2023-04-21 江西兆驰半导体有限公司 Epitaxial wafer, epitaxial wafer preparation method and LED chip

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