CN116662043A - Memory device, working method thereof, computer readable storage medium and equipment - Google Patents
Memory device, working method thereof, computer readable storage medium and equipment Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/0727—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a storage system, e.g. in a DASD or network based storage system
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0766—Error or fault reporting or storing
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
- G06F11/3037—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a memory, e.g. virtual memory, cache
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/32—Monitoring with visual or acoustical indication of the functioning of the machine
- G06F11/324—Display of status information
- G06F11/325—Display of status information by lamps or LED's
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract
The application relates to a memory device, a working method thereof, a computer readable storage medium and equipment. The memory device comprises a memory bar, a memory controller, a system management bus, an analysis device and a state indicating device, wherein the state indicating device is connected with the analysis device and is used for indicating the working state of the memory bar according to a preset rule. According to the memory device provided by the application, the working state of the memory strip can be intuitively indicated through the state indicating device, the working state of the memory strip can be obtained without eliminating faults (Debug) or analyzing by related personnel, and the problematic memory strip is positioned, so that the time is saved, errors are not easy to occur in communication or operation, and the fault removal efficiency and accuracy can be improved; meanwhile, the memory strip is communicated with the memory controller through the system management bus, so that the communication process does not occupy the bandwidth of in-band signals of the memory device, and the transmission quality of the in-band signals is ensured.
Description
Technical Field
The present application relates to the field of semiconductor technologies, and in particular, to a memory device, a working method thereof, a computer readable storage medium and a device.
Background
As the running speed of the system is faster and the processing tasks are more and more, the Memory capacity requirement of the system is also more and more, especially in a server system using a large number of Dual-Inline Memory modules (DIMMs), the number of DIMMs is also more and more; as the number of DIMMs increases, the probability of DIMMs becoming problematic increases.
However, at present, whether the DIMM is wrong or not can be known only by eliminating fault (Debug) information, and then the problem of the DIMM can be located by analyzing by related personnel, and then the DIMM is replaced; this is not only time consuming, but also prone to errors in communication and operation.
Therefore, how to intuitively know the operation state of the DIMM is a problem to be solved.
Disclosure of Invention
In view of the foregoing, it is desirable to provide a memory device, a method of operating the same, a computer-readable storage medium, and an apparatus for addressing the above-described deficiencies of the prior art.
In order to achieve the above object, in one aspect, the present application provides a memory device, including:
a memory bank;
a memory controller;
a system management bus, wherein the memory bank communicates with the memory controller through the system management bus;
the analysis device is connected with the memory bank, and is used for acquiring communication information of the memory bank and the memory controller and analyzing the communication information to obtain the working state of the memory bank;
and the state indicating device is connected with the analyzing device and is used for indicating the working state of the memory bank according to a preset rule.
In one embodiment, the working state of the memory bank includes: at least one of a normal training process, an abnormal training process, a normal operation, an abnormal operation, an occurrence of a first type of error, and an occurrence of a second type of error.
In one embodiment, the parsing means comprises a parsing chip; the status indication device includes an indicator light assembly.
In one embodiment, the working state of the memory bank includes normal training process, abnormal training process, normal working, abnormal working, first type error and second type error;
the indicator light assembly includes:
the first indicator lamp is used for indicating whether the training process of the memory bank is normal or not;
the second indicator light is used for indicating whether the memory bank works normally or not;
the third indicator light is used for indicating whether the memory bank generates a first type of error or not; and
and the fourth indicator light is used for indicating whether the memory bank generates a second type of error or not.
In one embodiment, the first indicator light includes a two-color indicator light having a first indicator color and a second indicator color, the first indicator light illuminates the first indicator color when the training process of the memory bank is normal, and illuminates the second indicator color when the training process of the memory bank is abnormal;
the second indicator lamp comprises a double-color indicator lamp with a third indicator color and a fourth indicator color, the second indicator lamp lights the third indicator color when the memory bank works normally, and lights the fourth indicator color when the memory bank works abnormally;
the third indicator light comprises a single-color indicator light, and the third indicator light is lightened when the first type of error occurs in the memory bank;
the fourth indicator light comprises a single-color indicator light, and the fourth indicator light is lightened when the second type of error occurs in the memory bank.
In one embodiment, the first type of error comprises a correctable error and the second type of error comprises an uncorrectable error.
In one embodiment, the communication information comprises an out-of-band signal; the analysis device is used for connecting the out-of-band signal with the memory bank in a communication way through the system management bus.
In one embodiment, the memory bank includes dual inline memory module memory banks.
In one embodiment, the status indication device is located on the memory bank.
Based on the same inventive concept, the present application further provides a working method of the memory device according to any one of the foregoing embodiments, where the working method includes:
the analysis device is used for acquiring communication information of the memory bank and the memory controller, and analyzing the communication information to obtain the working state of the memory bank;
and indicating the working state of the memory strip according to a preset rule by the state indicating device.
In one embodiment, before the obtaining, by the parsing device, the communication information between the memory bank and the memory controller, the method further includes:
and electrifying the memory strip, the analysis device and the memory controller, wherein the memory strip and the memory controller are communicated through a system management bus.
In one embodiment, the working state of the memory bank includes: the training process is normal, the training process is abnormal, the work is normal, the work is abnormal, the first type of error occurs, and the second type of error occurs;
the state indicating device comprises an indicating lamp assembly, wherein the indicating lamp assembly comprises a first indicating lamp, a second indicating lamp, a third indicating lamp and a fourth indicating lamp;
the state indicating device indicates the working state of the memory bank according to a preset rule, and comprises:
training the memory bank, judging whether the training process of the memory bank is normal, and indicating whether the training process of the memory bank is normal by the first indicator lamp;
the memory bank enters an operation program, whether the operation of the memory bank is normal or not is judged, and whether the operation of the memory bank is normal or not is indicated by the second indicator lamp; if the memory bank is judged to work abnormally, executing the subsequent steps;
judging whether the memory bank has a first type of error or not; if yes, the third indicator light indicates;
if not, judging whether the memory bank has a second type error or not; if yes, the fourth indicator light indicates.
In one embodiment, the first indicator light comprises a two-color indicator light having a first indicator color and a second indicator color; training the memory bank, judging whether the training process of the memory bank is normal or not, and then, lighting a first indicating color by the first indicator lamp when the training process of the memory bank is normal and lighting a second indicating color when the training process of the memory bank is abnormal;
the second indicator light comprises a double-color indicator light with a third indicator color and a fourth indicator color; after the memory bank enters an operation program and whether the operation of the memory bank is normal or not is judged, the second indicator light is lightened to a third indicator color when the operation of the memory bank is normal, and is lightened to a fourth indicator color when the operation of the memory bank is abnormal;
the third indicator light comprises a single-color indicator light, and the fourth indicator light comprises a single-color indicator light; judging whether the memory bank has a first type error or not, if so, turning on the third indicator lamp; and if not, the fourth indicator lamp is lighted.
In one embodiment, the first type of error comprises a correctable error and the second type of error comprises an uncorrectable error.
In one embodiment, after the first indicator light indicates the abnormal training process of the memory bank, the method further includes:
powering off the memory bank;
reinserting the memory bank or replacing the memory bank;
electrifying the memory bank after re-plugging or the memory bank after replacement so that the memory bank after replacement communicates with the memory controller;
after the second indicator light indicates that the memory bank is abnormal in operation and the third indicator light indicates that the memory bank has the first type of error, the method further comprises:
powering off the memory bank;
replacing the memory bank;
and electrifying the replaced memory strip, so that the replaced memory strip is communicated with the memory controller.
Based on the same inventive concept, the present application also provides a computer-readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the working method according to any of the previous embodiments.
Based on the same inventive concept, the present application also provides a computer device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor is configured to implement the steps of the working method according to any of the foregoing embodiments when executing the computer program.
The memory device, the working method thereof, the computer readable storage medium and the equipment provided by the application have the following beneficial effects:
according to the memory device provided by the application, the working state of the memory strip can be intuitively indicated through the state indicating device, the working state of the memory strip can be obtained without eliminating faults (Debug) or analyzing by related personnel, and the problematic memory strip is positioned, so that the time is saved, errors are not easy to occur in communication or operation, and the fault removal efficiency and accuracy can be improved; meanwhile, the memory strip is communicated with the memory controller through the system management bus, so that the communication process does not occupy the bandwidth of in-band signals of the memory device, and the transmission quality of the in-band signals is ensured.
According to the working method of the memory device, the working state of the memory bar can be intuitively indicated through the state indicating device, the working state of the memory bar can be obtained without eliminating faults (Debug) or analyzing through related personnel, and the problematic memory bar is positioned, so that time is saved, errors are not easy to occur in communication or operation, and the efficiency and accuracy of fault elimination can be improved; meanwhile, other technical effects that can be achieved by the memory device according to any of the foregoing embodiments can be achieved by the working method, which is not described in detail herein.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments or the conventional techniques of the present application, the drawings required for the descriptions of the embodiments or the conventional techniques will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to the drawings without inventive effort for those skilled in the art.
FIG. 1 is a schematic diagram of a memory device according to one embodiment of the present application;
FIG. 2 is a flowchart illustrating a method of operating a memory device according to one embodiment of the present application;
FIG. 3 is a flowchart illustrating a method of operating a memory device according to another embodiment of the present application;
FIG. 4 is a flowchart illustrating a method of operating a memory device according to another embodiment of the present application;
FIG. 5 is a flowchart of a method for operating a memory device according to one embodiment of the present application after a training process abnormality of a memory bank is indicated by a first indicator light;
fig. 6 is a flowchart illustrating a method for operating a memory device according to an embodiment of the present application after a second indicator indicates that a memory bank is operating abnormally, and a third indicator indicates that a first type of error exists in the memory bank.
Reference numerals illustrate:
10. a memory bank; 20. a memory controller; 30. a system management bus; 401. analyzing the chip; 50. status indication means; 501. a first indicator light; 502. a second indicator light; 503. a third indicator light; 504. and a fourth indicator light.
Detailed Description
In order that the application may be readily understood, a more complete description of the application will be rendered by reference to the appended drawings. Preferred embodiments of the present application are shown in the drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
It will be understood that when an element is referred to as being "on," it can be directly on the other element or intervening elements may be present. It should be understood that although the terms first, second, third, etc. may be used to describe various elements, components or sections, these elements, components or sections should not be limited by these terms. These terms are only used to distinguish one element, component or section from another element, component or section. Thus, a first element, component, or section discussed below could be termed a second element, component, or section without departing from the teachings of the present application; for example, a first indicator light may be referred to as a second indicator light, and similarly, a second indicator light may be referred to as a first indicator light; the first indicator light and the second indicator light are different indicator lights.
As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. Also, as used herein, the term "and/or" includes any and all combinations of the associated listed items.
Embodiments of the application are described herein with reference to schematic illustrations that are idealized embodiments of the application, such that variations of the illustrated shapes due to, for example, manufacturing techniques and/or tolerances, are to be expected. Embodiments of the present application should not be limited to the particular shapes of the regions illustrated herein, but include deviations in shapes that result, for example, from manufacturing techniques; thus, the devices shown in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a device and are not intended to limit the scope of the application.
Various types of DIMMs (including NVDIMM, LR/RDIMM, UDIMM, SODIMM, etc.) are currently available on server, notebook, personal computer, etc. When the system is running, the state of the DIMM cannot be intuitively judged because the DIMM is not provided with an indicator lamp, such as whether the DIMM is abnormal or not, and whether the downtime of the system is related to the DIMM or not. Currently, when a system is abnormal, it is often necessary to locate the problem by Debug means and information. If the memory is abnormal, judging the abnormal DIMM through Debug information, and indicating the physical position of the abnormal DIMM on the mainboard according to the layout of the DIMM slot; for servers, because of the large number of DIMMs, more time is required to locate the physical location of the abnormal DIMM and human error may result in physical locating errors.
In view of the above-mentioned shortcomings of the prior art, the present application provides a memory device. Referring to fig. 1, the memory device may include a memory bank 10, a memory controller 20, a system management bus 30, a parsing device and a status indicating device 50; wherein the memory bank 10 communicates with the memory controller 20 through the system management bus 30; the analyzing device is connected with the memory bank 10, and is used for acquiring communication information of the memory bank 10 and the memory controller 20 and analyzing the communication information to obtain the working state of the memory bank 10; the status indication device 50 is connected to the analysis device, and is configured to indicate the operation status of the memory bank 10 according to a preset rule.
The memory banks 10 are very common in electronic systems, especially on servers such as large data centers, and the number of the memory banks 10 is very large, once the memory banks 10 have problems, the error memory banks 10 can be found only by Debug, which is a very tedious matter; the memory device provided in the above embodiment can intuitively indicate the working state of the memory bank 10 by the state indicating device 50, and can obtain the working state of the memory bank 10 without eliminating faults (Debug) or analyzing by related personnel, and locate the memory bank 10 with problems, thereby saving time required for eliminating faults, being not easy to make errors in communication or operation, improving the efficiency and accuracy of fault elimination,
meanwhile, the memory bank 10 communicates with the memory controller 20 through the system management bus 30, so that the communication process does not occupy the bandwidth of the in-band signal of the memory device, and the transmission quality of the in-band signal is ensured.
The application is not limited to the specific form of the memory bank 10, and the memory bank 10 may include, but is not limited to, a dual in-line memory module (DIMM) memory bank or a single in-line memory module (SIM) memory bank, etc.; with continued reference to FIG. 1, in one embodiment, memory stick 10 comprises a dual in-line memory module memory stick; in particular, the dual in-line memory module memory stick may include a plurality of dynamic random access memories (Dynamic Random Access Memory, DRAMs) disposed on a printed circuit board, and it is understood that the number of DRAMs on the dual in-line memory module memory stick is limited by the length of the corresponding dual in-line memory module memory stick slot or slot.
Specifically, the operation state of the memory bank 10 according to the present application may include one or more of normal training process, abnormal training process, normal operation, abnormal operation, first type error, second type error, and the like.
With continued reference to fig. 1, in one embodiment, the parsing means may comprise a parsing chip 401.
Specifically, as shown in fig. 1, the memory bank 10 may further include a power management integrated circuit and a configuration (SPD) information storage module; the power management integrated circuit is used for managing the power supply, and the configuration information storage module is used for storing the configuration information of the memory bank 10; the configuration information of the memory bank 10 according to the present application may include, but is not limited to, a module manufacturer, an operating voltage, an operating frequency, a speed, a capacity, a row/column address and number of the memory bank 10, various main operation timings, etc.; in some examples, the configuration information storage module includes a charged erasable programmable read-only memory (erasable); alternatively, the configuration information of the memory bank 10 may be written into the eeprom by the manufacturer of the memory bank 10 according to the actual performance thereof before shipping.
The specific form of the status indication device 50 is not limited in the present application, as long as it can indicate the working status of the memory bank 10 according to the preset rule; in one embodiment, the status indication device 50 includes an indicator light assembly.
Optionally, in one embodiment, the working state of the memory bank 10 includes normal training process, abnormal training process, normal working, abnormal working, first type error and second type error; meanwhile, the indicator lamp assembly comprises a first indicator lamp, a second indicator lamp, a third indicator lamp and a fourth indicator lamp.
Specifically, in the memory device provided in the above embodiment, the first indicator light may be used to indicate whether the training process of the memory bank 10 is normal; the second indicator light may be used to indicate whether the memory bank 10 is operating normally; a third indicator light may be used to indicate whether a first type of error occurred in memory bank 10; a fourth indicator light may be used to indicate whether a second type of error has occurred with memory bank 10.
The memory device provided in the above embodiment can not only more intuitively indicate the working state of the memory bank 10 through the state of the indicator light assembly, but also perform classification indication according to the type of the problem occurring in the memory bank 10, thereby further saving the time required for troubleshooting; meanwhile, the memory device provided in the above embodiment can provide an intuitive way for related personnel to see the location and the problem type of the memory bank 10 with the problem, if the memory bank 10 needs to be replaced later, the problem of the memory bank 10 can be directly classified, and the abnormal memory bank 10 can be replaced conveniently.
With continued reference to fig. 1, in one embodiment, the first indicator light 501 includes a dual-color indicator light having a first indicator color and a second indicator color, the second indicator light 502 includes a dual-color indicator light having a third indicator color and a fourth indicator color, the third indicator light 503 includes a single-color indicator light, and the fourth indicator light 504 includes a single-color indicator light.
Specifically, in the memory device provided in the above embodiment, the first indicator light 501 may illuminate a first indicator color when the training process of the memory bank 10 is normal, and illuminate a second indicator color when the training process of the memory bank 10 is abnormal; the second indicator lamp 502 may illuminate a third indicator color when the memory bank 10 is operating normally, and illuminate a fourth indicator color when the memory bank 10 is operating abnormally; the third indicator light 503 may illuminate when a first type of error occurs in the memory bank 10; the fourth indicator light 504 may illuminate when a second type of error occurs in the memory bank 10.
It should be noted that, the training process in the present application may include a process of initializing the memory bank 10 and a process of training the memory bank 10; specifically, the process of initializing the memory bank 10 is used to align and compensate the entire signal link; in some examples, during the process of initializing the memory bank 10, the content of the configuration information storage module may also be read through the system management bus 30, and recorded for each delay, and available for subsequent steps; the process of training the memory banks 10 is used to accurately set the timing sequence of the memory banks 10 so that the timing sequences of the memory banks 10 are consistent.
The specific colors of the first indication color, the second indication color, the third indication color and the fourth indication color are not limited, and the first indication color is different from the second indication color and the third indication color is different from the fourth indication color; in a practical embodiment, the first indication color and the third indication color may each include green, and the second indication color and the fourth indication color may each include red. The third indicator light 503 and the fourth indicator light 504 may be red indicator lights.
It should be further noted that, in other possible embodiments, the first indicator light 501 may include a single-color indicator light, where the first indicator light 501 may be turned on when the training process of the memory bank 10 is abnormal, and not turned on when the training process of the memory bank 10 is normal; the second indicator may also include a single-color indicator, which may be turned on when the memory bank 10 is abnormally operated and not turned on when the memory bank 10 is normally operated; in summary, the present application is not limited to the specific composition form of the indicator light assembly, as long as it can distinguish various problem types.
The present application is not limited to the specific position of the status indication device 50; for example, the status indication device 50 may be located on the memory bank 10 or may be located at a position that can be easily observed by other personnel.
In one embodiment, as shown in fig. 1, the status indicating device 50 is located at the upper edge of the memory bank 10, so that the status indicating device 50 is more visible.
In one embodiment, the first type of error comprises a correctable error and the second type of error comprises an uncorrectable error.
The application is not limited to the specific form of correctable errors and uncorrectable errors; in one embodiment, the correctable error may include a case where the number of bits (bits) of the abnormal data in the transmitted data is lower than a preset threshold, and the uncorrectable error may include a case where the number of bits (bits) of the abnormal data in the transmitted data is greater than or equal to the preset threshold.
In one embodiment, the communication information includes an out-of-band signal; on the other hand, the analysis device may connect the out-of-band signal to the memory bank 10 via the system management bus 30.
According to the specifications of the joint electronic equipment engineering council (Joint Electron Device Engineering Council, JEDEC), the memory bank 10 and the memory controller 20 are in communication connection with in-band signals and out-of-band signals; the in-band signals may include, but are not limited to, clock signals (CLK), data input/output (DQ), reference Signals (DQs), command signals (Command), address signals (Address), etc.; the out-of-band signal may be used to read information including, but not limited to, configuration information, temperature information, power Management Integrated Circuit (PMIC) information, and the like. In the memory device provided in the above embodiment, the memory controller 20 may inform the analyzing device of the working state of the memory bank 10 through the out-of-band signal, so that the bandwidth of the in-band signal of the memory device is not occupied, and the transmission quality of the in-band signal is ensured.
It will be appreciated that the address of the system management bus 30 of each memory bank 10 is different in the system, and the memory controller 20 and each memory bank 10 can be communicatively connected by an out-of-band signal; that is, the same physical address of the memory bank 10 does not exist under the same memory controller 20, and the analyzing device can analyze the system management bus 30 to locate the memory bank 10 with a problem.
Optionally, in some examples, the memory bank 10 may also communicate with the memory controller 20 via an I3C serial bus (I3C advanced Inter-Integrated Circuit). The I3C serial bus can support multiple master devices, is compatible with conventional two-wire serial bus (Inter-Integrated Circuit, I2C) devices, has lower power consumption than I2C serial buses, can support soft interrupts, and can support 12.5MHZ at a faster speed.
Based on the same inventive concept, the present application further provides a working method of the memory device provided by any of the foregoing embodiments, referring to fig. 2 in conjunction with fig. 1, the working method may include the following steps:
s202: the method comprises the steps of acquiring communication information of a memory bank 10 and a memory controller 20 by using an analysis device, and analyzing the communication information to obtain the working state of the memory bank 10;
s203: the operating state of the memory bank 10 is indicated by the state indicating means 50 according to a preset rule.
According to the working method of the memory device, the working state of the memory bar 10 can be intuitively indicated through the state indicating device 50, the working state of the memory bar 10 can be obtained without eliminating faults (Debug) or analyzing by related personnel, and the problematic memory bar 10 is positioned, so that time is saved, errors in communication or operation are not easy, and the efficiency and accuracy of fault elimination can be improved; meanwhile, other technical effects that can be achieved by the memory device according to any of the foregoing embodiments can be achieved by the working method, which is not described in detail herein.
With continued reference to fig. 2, in one embodiment, before step S202, the method may further include:
s201: the memory bank 10, the analysis device, and the memory controller 20 are powered on, and the memory bank 10 and the memory controller 20 communicate via the system management bus 30.
In the working method provided in the above embodiment, since the memory bank 10 communicates with the memory controller 20 through the system management bus 30, the communication process does not occupy the bandwidth of the in-band signal of the memory device, and ensures the in-band signal transmission quality.
Optionally, in one embodiment, the working state of the memory bank 10 includes normal training process, abnormal training process, normal working, abnormal working, first type error and second type error; meanwhile, the status indicating device 50 includes an indicator light assembly including a first indicator light, a second indicator light, a third indicator light and a fourth indicator light.
In the working method provided in the foregoing embodiment, step S203 may specifically include the following steps:
training the memory bank 10, judging whether the training process of the memory bank 10 is normal, and indicating whether the training process of the memory bank 10 is normal by the first indicator light;
the memory bank 10 enters an operation program, and whether the operation of the memory bank 10 is normal or not is judged, and whether the operation of the memory bank 10 is normal or not is indicated by the second indicator light; if the operation of the memory bank 10 is abnormal, executing the subsequent steps;
judging whether the memory bank 10 has a first type of error or not; if yes, the third indicator light indicates; if not, judging whether the memory bank 10 has a second type of error; if yes, the fourth indicator light indicates.
In one embodiment, the first indicator light comprises a first indicator light 501 having a first indicator color and a second indicator color, the second indicator light comprises a second indicator light 502 having a third indicator color and a fourth indicator color, the third indicator light comprises a single color indicator light, and the fourth indicator light comprises a single color indicator light.
Specifically, in the working method provided in the foregoing embodiment, after training the memory bank 10 and determining whether the training process of the memory bank 10 is normal, the first indicator 501 may light up the first indicator color when the training process of the memory bank 10 is normal, and light up the second indicator color when the training process of the memory bank 10 is abnormal; in the working method provided in the above embodiment, after the memory bank 10 enters the operation program and determines whether the operation of the memory bank 10 is normal, the second indicator lamp 502 lights the third indicator color when the operation of the memory bank 10 is normal, and lights the fourth indicator color when the operation of the memory bank 10 is abnormal; in the working method provided in the above embodiment, after determining whether the memory bank 10 has the first type of error, if so, the third indicator light 503 is turned on; if not, the fourth indicator light 504 is illuminated.
According to the working method provided by the embodiment, the working state of the memory bank 10 can be indicated more intuitively through the state of the indicator lamp assembly, the indicator lamp assembly can also carry out classification indication according to the type of the problem of the memory bank 10, and the time required for fault removal is further saved; meanwhile, the working method provided by the embodiment can provide an intuitive way for related personnel to see the position and the problem type of the memory bank 10 with the problem, and if the memory bank 10 needs to be replaced later, the problem of the memory bank 10 can be directly classified, so that the abnormal memory bank 10 can be replaced conveniently.
Please refer to fig. 1 and 3, which illustrate the specific steps of the working method according to one embodiment of the present application in more detail; the working method provided by the embodiment specifically comprises the following steps:
s301: powering on the memory bank 10, the analysis device and the memory controller 20, and communicating the memory bank 10 with the memory controller 20 through the system management bus 30;
s302: judging whether the training process of the memory bank 10 is normal or not; if yes, go to step S303; if not, executing step S313;
s303: the first indicator light 501 lights up a first indicator color;
s313: the first indicator light 501 lights up a second indicator color.
It will be appreciated that the process of training the memory bank 10 is also included prior to step S302.
After step S303, the working method provided in this embodiment may further include the following steps:
s304: judging whether the operation of the memory bank 10 is normal or not; if yes, go to step S305; if not, executing step S315;
s305: the second indicator light 502 lights up a third indicator color;
s315: the second indicator light 502 lights up a fourth indicator color.
It will be appreciated that the process of entering the running program by the memory bank 10 is also included before step S304.
After step S315, the working method provided in this embodiment may further include the following steps:
s306: judging whether the memory bank 10 has a first type of error or not; if yes, executing S307; if not, executing S317;
s307: the third indicator light 503 is turned on;
s317: the fourth indicator light 504 is illuminated.
In one embodiment, the first type of error comprises a correctable error and the second type of error comprises an uncorrectable error.
It should be noted that, in other possible embodiments, the first indicator light 501 may include a single-color indicator light, where the first indicator light 501 may be turned on when the training process of the memory bank 10 is abnormal, and not turned on when the training process of the memory bank 10 is normal; the second indicator may also include a single-color indicator, which may be turned on when the memory bank 10 is abnormally operated and not turned on when the memory bank 10 is normally operated; the following describes in detail the specific steps of the working method according to another embodiment of the present application with reference to fig. 1 and 4; the working method provided by the embodiment specifically comprises the following steps:
s401: powering on the memory bank 10, the analysis device and the memory controller 20, and communicating the memory bank 10 with the memory controller 20 through the system management bus 30;
s402: judging whether the training process of the memory bank 10 is normal or not; if yes, go to step S403; if not, executing a step S413;
s403: the first indicator light 501 is not illuminated;
s413: the first indicator light 501 is lit.
It will be appreciated that the process of training the memory bank 10 is also included prior to step S402.
After step S403, the working method provided in this embodiment may further include the following steps:
s404: judging whether the operation of the memory bank 10 is normal or not; if yes, go to step S405; if not, go to step S415;
s405: the second indicator light 502 is not illuminated;
s415: the second indicator light 502 is illuminated.
It will be appreciated that the process of entering the running program by the memory bank 10 is also included before step S404.
After step S415, the working method provided in this embodiment may further include the following steps:
s406: judging whether the memory bank 10 has a first type of error or not; if yes, then execute S407; if not, then S417 is performed;
s407: the third indicator light 503 is turned on;
s417: the fourth indicator light 504 is illuminated.
Referring to fig. 5, in the working method provided in one embodiment, after the first indicator light 501 indicates the abnormal training process of the memory bank 10, the method may further include the following steps:
s501: powering down the memory bank 10;
s502: reinserting the memory stick 10 or replacing the memory stick 10;
s503: the memory bank 10 after the re-plug or the memory bank 10 after the replacement is powered on, so that the memory bank 10 after the replacement communicates with the memory controller 20.
Referring to fig. 6, in the working method provided in one embodiment, after the second indicator light 502 indicates that the memory bank 10 is abnormally operated, and the third indicator light 503 indicates that the memory bank 10 has a first type of error, the method may further include the following steps:
s601: powering down the memory bank 10;
s602: replacing the memory bank 10;
s603: the replaced memory bank 10 is powered on such that the replaced memory bank 10 communicates with the memory controller 20.
It should be understood that, although the steps in the flowcharts of fig. 2 to 6 are sequentially shown as indicated by arrows, these steps are not necessarily sequentially performed in the order indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least a portion of the steps of fig. 2-6 may include steps or stages that are not necessarily performed at the same time, but may be performed at different times, nor does the order in which the steps or stages are performed necessarily occur sequentially, but may be performed alternately or alternately with other steps or at least a portion of the steps or stages in other steps.
Based on the same inventive concept, the present application also provides a computer-readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the working method according to any of the previous embodiments.
The steps of the working method according to any one of the foregoing embodiments can be implemented by the computer readable storage medium provided in the foregoing embodiments, so that other technical effects that can be achieved by the working method according to any one of the foregoing embodiments, and the details of the computer readable storage medium will not be described herein.
Based on the same inventive concept, the present application also provides a computer device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor is configured to implement the steps of the working method according to any of the foregoing embodiments when executing the computer program.
The steps of the working method according to any of the foregoing embodiments can be implemented by the computer device provided in the foregoing embodiments, so that other technical effects that can be achieved by the working method according to any of the foregoing embodiments can be achieved by the computer device, and the details of the computer-readable storage medium are not described herein.
The technical features of the above embodiments may be arbitrarily combined, and for brevity, all of the possible combinations of the technical features of the above embodiments are not described, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the claims. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.
Claims (17)
1. A memory device, comprising:
a memory bank;
a memory controller;
a system management bus, wherein the memory bank communicates with the memory controller through the system management bus;
the analysis device is connected with the memory bank, and is used for acquiring communication information of the memory bank and the memory controller and analyzing the communication information to obtain the working state of the memory bank;
and the state indicating device is connected with the analyzing device and is used for indicating the working state of the memory bank according to a preset rule.
2. The memory device of claim 1, wherein the operating state of the memory bank comprises: at least one of a normal training process, an abnormal training process, a normal operation, an abnormal operation, an occurrence of a first type of error, and an occurrence of a second type of error.
3. The memory device of claim 2, wherein the parsing means comprises a parsing chip; the status indication device includes an indicator light assembly.
4. The memory device of claim 3, wherein the operating state of the memory bank includes a normal training process, an abnormal training process, a normal operation, an abnormal operation, a first type of error, and a second type of error;
the indicator light assembly includes:
the first indicator lamp is used for indicating whether the training process of the memory bank is normal or not;
the second indicator light is used for indicating whether the memory bank works normally or not;
the third indicator light is used for indicating whether the memory bank generates a first type of error or not; and
and the fourth indicator light is used for indicating whether the memory bank generates a second type of error or not.
5. The memory device of claim 4, wherein the first indicator light comprises a two-color indicator light having a first indicator color and a second indicator color, the first indicator light being illuminated with the first indicator color when a training process of the memory bank is normal and with the second indicator color when the training process of the memory bank is abnormal;
the second indicator lamp comprises a double-color indicator lamp with a third indicator color and a fourth indicator color, the second indicator lamp lights the third indicator color when the memory bank works normally, and lights the fourth indicator color when the memory bank works abnormally;
the third indicator light comprises a single-color indicator light, and the third indicator light is lightened when the first type of error occurs in the memory bank;
the fourth indicator light comprises a single-color indicator light, and the fourth indicator light is lightened when the second type of error occurs in the memory bank.
6. The memory device of claim 4, wherein the first type of error comprises a correctable error and the second type of error comprises an uncorrectable error.
7. The memory device of claim 1, wherein the communication information comprises an out-of-band signal; the analysis device is used for connecting the out-of-band signal with the memory bank in a communication way through the system management bus.
8. The memory device of claim 1, wherein the memory bank comprises a dual in-line memory module memory bank.
9. The memory device of claim 1, wherein the status indication device is located on the memory bank.
10. A method of operating a memory device according to any one of claims 1 to 9, the method comprising:
the analysis device is used for acquiring communication information of the memory bank and the memory controller, and analyzing the communication information to obtain the working state of the memory bank;
and indicating the working state of the memory strip according to a preset rule by the state indicating device.
11. The method according to claim 10, wherein before the step of using the parsing means to obtain the communication information between the memory bank and the memory controller, further comprises:
and electrifying the memory strip, the analysis device and the memory controller, wherein the memory strip and the memory controller are communicated through a system management bus.
12. The method of claim 11, wherein the operating state of the memory bank comprises: the training process is normal, the training process is abnormal, the work is normal, the work is abnormal, the first type of error occurs, and the second type of error occurs;
the state indicating device comprises an indicating lamp assembly, wherein the indicating lamp assembly comprises a first indicating lamp, a second indicating lamp, a third indicating lamp and a fourth indicating lamp;
the state indicating device indicates the working state of the memory bank according to a preset rule, and comprises:
training the memory bank, judging whether the training process of the memory bank is normal, and indicating whether the training process of the memory bank is normal by the first indicator lamp;
the memory bank enters an operation program, whether the operation of the memory bank is normal or not is judged, and whether the operation of the memory bank is normal or not is indicated by the second indicator lamp; if the memory bank is judged to work abnormally, executing the subsequent steps;
judging whether the memory bank has a first type of error or not; if yes, the third indicator light indicates;
if not, judging whether the memory bank has a second type error or not; if yes, the fourth indicator light indicates.
13. The method of claim 12, wherein the first indicator light comprises a bi-color indicator light having a first indicator color and a second indicator color; training the memory bank, judging whether the training process of the memory bank is normal or not, and then, lighting a first indicating color by the first indicator lamp when the training process of the memory bank is normal and lighting a second indicating color when the training process of the memory bank is abnormal;
the second indicator light comprises a double-color indicator light with a third indicator color and a fourth indicator color; after the memory bank enters an operation program and whether the operation of the memory bank is normal or not is judged, the second indicator light is lightened to a third indicator color when the operation of the memory bank is normal, and is lightened to a fourth indicator color when the operation of the memory bank is abnormal;
the third indicator light comprises a single-color indicator light, and the fourth indicator light comprises a single-color indicator light; judging whether the memory bank has a first type error or not, if so, turning on the third indicator lamp; and if not, the fourth indicator lamp is lighted.
14. The method of operation of claim 12, wherein the first type of error comprises a correctable error and the second type of error comprises an uncorrectable error.
15. The method of claim 12, wherein after the first indicator light indicates the abnormal training process of the memory bank, further comprising:
powering off the memory bank;
reinserting the memory bank or replacing the memory bank;
electrifying the memory bank after re-plugging or the memory bank after replacement so that the memory bank after replacement communicates with the memory controller;
after the second indicator light indicates that the memory bank is abnormal in operation and the third indicator light indicates that the memory bank has the first type of error, the method further comprises:
powering off the memory bank;
replacing the memory bank;
and electrifying the replaced memory strip, so that the replaced memory strip is communicated with the memory controller.
16. A computer-readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the working method according to any one of claims 10 to 15.
17. A computer device comprising a memory storing a computer program and a processor for implementing the steps of the operating method according to any one of claims 10 to 15 when the computer program is executed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210153586.XA CN116662043A (en) | 2022-02-18 | 2022-02-18 | Memory device, working method thereof, computer readable storage medium and equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210153586.XA CN116662043A (en) | 2022-02-18 | 2022-02-18 | Memory device, working method thereof, computer readable storage medium and equipment |
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| Publication Number | Publication Date |
|---|---|
| CN116662043A true CN116662043A (en) | 2023-08-29 |
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|---|---|---|---|
| CN202210153586.XA Pending CN116662043A (en) | 2022-02-18 | 2022-02-18 | Memory device, working method thereof, computer readable storage medium and equipment |
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| Country | Link |
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| CN (1) | CN116662043A (en) |
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2022
- 2022-02-18 CN CN202210153586.XA patent/CN116662043A/en active Pending
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