CN116581051A - Wafer testing method and device - Google Patents

Wafer testing method and device Download PDF

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CN116581051A
CN116581051A CN202310849714.9A CN202310849714A CN116581051A CN 116581051 A CN116581051 A CN 116581051A CN 202310849714 A CN202310849714 A CN 202310849714A CN 116581051 A CN116581051 A CN 116581051A
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wafer
column
grain
probe
tested
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CN116581051B (en
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徐振
唐晓辉
杨浩
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Hangzhou Langxun Technology Co ltd
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Hangzhou Langxun Technology Co ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01C—MEASURING DISTANCES, LEVELS OR BEARINGS; SURVEYING; NAVIGATION; GYROSCOPIC INSTRUMENTS; PHOTOGRAMMETRY OR VIDEOGRAMMETRY
    • G01C21/00—Navigation; Navigational instruments not provided for in groups G01C1/00 - G01C19/00
    • G01C21/20—Instruments for performing navigational calculations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/30—Computing systems specially adapted for manufacturing

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  • Automation & Control Theory (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

The invention discloses a method and a device for testing a wafer, wherein the method comprises the following steps: determining a reference coordinate system according to the test area of the wafer to be tested, and giving out the coordinates of each crystal grain of the wafer to be tested; according to the coordinate analysis of the boundary crystal grains of the wafer to be tested, the initial crystal grains of the probe test are determined by combining the structure of the probe for the wafer test; giving out a terminated grain for probe testing based on a probe travel path strategy; traversing all grains of the wafer to be tested from the initial grains to the final grains by the probe, wherein the traversing of the probe does not comprise the outer edge of the grain boundary in the test area of the wafer to be tested; and analyzing the test data of each crystal grain to realize the test of the wafer to be tested. The wafer testing mode provided by the invention avoids the adhesion of the crystal boundary outer edge ball and the probe in the wafer area to be tested through optimizing the testing path, and improves the testing efficiency of the wafer.

Description

Wafer testing method and device
Technical Field
The invention belongs to the technical field of semiconductor testing, and particularly relates to a wafer testing method and device.
Background
In the manufacturing process of the semiconductor device, the test is an important link for ensuring the delivery quality of the device, and defective products in the manufacturing process can be selected through the test; meanwhile, through testing, the performance parameters of the device can be obtained, and the grade of the device product can be classified.
The probe is used for testing, the probe card is an interface between a testing instrument and a wafer to be tested, the probe card is used for transmitting electric signals by contacting with the pressure welding points of the wafer crystal grains to be tested, and the testing instrument sends the testing electric signals to be input to the crystal grains on the wafer through the probe card and the pressure welding points contacted with the probe card, so that testing data are obtained. The test path of the probe card has various arrangement modes, a traditional wafer test method is adopted, the test path is fixed, the test can be only carried out according to row by row or column by column, and the wafer test method of the self-defining path is also adopted, the test path is edited in a test path editing file, and the self-definition of the test path is realized.
The method for realizing the custom test path of the wafer probe station is disclosed in patent CN112597742A, and comprises the following steps: s1, calling a model attribute map file generated by a wafer probe station into test path generating software to generate a test path editing file; s2, loading the test mode into a test path editing file, and editing a test path in the test path editing file; and S3, loading the test path editing file edited with the test path into test path generating software to generate a test path file identified by the wafer probe station. The scheme can realize the self definition of the test path, meet the requirement of a customer on flexible planning of the test path, optimize the path, save the test time and improve the test efficiency.
The self-defined test path is not limited by the test path carried by the wafer probe station, and the application is flexible and changeable, but the path is designed for a specific wafer to be tested.
The wafer test method as described in patent CN101169461a comprises the following steps: firstly, calculating the shortest trend of a synchronous probe according to the information of a wafer and a probe card; then, the tester sends a command to the probe station system through a GPIB (general purpose interface bus) interface in a trend mode, and controls the trend of a tray of the probe station system to realize optimization of wafer test. The method reduces the number of times of puncturing the wafer during the simultaneous measurement, can effectively reduce the test time of the product and improves the test efficiency.
The wafer process has two forms of Bump (Bump processing technology) and Pad (pressure welding point), and the two prepared crystal grains have differences, wherein the Bump (Bump processing technology) can generate a ball phenomenon at the outer edge of the crystal grain boundary of the wafer due to the process problem. After the probe card for testing tests the small balls at the outer edge of the grain boundary, the small balls are removed and adhered to the tip of the probe card, so that short circuit is caused in the subsequent test. The short circuit during testing can cause large current to be tested, and the needle burning phenomenon is easy to occur.
Therefore, how to design a test scheme for a wafer obtained by a bump processing technology to achieve the purpose of avoiding the adhesion of the balls outside the grain boundary and improving the test efficiency of the wafer at the same time is a problem to be solved by those skilled in the art.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides a wafer testing method and device, which are used for analyzing coordinates of boundary grains and the outer edge of a grain boundary of a wafer to be tested by setting a reference coordinate system and traversing all grains of the wafer to be tested according to a determined probe travelling path strategy so as to realize the testing of the wafer to be tested. According to the number and arrangement of the crystal grains of the wafer to be tested, each crystal grain in the wafer to be tested is tested, and the outer edge of the crystal grain boundary is ensured to be inaccessible when each crystal grain is tested; and during testing, the grains of the wafer to be tested are tested one by one based on a path strategy and the set reference coordinates, so that adhesion between the small balls at the outer edge of the grain boundary in the area of the wafer to be tested and the probes is avoided, and meanwhile, the testing efficiency of the wafer is improved.
In a first aspect, the present invention provides a method for testing a wafer, including the steps of:
determining a reference coordinate system according to the test area of the wafer to be tested, and giving out the coordinates of each crystal grain of the wafer to be tested;
according to the coordinate analysis of the boundary crystal grains of the wafer to be tested, the initial crystal grains of the probe test are determined by combining the structure of the probe for the wafer test;
giving out a terminated grain for probe testing based on a probe travel path strategy;
traversing all grains of the wafer to be tested from the initial grains to the final grains by the probe, wherein the traversing of the probe does not comprise the outer edge of the grain boundary in the test area of the wafer to be tested;
and analyzing the test data of each crystal grain to realize the test of the wafer to be tested.
Further, according to the test area of the wafer to be tested, a reference coordinate system is determined, and the coordinates of each crystal grain of the wafer to be tested are given, which comprises the following steps:
taking a preset position at the left lower part of the outer edge of the wafer to be detected as a coordinate origin, and establishing an X-axis and Y-axis two-dimensional coordinate system, wherein the coordinate positions of all crystal grains of the wafer to be detected are positioned in a first quadrant of the X-axis and Y-axis two-dimensional coordinate system;
and giving the coordinates of each crystal grain of the wafer to be tested and the coordinates of the outer edge of the crystal boundary in the test area of the wafer to be tested based on the X-axis and Y-axis two-dimensional coordinate system.
Further, the boundary grain is a grain on the boundary of the wafer to be tested, and the outer edge of the grain boundary is a virtual grain in the test area of the wafer to be tested and at the periphery of the boundary grain.
Further, the probe is in a vertical long strip shape, a plurality of points are vertically divided, each point corresponds to a crystal grain of the wafer to be tested, the first point in the vertical direction is the initial point of the probe, and the last point in the vertical direction is the tail point of the probe;
in the probe travel path strategy, the starting point of the probe is taken as a marking path point, and the direction in the process of probe travel is vertically downward along the Y axis.
Further, according to the coordinate analysis of the boundary grain of the wafer to be tested, the initial grain of the probe test is determined by combining the structure of the probe for the wafer test, and the method specifically comprises the following steps:
taking the left-most die row of the wafer to be tested as a starting row, and acquiring the coordinates of all boundary dies of the starting row to form a starting row boundary die coordinate set;
based on the initial column boundary grain coordinate set, the number of probe points is compared, and the grain with the largest Y-axis value in the initial column boundary grain coordinate set is taken as the initial grain.
Further, the probe travel path strategy specifically includes:
forming all grain coordinate sets of the wafer to be tested based on the coordinates of all grains of the wafer to be tested, dividing grain columns of the wafer to be tested according to the X-axis coordinate attribute and the sequence from small to large, determining column starting grains and column ending grains of each grain column, and finishing the traversal of each grain column;
and (5) traversing the adjacent columns in the sequence from small to large until the traversal of all the grains of the wafer to be tested is completed.
Further, dividing the die rows of the wafer to be tested, and determining the row start die and the row end die of each die row to complete the traversal of each die row, including:
according to the X-axis coordinate of each grain column, marking the grain as even columns and odd columns, respectively determining column starting grains and column ending grains of the even columns and the odd columns, and finishing the traversal of each grain column;
wherein, the initial column is the first even column.
Further, determining a column start grain and a column end grain of the even columns to complete the traversal of each even column, including:
respectively acquiring each even-numbered row grain coordinate set and the number S of probe points, wherein the even-numbered row a grain coordinate set，/>Y-axis coordinate maximum grain coordinate for even column a grain coordinate set, +.>For the even column a grain coordinate set, the Y-axis coordinate is the grain coordinate of i, +.>Y-axis coordinate minimum die pad for even column a die coordinate setMarking;
taking the maximum crystal grain of the Y-axis coordinate of each even column crystal grain coordinate set as a column starting crystal grain;
the position of the crystal grain of the minimum crystal grain of the Y-axis coordinate of each even column crystal grain coordinate set is covered by the tail point of the probe, and the crystal grain is used as a column termination crystal grain;
collecting the positions of column start grains and column end grains of each even number column;
completing the traversal of each even number column;
the traversal of each even column is completed, specifically expressed as:
analysis based on column termination grainsIs->Determining marked path points from the initial crystal grains, and forming a path sequence set R of probe initial points a Completing all crystal grain traversals of even number columns, R a The concrete steps are as follows:
；
wherein R is a To form a set of path sequences of probe start points at even column a test, k a Taking positive integer, m a Is the largest positive integer corresponding to even column a,。
further, determining a column start grain and a column end grain of the odd columns to complete the traversal of each odd column, including:
respectively acquiring each odd-numbered column grain coordinate set and the number S of probe points, wherein the odd-numbered column b grain coordinate set，/>Y-axis coordinate set for odd column b grain coordinate setMaximum grain coordinates>For the odd column b grain coordinate set, the Y-axis coordinate is the grain coordinate of j, +.>The minimum grain coordinate of the Y-axis coordinate of the grain coordinate set of the odd column b;
covering the position of the minimum crystal grain of the Y-axis coordinate of each odd column crystal grain coordinate set by the tail point of the probe as a column starting crystal grain;
terminating the grains by taking the maximum grain of the Y-axis coordinate of each odd-numbered column grain coordinate set as a column termination grain;
collecting the positions of column start grains and column end grains of each odd column;
completing the traversal of each odd column;
the traversal of each odd column is completed, specifically expressed as:
analysis based on column termination grainsMiddle->From the initial die, determining the marked path points and forming a path sequence set R of probe initial points b Completing all crystal grain traversals of odd columns, R b The concrete steps are as follows:
；
wherein R is b To form a set of path sequences of probe start points, k, during odd column b testing b Taking positive integer, n b Is the largest positive integer corresponding to the odd column b,。
in a second aspect, the present invention further provides a testing apparatus for a wafer, where the testing method for a wafer includes:
the acquisition module is used for determining a reference coordinate system according to a test area of the wafer to be tested, giving out the coordinates of each crystal grain of the wafer to be tested, and determining the initial crystal grain of the probe test according to the coordinate analysis of the boundary crystal grain of the wafer to be tested and the structure of the probe for carrying out the wafer test;
the analysis module is used for giving out a terminated grain of the probe test based on the probe travel path strategy;
and the execution module is used for traversing all the crystal grains of the wafer to be tested from the initial crystal grains to the final crystal grains, wherein the traversal of the probe does not comprise the outer edge of the crystal boundary in the test area of the wafer to be tested, and the test data of each crystal grain is analyzed to realize the test of the wafer to be tested.
The method and the device for testing the wafer provided by the invention at least have the following beneficial effects:
(1) According to the wafer testing mode provided by the invention, the adhesion between the small balls at the outer edge of the grain boundary in the wafer area to be tested and the probes is avoided through optimizing the testing path during testing, and meanwhile, the testing efficiency of the wafer is improved.
(2) The test path strategy provided by the invention can avoid contacting the crystal boundary outer edge pellets of the wafer to be tested, consider the frequency of contacting all crystal grains of the whole wafer to be tested, and improve the efficiency of testing the wafer on the basis of reducing the shutdown rate.
Drawings
FIG. 1 is a schematic flow chart of a wafer testing method according to the present invention;
FIG. 2 is a schematic diagram of a probe travel path strategy according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a testing apparatus for a wafer according to the present invention.
Detailed Description
In order to better understand the above technical solutions, the following detailed description will be given with reference to the accompanying drawings and specific embodiments. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in this application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise, the "plurality" generally includes at least two.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a product or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such product or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a commodity or device comprising such element.
The wafer process has two forms of Bump (Bump processing technology) and Pad (pressure welding point), and the two prepared crystal grains have differences, wherein the Bump (Bump processing technology) can generate a ball phenomenon at the outer edge of the crystal grain boundary of the wafer due to the process problem. After the probe card for testing tests the small balls at the outer edge of the grain boundary, the small balls are removed and adhered to the tip of the probe card, so that short circuit is caused in the subsequent test. The short circuit during testing can cause large current to be tested, and the needle burning phenomenon is easy to occur.
Therefore, the original wafer test path strategy needs to be adjusted, so that the wafer is prevented from contacting the outer edge of the grain boundary during the test, the problem that the probe card adheres to the small ball during the test is solved, the abnormality of the short-circuit burn-in is avoided, and the shutdown rate is reduced.
As shown in fig. 1, the present invention provides a method for testing a wafer, which includes the following steps:
determining a reference coordinate system according to the test area of the wafer to be tested, and giving out the coordinates of each crystal grain of the wafer to be tested;
according to the coordinate analysis of the boundary crystal grains of the wafer to be tested, the initial crystal grains of the probe test are determined by combining the structure of the probe for the wafer test;
giving out a terminated grain for probe testing based on a probe travel path strategy;
traversing all grains of the wafer to be tested from the initial grains to the final grains by the probe, wherein the traversing of the probe does not comprise the outer edge of the grain boundary in the test area of the wafer to be tested;
and analyzing the test data of each crystal grain to realize the test of the wafer to be tested.
According to the number and arrangement of the crystal grains of the wafer to be tested, each crystal grain in the wafer to be tested is tested, and the outer edge of the crystal grain boundary is ensured to be inaccessible when each crystal grain is tested; and during testing, the grains of the wafer to be tested are tested one by one based on a path strategy and the set reference coordinates, so that adhesion between the small balls at the outer edge of the grain boundary in the area of the wafer to be tested and the probes is avoided, and meanwhile, the testing efficiency of the wafer is improved.
The method comprises the following steps of:
taking a preset position at the left lower part of the outer edge of the wafer to be detected as a coordinate origin, and establishing an X-axis and Y-axis two-dimensional coordinate system, wherein the coordinate positions of all crystal grains of the wafer to be detected are positioned in a first quadrant of the X-axis and Y-axis two-dimensional coordinate system;
and giving the coordinates of each crystal grain of the wafer to be tested and the coordinates of the outer edge of the crystal boundary in the test area of the wafer to be tested based on the X-axis and Y-axis two-dimensional coordinate system.
As shown in fig. 2, in order to facilitate the position analysis of all the dies in the wafer to be tested, a preset origin of coordinates is selected at the lower left of the wafer to be tested, while ensuring that all the dies of the wafer to be tested can be located in the first quadrant. Based on the X-axis and Y-axis coordinate system established above, and according to the obtained coordinate positions of each crystal grain in the coordinate system, a corresponding probe travel path strategy can be given, and wafer testing is completed according to the probe travel path strategy, so that the problem of adhesion between the crystal grain boundary outer edge ball and the probe in the wafer area to be tested can be avoided, and meanwhile, the testing efficiency of the wafer is improved.
Further, the boundary grain is a grain on the boundary of the wafer to be tested, and the outer edge of the grain boundary is a virtual grain in the test area of the wafer to be tested and at the periphery of the boundary grain.
As shown in fig. 2, the wafer to be tested and the grain boundary outer edge are classified in a given test area. The boundary of the wafer to be tested is provided with a circle of crystal grains bordering the outer edge of the crystal boundary, and the crystal grains are taken as boundary crystal grains. And the virtual crystal grains at the periphery of the boundary crystal grains in the test area are the outer edges of the crystal grain boundary. The size of the outer edge of the grain boundary is related to both the defined test area and the size of the wafer to be tested. The part of the outer edge of the grain boundary, which is close to the boundary grain, is provided with a small ball, and the small ball is contacted with the probe card during testing, so that the adhesion problem is generated, and the short circuit needle burning is abnormal. Analysis and determination of boundary grains is therefore critical given the corresponding probe travel path strategy.
The probe is in a vertical strip shape, a plurality of points are vertically divided, each point corresponds to a crystal grain of a wafer to be tested, the first point of the vertical probe is a starting point of the probe, and the last point of the vertical probe is a tail point of the probe; the correspondence of each point location and the crystal grain of the wafer to be tested comprises the correspondence in the aspects of size, direction and the like.
In the probe travel path strategy, the starting point of the probe is taken as a marking path point, and the direction in the process of probe travel is vertically downward along the Y axis.
In a certain embodiment, the number of probe points is 6, and 1, 2, 3, 4, 5 and 6 can be numbered sequentially from top to bottom, wherein the first vertical point, i.e. the point with the number 1, is taken as the initial point, the last vertical point, i.e. the point with the number 6, is taken as the tail point, and the path points of the design marks in the probe travelling strategy are all the point with the number 1. When the probes traverse all the crystal grains of the wafer to be tested according to the probe travelling strategy, the frequency of contact between each crystal grain and all probe bits is considered, so that the testing efficiency of the wafer is measured.
Of course, the number of bits of the probe is not particularly limited, and may be adjusted according to the size of the wafer to be tested, the number and arrangement of the dies, and the like.
In one embodiment, as shown in fig. 2, the die at coordinates (0, 20) makes 1 contact with the probe, and the die at coordinates (0, 17) makes 2 contacts with the probe during the travel of the probe.
According to the coordinate analysis of the boundary crystal grain of the wafer to be tested, the initial crystal grain of the probe test is determined by combining the structure of the probe for the wafer test, and the method specifically comprises the following steps:
taking the left-most die row of the wafer to be tested as a starting row, and acquiring the coordinates of all boundary dies of the starting row to form a starting row boundary die coordinate set;
based on the initial column boundary grain coordinate set, the number of probe points is compared, and the grain with the largest Y-axis value in the initial column boundary grain coordinate set is taken as the initial grain.
And determining a starting column by the leftmost crystal grain of the wafer to be tested according to the X-Y axis two-dimensional coordinate system and the determined coordinate origin position, and giving out the starting crystal grain according to the starting column and the number of probe points. By the initial die, the initial row and the probe traveling strategy, test paths for all dies of the wafer to be tested can be given, so that the test of the whole wafer to be tested is completed.
As shown in fig. 2, the probe travel path strategy specifically includes:
forming all grain coordinate sets of the wafer to be tested based on the coordinates of all grains of the wafer to be tested, dividing grain columns of the wafer to be tested according to the X-axis coordinate attribute and the sequence from small to large, determining column starting grains and column ending grains of each grain column, and finishing the traversal of each grain column;
and (5) traversing the adjacent columns in the sequence from small to large until the traversal of all the grains of the wafer to be tested is completed.
In one embodiment, as shown in FIG. 2, after determining the X-Y axis coordinate system, the set of die coordinates for the first die row, from left to right, includesThe grain coordinate set of the second grain column includes +.>The subsequent die rows, and so on, in this embodiment the wafer under test is divided into a total of 27 die rows, the die coordinate set of the rightmost die row includes>。
Dividing the grain columns of the wafer to be tested, determining the column starting grains and the column ending grains of each grain column, and completing the traversal of each grain column, wherein the method specifically comprises the following steps:
according to the X-axis coordinate of each grain column, marking the grain as even columns and odd columns, respectively determining column starting grains and column ending grains of the even columns and the odd columns, and finishing the traversal of each grain column;
wherein, the initial column is the first even column.
The parity of each grain column is distinguished by the parity of the X-axis coordinate value of each grain column, and is respectively expressed as an even number column and an odd number column. Meanwhile, the initial column is an even column and is a first even column, then the first odd column, the second even column, the second odd column, … … and so on in sequence until the marking of all the die columns is completed.
When traversing even columns and odd columns, determining the marked path points needs to consider the testing efficiency of the wafer to be tested. The consideration of the test efficiency of the wafer to be tested includes the number of tests performed on each die of the wafer. Thus, traversal of even columns and odd columns, all considered factors are: and the test of all grains of the wafer to be tested is fully covered, the adhesion between the small balls at the outer edge of the grain boundary in the area of the wafer to be tested and the probe is avoided, the test efficiency is improved, and the like.
Determining a column start grain and a column end grain of the even number column to complete the traversal of each even number column, comprising the following steps:
respectively acquiring each even-numbered row grain coordinate set and the number S of probe points, wherein the even-numbered row a grain coordinate set，/>Y-axis coordinate maximum grain coordinate for even column a grain coordinate set, +.>For the even column a grain coordinate set, the Y-axis coordinate is the grain coordinate of i, +.>The Y-axis coordinate that is the even column a grain coordinate set is the smallest grain coordinate;
taking the maximum crystal grain of the Y-axis coordinate of each even column crystal grain coordinate set as a column starting crystal grain;
the position of the crystal grain of the minimum crystal grain of the Y-axis coordinate of each even column crystal grain coordinate set is covered by the tail point of the probe, and the crystal grain is used as a column termination crystal grain;
collecting the positions of column start grains and column end grains of each even number column;
completing the traversal of each even number column;
the traversal of each even column is completed, specifically expressed as:
analysis based on column termination grainsIs->Determining marked path points from the initial crystal grains, and forming a path sequence set R of probe initial points a Completing all crystal grain traversals of even number columns, R a The concrete steps are as follows:
；
wherein R is a To form a set of path sequences of probe start points at even column a test, k a Taking positive integer, m a Is the largest positive integer corresponding to even column a,。
determining a column start grain and a column end grain of the odd columns to complete the traversal of each odd column, comprising the following steps:
respectively acquiring each odd-numbered column grain coordinate set and the number S of probe points, wherein the odd-numbered column b grain coordinate set，/>Y-axis coordinates maximum grain coordinates for the odd column b grain coordinate set, +.>The Y-axis coordinates of the set of odd columns b of die coordinates are the die coordinates of j,the minimum grain coordinate of the Y-axis coordinate of the grain coordinate set of the odd column b;
covering the position of the minimum crystal grain of the Y-axis coordinate of each odd column crystal grain coordinate set by the tail point of the probe as a column starting crystal grain;
terminating the grains by taking the maximum grain of the Y-axis coordinate of each odd-numbered column grain coordinate set as a column termination grain;
collecting the positions of column start grains and column end grains of each odd column;
completing the traversal of each odd column;
the traversal of each odd column is completed, specifically expressed as:
analysis based on column termination grainsMiddle->From the initial die, determining the marked path points and forming a path sequence set R of probe initial points b Completing all crystal grain traversals of odd columns, R b The concrete steps are as follows:
；
wherein R is b To form a set of path sequences of probe start points, k, during odd column b testing b Taking positive integer, n b Is the largest positive integer corresponding to the odd column b,。
in one embodiment, as shown in FIG. 2, after the X-Y axis coordinate system is established, the coordinate range of the test area is determined fromPlay a role of->The coordinates of all the dies of the wafer to be tested are within the coordinate range of the test area. In addition, the number of probe sites is 6, and 1, 2, 3, 4, 5, and 6 are numbered sequentially from top to bottom, wherein the position of the number 1 is taken as the initial site.
Determining the column start grains and the column end grains of the even columns, and completing the traversal of each even column. Taking the first even columns as an example, the initial crystal grains of the columns of the first even columns are also the initial crystal grains of the test of the whole wafer to be tested by the probe, the X-axis coordinate values of the first even columns are all 0, and the crystal grain coordinate set of the first even columns is specifically expressed as:
in the first even columns, the (0, 20) crystal grains are used as column starting crystal grains, the tail point of the probe covers the crystal grain positions of the Y-axis coordinate minimum crystal grains of each even column crystal grain coordinate set, namely (0, 17), and the column ending crystal grain positions and the crystal grain positions are analyzedIs of a size of (a) and (b),give->Is added to the value of->Is 0. Thus, from the column start die, the marker waypoints are determined and a path order set R of probe start points is formed 1 All grain traversals of even columns are completed, wherein: r is R 1 =[（0，12），（0，17）]。
Taking the second even columns as examples, the X-axis coordinate values of the second even columns are all 2, and the grain coordinate set of the second even columns is specifically expressed as follows:
in the second even-numbered columns, the Y-axis coordinate maximum grain coordinates are (2, 25), the Y-axis coordinate minimum grain coordinates are (2, 7), in the second even-numbered columns, (2, 25) grains are used as column starting grains, and the tail point of the probe covers the grain positions of the Y-axis coordinate minimum grains of each even-numbered column grain coordinate set, namely, (2, 12), by analyzing the column ending grain positions and the column ending grain positionsIs given by the size of +.>Is added to the value of->2. Thus, from the column start die, the marker waypoints are determined and a path order set R of probe start points is formed 1 All grain traversals of even columns are completed, wherein: r is R 2 =[（2，25），（2，19），（2，13），（2，12）]。
Determining the column start grains and the column end grains of the odd columns, and completing the traversal of each odd column. Taking a first odd column as an example, the first odd column is between a first even column and a second even column, the X-axis coordinate values of the first odd column are all 1, and the grain coordinate set of the first odd column is specifically expressed as:
in the first odd column, the grain position of the Y-axis coordinate minimum grain covering each odd column grain coordinate set with the tail point of the probe is the column start grain (1, 14), and the Y-axis coordinate maximum grain of each odd column grain coordinate set is the column end grain (1, 23), by analyzing the column end grain position and the column end grain positionIs given by the size of +.>Is added to the value of->2. Thus, from the column start die, the marker waypoints are determined and a path order set R of probe start points is formed 1 All grain traversals for the odd columns are completed, wherein: r is R 1 =[（1，14），（1，20），（1，23）]。
Taking the second odd columns as examples, the X-axis coordinate values of the second odd columns are all 3, and the grain coordinate set of the second odd columns is specifically expressed as:
in the second odd columns, the positions of the grains covering the smallest Y-axis grains of each odd column grain coordinate set with the tail points of the probes are column-start grains, that is, (3, 11), the grains of each odd column are locatedThe largest grain of the target set Y-axis coordinates is the column-terminated grain, i.e., (3, 26), by analyzing the column-terminated grain location andis given by the size of +.>Is added to the value of->3. Thus, from the column start die, the marker waypoints are determined and a path order set R of probe start points is formed 1 All grain traversals for the odd columns are completed, wherein: r is R 2 =[（3，11），（3，17），（3，23），（3，26）]。
Starting from the initial row, after the crystal grains are traversed, the crystal grains enter adjacent rows from small to large to traverse until the crystal grains of the wafer to be tested are traversed.
In the above embodiment, first, the path sequence set R in the first even number column 1 Traversing, i.e. from (0, 12) to (0, 17), entering adjacent columns in order from small to large, i.e. entering the first odd column, and then sequentially collecting R in the first odd column path 1 The traversal is performed, namely the probe jumps from (0, 17) to (1, 14), then (1, 20) to (1, 23), the traversal of the first odd columns is completed, and so on until the traversal of all the grains of the wafer to be tested is completed.
In the whole wafer test scheme, firstly, a wafer to be tested is determined, and then a proper probe is selected according to the size, the grain distribution and the like of the wafer to be tested. The selection of the probe can take the testing efficiency of the wafer to be tested as an important consideration index. The test efficiency of the wafer to be tested can be measured by the test times (i.e. the contact times) of the probe on each die of the wafer to be tested and the number of the marked path points.
The probe travel path strategy further comprises: based on the contact times of each crystal grain of the wafer to be tested and the probe, optimizing the number of bits of the probe, the method specifically comprises the following steps:
traversing path sequence set R of each even number column and odd number column of wafer to be tested a R is R b ；
Based on analysis of the path sequence set R for each even and odd column a R is R b Respectively obtaining the number of the probes contacted with the same crystal grain onceIs->And the number of contacts of the probe with the same die twice +.>Is->Number of marked waypoints +.>；
Analysis to obtain the contact ratio P Q Path ratio P T And will contact the ratio P Q And a first preset threshold K 1 Path ratio P T And a second preset threshold K 2 Comparing and analyzing to determine whether the probe meets the efficiency requirement, wherein the contact ratio P Q Path ratio P T The concrete steps are as follows:
if P Q ≤K 1 And P is T ≤K 2 The probe meets the efficiency requirement;
otherwise, the probe does not meet the efficiency requirement, and the number of bits of the probe is optimized until the optimized probe meets the efficiency requirement.
As shown in fig. 3, the present invention further provides a wafer testing apparatus, and the method for testing the wafer includes:
the acquisition module is used for determining a reference coordinate system according to a test area of the wafer to be tested, giving out the coordinates of each crystal grain of the wafer to be tested, and determining the initial crystal grain of the probe test according to the coordinate analysis of the boundary crystal grain of the wafer to be tested and the structure of the probe for carrying out the wafer test;
the analysis module is used for giving out a terminated grain of the probe test based on the probe travel path strategy;
and the execution module is used for traversing all the crystal grains of the wafer to be tested from the initial crystal grains to the final crystal grains, wherein the traversal of the probe does not comprise the outer edge of the crystal boundary in the test area of the wafer to be tested, and the test data of each crystal grain is analyzed to realize the test of the wafer to be tested.
The method and the device for testing the wafer provided by the invention at least have the following beneficial effects:
(1) According to the wafer testing mode provided by the invention, the adhesion between the small balls at the outer edge of the grain boundary in the wafer area to be tested and the probes is avoided through optimizing the testing path during testing, and meanwhile, the testing efficiency of the wafer is improved.
(2) The test path strategy provided by the invention can avoid contacting the crystal boundary outer edge pellets of the wafer to be tested, consider the frequency of contacting all crystal grains of the whole wafer to be tested, and improve the efficiency of testing the wafer on the basis of reducing the shutdown rate.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the invention. It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims (10)

1. The wafer testing method is characterized by comprising the following steps:
determining a reference coordinate system according to the test area of the wafer to be tested, and giving out the coordinates of each crystal grain of the wafer to be tested;
according to the coordinate analysis of the boundary crystal grains of the wafer to be tested, the initial crystal grains of the probe test are determined by combining the structure of the probe for the wafer test;
giving out a terminated grain for probe testing based on a probe travel path strategy;
traversing all grains of the wafer to be tested from the initial grains to the final grains by the probe, wherein the traversing of the probe does not comprise the outer edge of the grain boundary in the test area of the wafer to be tested;
and analyzing the test data of each crystal grain to realize the test of the wafer to be tested.
2. The method for testing a wafer according to claim 1, wherein the reference coordinate system is determined according to the test area of the wafer to be tested, and the coordinates of each die of the wafer to be tested are given, specifically comprising the steps of:
taking a preset position at the left lower part of the outer edge of the wafer to be detected as a coordinate origin, and establishing an X-axis and Y-axis two-dimensional coordinate system, wherein the coordinate positions of all crystal grains of the wafer to be detected are positioned in a first quadrant of the X-axis and Y-axis two-dimensional coordinate system;
and giving the coordinates of each crystal grain of the wafer to be tested and the coordinates of the outer edge of the crystal boundary in the test area of the wafer to be tested based on the X-axis and Y-axis two-dimensional coordinate system.
3. The method of claim 1, wherein the boundary die is a die on a boundary of the wafer to be tested, and the outer edge of the boundary die is a virtual die in a test area of the wafer to be tested and at the periphery of the boundary die.
4. The method for testing a wafer according to claim 2, wherein the probe has a vertically elongated structure, and a plurality of points are vertically divided, each point corresponds to a die of the wafer to be tested, a first point of the vertical is a start point of the probe, and a last point of the vertical is a tail point of the probe;
in the probe travel path strategy, the starting point of the probe is taken as a marking path point, and the direction in the process of probe travel is vertically downward along the Y axis.
5. The method of testing a wafer according to claim 4, wherein the method for determining the initial die of the probe test based on the coordinate analysis of the boundary die of the wafer to be tested in combination with the structure of the probe for the wafer test comprises the steps of:
taking the left-most die row of the wafer to be tested as a starting row, and acquiring the coordinates of all boundary dies of the starting row to form a starting row boundary die coordinate set;
based on the initial column boundary grain coordinate set, the number of probe points is compared, and the grain with the largest Y-axis value in the initial column boundary grain coordinate set is taken as the initial grain.
6. The method for testing a wafer as claimed in claim 5, wherein the probe travel path strategy comprises:
forming all grain coordinate sets of the wafer to be tested based on the coordinates of all grains of the wafer to be tested, dividing grain columns of the wafer to be tested according to the X-axis coordinate attribute and the sequence from small to large, determining column starting grains and column ending grains of each grain column, and finishing the traversal of each grain column;
and (5) traversing the adjacent columns in the sequence from small to large until the traversal of all the grains of the wafer to be tested is completed.
7. The method of testing a wafer as set forth in claim 6, wherein dividing the die rows of the wafer to be tested and determining a row start die and a row end die for each die row to complete the traversal of each die row, comprising:
according to the X-axis coordinate of each grain column, marking the grain as even columns and odd columns, respectively determining column starting grains and column ending grains of the even columns and the odd columns, and finishing the traversal of each grain column;
wherein, the initial column is the first even column.
8. The method of claim 7, wherein determining the even columns of column start dies and column end dies to complete the traversal of each even column comprises:
respectively acquiring each even-numbered row grain coordinate set and the number S of probe points, wherein the even-numbered row a grain coordinate set，/>Y-axis coordinate maximum grain coordinate for even column a grain coordinate set, +.>For the even column a grain coordinate set, the Y-axis coordinate is the grain coordinate of i, +.>The Y-axis coordinate that is the even column a grain coordinate set is the smallest grain coordinate;
taking the maximum crystal grain of the Y-axis coordinate of each even column crystal grain coordinate set as a column starting crystal grain;
the position of the crystal grain of the minimum crystal grain of the Y-axis coordinate of each even column crystal grain coordinate set is covered by the tail point of the probe, and the crystal grain is used as a column termination crystal grain;
collecting the positions of column start grains and column end grains of each even number column;
completing the traversal of each even number column;
the traversal of each even column is completed, specifically expressed as:
analysis based on column termination grainsIs->Taking value, starting from the initial crystal grain, determining the marked path pointAnd forming a path sequence set R of probe start points a Completing all crystal grain traversals of even number columns, R a The concrete steps are as follows:
；
wherein R is a To form a set of path sequences of probe start points at even column a test, k a Taking positive integer, m a Is the largest positive integer corresponding to even column a,。
9. the method of claim 7, wherein determining the column start die and the column end die for the odd columns to complete the traversal of each odd column comprises:
respectively acquiring each odd-numbered column grain coordinate set and the number S of probe points, wherein the odd-numbered column b grain coordinate set，/>Y-axis coordinates maximum grain coordinates for the odd column b grain coordinate set, +.>For the odd column b grain coordinate set, the Y-axis coordinate is the grain coordinate of j, +.>The minimum grain coordinate of the Y-axis coordinate of the grain coordinate set of the odd column b;
covering the position of the minimum crystal grain of the Y-axis coordinate of each odd column crystal grain coordinate set by the tail point of the probe as a column starting crystal grain;
terminating the grains by taking the maximum grain of the Y-axis coordinate of each odd-numbered column grain coordinate set as a column termination grain;
collecting the positions of column start grains and column end grains of each odd column;
completing the traversal of each odd column;
the traversal of each odd column is completed, specifically expressed as:
analysis based on column termination grainsMiddle->From the initial die, determining the marked path points and forming a path sequence set R of probe initial points b Completing all crystal grain traversals of odd columns, R b The concrete steps are as follows:
；
wherein R is b To form a set of path sequences of probe start points, k, during odd column b testing b Taking positive integer, n b Is the largest positive integer corresponding to the odd column b,。
10. a wafer testing apparatus, wherein the wafer testing method according to any one of claims 1 to 9 is adopted, comprising:
the acquisition module is used for determining a reference coordinate system according to a test area of the wafer to be tested, giving out the coordinates of each crystal grain of the wafer to be tested, and determining the initial crystal grain of the probe test according to the coordinate analysis of the boundary crystal grain of the wafer to be tested and the structure of the probe for carrying out the wafer test;
the analysis module is used for giving out a terminated grain of the probe test based on the probe travel path strategy;
and the execution module is used for traversing all the crystal grains of the wafer to be tested from the initial crystal grains to the final crystal grains, wherein the traversal of the probe does not comprise the outer edge of the crystal boundary in the test area of the wafer to be tested, and the test data of each crystal grain is analyzed to realize the test of the wafer to be tested.
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