CN116504896A - Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode - Google Patents
Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title abstract description 7
- 239000004065 semiconductor Substances 0.000 claims abstract description 73
- 239000000758 substrate Substances 0.000 claims abstract description 45
- 239000002131 composite material Substances 0.000 claims abstract description 40
- 230000000903 blocking effect Effects 0.000 claims abstract description 26
- 230000001105 regulatory effect Effects 0.000 claims description 10
- 238000000034 method Methods 0.000 claims description 9
- 229910002601 GaN Inorganic materials 0.000 description 48
- 235000012431 wafers Nutrition 0.000 description 36
- 239000011777 magnesium Substances 0.000 description 30
- 230000000694 effects Effects 0.000 description 16
- 239000013078 crystal Substances 0.000 description 13
- 229910002704 AlGaN Inorganic materials 0.000 description 10
- 239000002019 doping agent Substances 0.000 description 9
- 230000004888 barrier function Effects 0.000 description 8
- 230000009286 beneficial effect Effects 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 229910052594 sapphire Inorganic materials 0.000 description 6
- 239000010980 sapphire Substances 0.000 description 6
- 230000004913 activation Effects 0.000 description 5
- 230000000052 comparative effect Effects 0.000 description 5
- 239000000203 mixture Substances 0.000 description 5
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical group [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 4
- 230000006872 improvement Effects 0.000 description 4
- 229910000077 silane Inorganic materials 0.000 description 4
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- 238000003892 spreading Methods 0.000 description 3
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical group [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- UOSXPFXWANTMIZ-UHFFFAOYSA-N cyclopenta-1,3-diene;magnesium Chemical compound [Mg].C1C=CC=C1.C1C=CC=C1 UOSXPFXWANTMIZ-UHFFFAOYSA-N 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000006731 degradation reaction Methods 0.000 description 2
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- 239000012535 impurity Substances 0.000 description 2
- 229910052749 magnesium Inorganic materials 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
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- 238000005121 nitriding Methods 0.000 description 2
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- 230000035882 stress Effects 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
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- 230000008646 thermal stress Effects 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
- H01L33/325—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen characterised by the doping materials
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The invention discloses a light-emitting diode epitaxial wafer, a preparation method thereof and a light-emitting diode, and relates to the technical field of semiconductors. The buffer layer, the undoped GaN layer, the N-type semiconductor layer, the multiple quantum well layer, the electron blocking layer, the P-type semiconductor layer and the composite P-type contact layer are sequentially laminated on the substrate; the composite P-type contact layer comprises a BGaMgN layer, a BMgN layer, a BInMG layer and an InMgN layer which are sequentially stacked, wherein the BGaMgN layer is arranged on the P-type semiconductor layer.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a light-emitting diode epitaxial wafer, a preparation method thereof and a light-emitting diode.
Background
A light emitting diode (LightEmitting Diode, LED) is a semiconductor component. The LED is called a fourth-generation illumination light source or a green light source, has the characteristics of energy conservation, environmental protection, long service life, small volume and the like, and is widely applied to various fields of indication, display, decoration, backlight sources, common illumination, urban night scenes and the like. According to different using functions, the display device can be divided into five categories, namely information display, signal lamps, vehicle lamps, liquid crystal screen backlights and general illumination.
At present, a P-type contact layer is deposited to improve work function difference between an epitaxial layer and an electrode, ohmic contact between the P-type contact layer and the electrode is improved, contact resistance is reduced, working voltage of the light-emitting diode is reduced, and in order to form good ohmic contact with the electrode, the P-type contact layer is usually heavily doped with Mg, however, due to self-compensation effect of Mg, concentration of activated Mg of the P-type contact layer is low, ohmic contact is poor, contact resistance is increased, and in addition, light emitted by the light-emitting diode is easily absorbed due to low forbidden bandwidth of Mg, so that light-emitting efficiency of the light-emitting diode is reduced.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims to provide a light-emitting diode epitaxial wafer, a preparation method thereof and a light-emitting diode, and aims to solve the technical problems that in the prior art, a P-type contact layer is heavily doped with Mg, the contact resistance is high due to low concentration of activated Mg, and the light emitted by the light-emitting diode is easy to absorb, so that the light-emitting efficiency of the light-emitting diode is reduced.
A first aspect of the present invention provides a light emitting diode epitaxial wafer, including a substrate, the light emitting diode epitaxial wafer further including:
the buffer layer, the undoped GaN layer, the N-type semiconductor layer, the multiple quantum well layer, the electron blocking layer, the P-type semiconductor layer and the composite P-type contact layer are sequentially laminated on the substrate;
the composite P-type contact layer comprises a BGaMgN layer, a BMgN layer, a BInMG layer and an InMgN layer which are sequentially stacked, and the BGaMgN layer is arranged on the P-type semiconductor layer.
Compared with the prior art, the invention has the beneficial effects that: the LED epitaxial wafer provided by the invention can effectively reduce contact resistance, improve the light emitting efficiency of the LED and reduce the leakage effect, and comprises: a substrate, a buffer layer, an undoped GaN layer, an N-type semiconductor layer, a multiple quantum well layer, an electron blocking layer, a P-type semiconductor layer and a composite P-type contact layer which are sequentially laminated on the substrate; the composite P-type contact layer comprises a BGaMgN layer, a BMgN layer, a BInMG layer and an InMgN layer which are sequentially stacked, wherein the BGaMgN layer is arranged on the P-type semiconductor layer, the BGaMgN layer can effectively improve the flatness and coverage of an interface between the BGaMgN layer and the P-type semiconductor layer, can effectively improve the current expansion capability, reduce the electric leakage effect of the light emitting diode, the BMgN layer can effectively reflect or scatter light emitted by the multi-quantum well layer, reduce the light emitted by the multi-quantum well layer and be absorbed In the composite P-type contact layer, improve the light emitting capability of the light emitting diode, and can effectively improve the current expansion capability of the composite P-type contact layer as a current expansion bridge joint point, reduce the accumulation effect of current In a three-dimensional coarsening structure of the BMgN layer, and In the InMgN layer can effectively reduce the activation capability of Mg, so that the concentration of active Mg is improved, and thus the concentration of active Mg is well formed with an electrode, the working voltage of the light emitting diode is reduced, the light emitting diode is easily contacted with the light emitting diode is greatly reduced, and the light emitting resistance of the light emitting diode is greatly activated by the light emitting diode is greatly reduced due to the light emitting and the light emitting resistance of the light emitting diode is greatly doped by the light emitting diode.
According to an aspect of the above technical solution, the BGaMgN layer is grown in a two-dimensional structure, and the BMgN layer, the BInMg layer, and the InMgN layer are all grown in a three-dimensional structure.
According to one aspect of the technical scheme, the thickness of the BGaMgN layer is 1nm-50nm, the B component in the BGaMgN layer accounts for 0.01-0.1, and the Ga component accounts for 0.1-0.8.
According to one aspect of the above technical scheme, the thickness of the BMgN layer is 1nm-20nm, and the B component in the BMgN layer accounts for 0.1-0.5.
According to one aspect of the technical scheme, the thickness of the BInMG layer is 1nm-10nm, the proportion of the component B in the BInMG layer is 0.1-0.5, and the proportion of the component in is 0.01-0.1.
According to one aspect of the technical scheme, the thickness of the InMgN layer is 1nm-10nm, and the In component In the InMgN layer accounts for 0.01-0.5.
According to an aspect of the above technical solution, the N-type semiconductor layer is an N-type GaN layer, the electron blocking layer is an AlInGaN layer, and the P-type semiconductor layer is a P-type GaN layer.
The second aspect of the present invention provides a method for preparing a light emitting diode epitaxial wafer, for preparing the light emitting diode epitaxial wafer, the method comprising:
providing a substrate;
sequentially growing a buffer layer, an undoped GaN layer, an N-type semiconductor layer, a multiple quantum well layer, an electron blocking layer and a P-type semiconductor layer on the substrate;
and growing a composite P-type contact layer on the P-type semiconductor layer, wherein the composite P-type contact layer comprises a BGaMgN layer, a BMgN layer, a BInMG layer and an InMgN layer which are sequentially grown.
According to an aspect of the foregoing technical solution, the step of growing the composite P-type contact layer specifically includes:
regulating the temperature to 800-1100 ℃ and the pressure to 50-300 Torr, and regulating the pressure to N 2 /H 2 /NH 3 In the atmosphere, growing a BGaMgN layer on the P-type semiconductor layer in a two-dimensional manner;
maintaining the temperature and atmosphere unchanged, regulating the pressure to 300Torr-600Torr, and three-dimensionally growing a BMgN layer on the BGaMgN layer;
keeping the temperature and the pressure unchanged, and adding N 2 /H 2 Three-dimensionally growing a BInMG layer on the BMgN layer in an atmosphere environment;
keeping the temperature and the pressure unchanged, and adding N 2 /H 2 /NH 3 In an atmosphere environment, three-dimensionally growing an InMgN layer on the BInMG layer;
wherein the N is 2 /H 2 /NH 3 N in atmosphere 2 /H 2 /NH 3 The ratio of (2) is 1: (1-20): (1-10), said N 2 /H 2 N in atmosphere 2 /H 2 The ratio of (2) is 1: (1-20).
A third aspect of the present invention provides a light emitting diode, which includes the light emitting diode epitaxial wafer described above.
Drawings
The foregoing and/or additional aspects and advantages of the invention will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:
fig. 1 is a schematic structural diagram of an led epitaxial wafer according to the present invention;
fig. 2 is a flowchart of a method for manufacturing a light emitting diode epitaxial wafer according to the present invention;
description of the drawings element symbols:
substrate 100, buffer layer 200, undoped GaN layer 300, n-type semiconductor layer 400, multiple quantum well layer 500, electron blocking layer 600, P-type semiconductor layer 700, composite P-type contact layer 800, bgamgn layer 810, bmgn layer 820, binmg layer 830, inmgn layer 840.
Detailed Description
In order to make the objects, features and advantages of the present invention more comprehensible, embodiments accompanied with figures are described in detail below. Several embodiments of the invention are presented in the figures. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "mounted" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," "upper," "lower," and the like are used herein for descriptive purposes only and not to indicate or imply that the apparatus or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore should not be construed as limiting the invention.
In the present invention, unless explicitly stated and limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Referring to fig. 1, an led epitaxial wafer according to the present invention includes a substrate 100, a buffer layer 200, an undoped GaN layer 300, an N-type semiconductor layer 400, a multiple quantum well layer 500, an electron blocking layer 600, a P-type semiconductor layer 700, and a composite P-type contact layer 800 sequentially stacked on the substrate 100.
The substrate 100 is a substrate for epitaxial layer growth, and the commonly used substrate 100 is a sapphire substrate, a silicon carbide substrate, a gallium nitride substrate, or a zinc oxide substrate.
Preferably, the substrate material is sapphire, and the sapphire has the advantages of mature preparation process, low price, easy cleaning and processing, good stability at high temperature and the like, and is widely applied to light emitting diodes.
The substrate 100 is laminated with the buffer layer 200, the buffer layer 200 comprises an AlN layer arranged on the substrate 100 and a GaN layer arranged on the AlN layer, the thickness of the buffer layer 200 is 10nm-50nm, the AlN layer provides a nucleation center which is the same as the orientation of the substrate 100, stress generated by lattice mismatch between GaN and the substrate 100 and thermal stress generated by thermal expansion coefficient mismatch are released, a flat nucleation surface is provided for further growth, and the contact angle of nucleation growth is reduced to enable island-shaped GaN grains to be connected into a plane in a smaller thickness, so that the island-shaped GaN grains are converted into two-dimensional epitaxial growth.
The buffer layer 200 is provided with an undoped GaN layer 300 having a thickness of 2 μm to 3 μm, and the crystal quality of the undoped GaN layer 300 is improved by reducing line defects and by releasing stress through stacking faults as the thickness increases. For the commercial led epitaxial wafer, the thickness is usually about 2 μm-3 μm, which is relatively optimized, so that not only is the production cost saved, but also the crystal quality of the undoped GaN layer 300 can be improved.
The undoped GaN layer 300 is provided with an N-type semiconductor layer 400, the N-type semiconductor layer 400 is an N-type GaN layer, the N-type GaN layer provides electrons for the multiple quantum well layer 500, so that the electrons and holes are radiated and compounded in the multiple quantum well layer 500 to realize the luminous effect of the LED, the thickness of the LED is 2-3 mu m, the doping agent of the N-type GaN layer is silane, and the doping concentration is 1 multiplied by 10 19 cm -3 -5×10 19 cm -3 The N-type GaN layer can reduce the current concentration effect and improve the photoelectric efficiency of the light-emitting diode by doping the doping agent.
The multi-quantum well layer 500 is laminated on the N-type semiconductor layer 400, the multi-quantum well layer 500 is an electron hole recombination region, the multi-quantum well layer 500 comprises InGaN quantum well layers and AlGaN quantum barrier layers which are alternately laminated, the stacking period number is 5-20, the growth temperature of the InGaN quantum well layers is 790-810 ℃, the thickness is 2-5 nm, the growth pressure is 50Torr-300Torr, the growth temperature of the AlGaN quantum barrier layers is 800-900 ℃, the thickness is 5-15 nm, the growth pressure is 50Torr-300Torr, and the Al composition is 0.01-0.1.
The electron blocking layer 600 is disposed on the multiple quantum well layer 500 for limiting electron overflow, and the electron blocking layer 600 can effectively prevent electrons of the N-type semiconductor layer 400 from overflowing to the P-type semiconductor layer 700 due to the fact that the electron migration rate is faster than the hole migration rate, so as to prevent the electrons from non-radiative recombination between the P-type semiconductor layer 700 and the holes, and reduce the light emitting efficiency of the light emitting diode, and the electron blocking layer 600 is an AlInGaN layer with a thickness of 10nm-40nm, wherein the composition ratio of Al is 0.01-0.1, and the composition ratio of in is 0.01-0.2.
A P-type semiconductor layer 700 is laminated on the electron blocking layer 600, the P-type semiconductor layer 700 is a P-type GaN layer, the P-type GaN layer provides holes for the multiple quantum well layer 500, so that electrons and holes are radiated and combined in the multiple quantum well layer 500 to achieve the luminous effect of the light emitting diode, the thickness of the P-type GaN layer is 10nm-50nm, the doping agent is magnesium, and the doping concentration is 1 multiplied by 10 19 cm -3 -1×10 21 cm -3 。
A composite P-type contact layer 800 is stacked on the P-type semiconductor layer 700, and the composite P-type contact layer 800 includes a BGaMgN layer 810, a BMgN layer 820, a BInMg layer 830, and an InMgN layer 840, which are stacked in this order. The BGaMgN layer 810, the BMgN layer 820, the BInMg layer 830, and the InMgN layer 840 in the composite P-type contact layer 800 are all Mg doped, and by doping Mg, ohmic contact is improved and contact resistance is reduced.
Specifically, BGaMgN layer 810 is disposed over P-type semiconductor layer 700. The BGaMgN layer 810 grows in a two-dimensional structure, grows on the P-type semiconductor layer 700, forms a two-dimensional leveling film on the P-type semiconductor layer 700, can effectively improve the flatness and coverage of an interface, can effectively improve the current spreading capability, reduces the leakage effect of a light emitting diode, and in addition, the two-dimensional leveling film of the BGaMgN layer 810 can reduce the contact angle of the BMgN layer 820 growing on the BGaMgN layer 810, is beneficial to the growth of the BMgN layer 820, relieves lattice mismatch of the BMgN layer 820 and the BGaMgN layer 810, improves the crystal quality, avoids the three-dimensional coarsening structure growth of the BGaMgN layer 810, leads dislocation generated by the three-dimensional structure to extend into the BMgN layer 820, and leads to the crystal quality of the BMgN layer 820 to be reduced.
Preferably, the thickness of the BGaMgN layer 810 is 1nm to 50nm, the B component ratio in the BGaMgN layer 810 is 0.01 to 0.1, and the Ga component ratio is 0.1 to 0.8. When the thickness of the BGaMgN layer 810 is too thick, part of the light emitted by the light emitting diode will be absorbed due to Mg in the BGaMgN layer 810, resulting in a decrease in the light emitting efficiency of the light emitting diode; when the thickness of the BGaMgN layer 810 is too thin, the flatness and coverage rate of the interface are limited, and there is a leakage effect. In addition, the B atoms and Ga atoms in BGaMgN layer 810 are beneficial to alleviating lattice mismatch between composite P-type contact layer 800 and P-type semiconductor layer 700, and at the same time, the B atoms can effectively fill the vacancies of dislocations, reducing the occurrence of dislocations. Therefore, by the distribution and arrangement of the B component and the Ga component in the BGaMgN layer 810, lattice mismatch between the composite P-type contact layer 800 and the P-type semiconductor layer 700 can be effectively alleviated, dislocation generation can be reduced, and flatness and coverage of the interface can be improved.
In addition, BMgN layer 820, BInMg layer 830, and InMgN layer 840 are all grown in three-dimensional structures. The BMgN layer 820 is grown in a three-dimensional coarsening manner, and can effectively reflect or scatter light emitted by the multiple quantum well layer 500, so that the light emitted by the multiple quantum well layer 500 is reduced to be absorbed in the composite P-type contact layer 800, and the light emitting capability of the light emitting diode is improved.
Preferably, the thickness of the BMgN layer 820 is 1nm to 20nm, and the B component ratio in the BMgN layer 820 is 0.1 to 0.5. When the thickness of the BMgN layer 820 is too thick, the roughness of the three-dimensional structure of the BMgN layer 820 is too large, which is not beneficial to the growth of the subsequent BInMg layer 830, the effect of improving the accumulation is limited, and the performance of the light emitting diode is limited; when the thickness of the BMgN layer 820 is too thin, part of the light emitted from the multiple quantum well layer 500 is absorbed in the P-type contact layer 800, and the light emitting capability of the light emitting diode is reduced. When the B component in the BMgN layer 820 is too low, the lattice mismatch between the composite P-type contact layer 800 and the P-type semiconductor layer 700 is large, and the crystal quality is degraded, resulting in a decrease in the light emitting efficiency of the light emitting diode; when the B component in the BMgN layer 820 is too high, the Mg doping concentration is too low, resulting in poor ohmic contact, increased contact resistance, and reduced light extraction efficiency of the light emitting diode.
The BInMG layer 830 with a nano cluster structure is formed by three-dimensional growth of the BMgN layer 820, so that the current expansion capability is further improved, and the BInMG layer 830 can be used as a current expansion bridging point due to high conductivity, so that the current expansion capability of the composite P-type contact layer 800 is effectively improved, and the accumulation effect of current in the three-dimensional coarsening structure of the BMgN layer 820 is reduced.
Preferably, the thickness of the BInMG layer 830 is 1nm to 10nm, the B component ratio in the BInMG layer 830 is 0.1 to 0.5, and the in component ratio is 0.01 to 0.1. When the thickness of the BInMg layer 830 is too thin, the current spreading capability is improved to a limited extent; when the thickness of the BInMg layer 830 is too thick, the roughness is large, which is unfavorable for the growth of the subsequent InMgN layer 840, resulting in poor crystal quality of the subsequent InMgN layer 840. When the B component and In component of the BInMg layer 830 are too high, on the one hand, lattice mismatch between the BInMg layer 830 and the BMgN layer 820 increases, and on the other hand, mg doping concentration is too low, concentration of activated Mg is too low, resulting In poor ohmic contact, increased contact resistance, and reduced light extraction efficiency of the light emitting diode; when the B component and In component of the BInMg layer 830 are too low, the activation energy of Mg is limited to be reduced, the concentration of Mg to be activated is limited to be increased, and the contact resistance is limited to be reduced.
In addition, the InMgN layer 840 is grown on the BInMG layer 830 In three dimensions, the In the InMgN layer 840 can effectively reduce the activation energy of Mg, and improve the concentration of activated Mg, so that good ohmic contact with the electrode is formed, and the working voltage of the light emitting diode is reduced.
Preferably, the thickness of the InMgN layer 840 is 1nm to 10nm, and the In component of the InMgN layer 840 is 0.01 to 0.5. When the thickness of the InMgN layer 840 is too thin, the ohmic resistance is reduced to a limited extent, and when the thickness of the InMgN layer 840 is too thick, the roughness is large, which is not beneficial to the connection contact of the subsequent electrodes; when the In component of the InMgN layer 840 is too low, the activation energy of Mg is limited and the concentration of activated Mg is limited; when the In component In the InMgN layer 840 is too high, on one hand, lattice mismatch with the BInMg layer 830 is too large, resulting In degradation of crystal quality of InMgN, on the other hand, mg doping concentration is too low, concentration of activated Mg is too low, resulting In poor ohmic contact, increased contact resistance, and degradation of light emitting efficiency of the light emitting diode.
Therefore, the composite P-type contact layer 800 in the application can effectively reduce the contact resistance between the epitaxial layer and the electrode of the light emitting diode, improve the light emitting efficiency of the light emitting diode, reduce the leakage current of the light emitting diode, and improve the light emitting efficiency of the light emitting diode.
In addition, referring to fig. 2, a method for preparing a light emitting diode epitaxial wafer is further provided, and the method includes steps S10-S12:
step S10, providing a substrate;
wherein the substrate material is sapphire.
Step S11, a buffer layer, an undoped GaN layer, an N-type semiconductor layer, a multiple quantum well layer, an electron blocking layer and a P-type semiconductor layer are sequentially grown on the substrate;
specifically, the buffer layer comprises an AlN layer arranged on the substrate and a GaN layer arranged on the AlN layer, and the thickness of the buffer layer is 10nm-50nm.
Placing the substrate on which the AlN layer has been deposited into a reaction chamber, setting the temperature to 1000-1200 ℃, and at H 2 And (3) processing for 1-10 min to remove impurities on the surface, and nitriding the substrate to improve the crystal quality of the buffer layer, thereby effectively improving the crystal quality of the epitaxial layer which is grown subsequently.
The temperature is set to 1050-1200 deg.c and the pressure is set to 100-600 Torr, and undoped GaN layer of thickness 2-3 μm is grown on the buffer layer.
Setting the temperature to 1050-1200 deg.c, the pressure to 100-600 Torr, the doping agent to silane and the doping concentration to 1X 10 19 cm -3 -5×10 19 cm -3 An N-type GaN layer having a thickness of 2 μm to 3 μm is grown on the undoped GaN layer as an N-type semiconductor layer.
And growing a multiple quantum well layer on the N-type semiconductor layer, wherein the multiple quantum well layer comprises InGaN quantum well layers and AlGaN quantum barrier layers which are alternately stacked, and the stacking period number is 5-20, wherein the growth temperature of the InGaN quantum well layer is 790-810 ℃, the thickness of the InGaN quantum well layer is 2-5 nm, the growth pressure is 50Torr-300Torr, the growth temperature of the AlGaN quantum barrier layer is 800-900 ℃, the thickness of the AlGaN quantum well layer is 5-15 nm, the growth pressure is 50Torr-300Torr, and the Al component is 0.01-0.1.
Setting the temperature to 900-1000 ℃, setting the pressure to 100Torr-300Torr, and growing an electron blocking layer with the thickness of 10nm-40nm on the multi-quantum well layer, wherein the component ratio of Al is 0.01-0.1, and the component ratio of in is 0.01-0.2.
Setting the temperature to 900-1050 deg.c, the pressure to 100-600 Torr, the doping agent to be magnesium dicyclopentadiene and the doping concentration to be 1X 10 19 cm -3 -1×10 21 cm -3 And growing a P-type GaN layer with the thickness of 10-50 nm on the electron blocking layer to serve as a P-type semiconductor layer.
And step S12, growing a composite P-type contact layer on the P-type semiconductor layer, wherein the composite P-type contact layer comprises a BGaMgN layer, a BMgN layer, a BInMG layer and an InMgN layer which are sequentially grown.
Regulating the temperature to 800-1100 ℃ and the pressure to 50-300 Torr, and regulating the pressure to N 2 /H 2 /NH 3 In the atmosphere, growing a BGaMgN layer on the P-type semiconductor layer in a two-dimensional manner;
maintaining the temperature and atmosphere unchanged, regulating the pressure to 300Torr-600Torr, and three-dimensionally growing a BMgN layer on the BGaMgN layer;
keeping the temperature and the pressure unchanged, and adding N 2 /H 2 Three-dimensionally growing a BInMG layer on the BMgN layer in an atmosphere environment;
keeping the temperature and the pressure unchanged, and adding N 2 /H 2 /NH 3 In an atmosphere environment, three-dimensionally growing an InMgN layer on the BInMG layer;
wherein the N is 2 /H 2 /NH 3 N in atmosphere 2 /H 2 /NH 3 The ratio of (2) is 1: (1-20): (1-10), said N 2 /H 2 N in atmosphere 2 /H 2 The ratio of (2) is 1: (1-20).
It should be noted that, the growth pressure of the BGaMgN layer is lower than that of the BMgN layer, the BInMg layer and the InMgN layer, the growth pressure is low, which is favorable for two-dimensional growth of the BGaMgN layer, improves the flatness and coverage of the BGaMgN layer, is favorable for growth of the subsequent BMgN layer, BInMg layer and InMgN layer, and improves the crystal quality of the composite P-type contact layer.
In addition, the invention also provides a light-emitting diode, and the light-emitting diode comprises the light-emitting diode epitaxial wafer.
The invention is further illustrated by the following examples:
example 1
The first embodiment of the invention provides a light-emitting diode epitaxial wafer, which comprises a substrate, a buffer layer, an undoped GaN layer, an N-type semiconductor layer, a multiple quantum well layer, an electron blocking layer, a P-type semiconductor layer and a composite P-type contact layer, wherein the buffer layer, the undoped GaN layer, the N-type semiconductor layer, the multiple quantum well layer, the electron blocking layer, the P-type semiconductor layer and the composite P-type contact layer are sequentially stacked on the substrate.
Wherein the substrate is a substrate for epitaxial layer growth, preferably the substrate material is sapphire.
The substrate is laminated with a buffer layer, the buffer layer comprises an AlN layer arranged on the substrate and a GaN layer arranged on the AlN layer, and the thickness of the buffer layer is 15nm.
The buffer layer is provided with an undoped GaN layer, and the thickness of the undoped GaN layer is 2-3 mu m.
The undoped GaN layer is provided with an N-type semiconductor layer, the N-type semiconductor layer is an N-type GaN layer, the N-type GaN layer provides electrons for the multi-quantum well layer so that the electrons and holes are radiated and compounded in the multi-quantum well layer to achieve the luminous effect of the light-emitting diode, the thickness of the N-type GaN layer is 2-3 mu m, the doping agent of the N-type GaN layer is silane, and the doping concentration is 1 multiplied by 10 19 cm -3 -5×10 19 cm -3 。
And stacking a multi-quantum well layer on the N-type semiconductor layer, wherein the multi-quantum well layer is an electron hole recombination region, the multi-quantum well layer comprises InGaN quantum well layers and AlGaN quantum barrier layers which are alternately stacked, the stacking period number is 10, the thickness of the InGaN quantum well layer is 3.5nm, the thickness of the AlGaN quantum barrier layer is 9.8nm, and the Al component is 0.05.
An electron blocking layer is arranged on the multi-quantum well layer and used for limiting electron overflow, the electron blocking layer is an AlInGaN layer, the thickness of the electron blocking layer is 15nm, wherein the component ratio of Al is 0.05, and the component ratio of in is 0.01.
A P-type semiconductor layer is laminated on the electron blocking layer, the P-type semiconductor layer is a P-type GaN layer, the P-type GaN layer provides holes for the multi-quantum well layer so that electrons and holes are radiated and compounded in the multi-quantum well layer to achieve the luminous effect of the light-emitting diode, the thickness of the P-type GaN layer is 15nm, the doping agent is magnesium, and the doping concentration is 2 multiplied by 10 20 cm -3 。
And a composite P-type contact layer is laminated on the P-type semiconductor layer, and comprises a BGaMgN layer, a BMgN layer, a BInMG layer and an InMgN layer which are laminated in sequence. The BGaMgN layer, the BMgN layer, the BInMG layer and the InMgN layer in the composite P-type contact layer are doped with Mg, and ohmic contact is improved through the doped Mg, so that contact resistance is reduced.
Specifically, the BGaMgN layer is disposed on the P-type semiconductor layer. Preferably, the thickness of the BGaMgN layer is 15nm, the B component ratio in the BGaMgN layer is 0.05, and the Ga component ratio is 0.7.
In addition, the BMgN layer, the BInMG layer and the InMgN layer are all grown in a three-dimensional structure. Preferably, the thickness of the BMgN layer is 10nm, and the B component ratio in the BMgN layer is 0.3.
Preferably, the thickness of the BInMg layer is 5nm, the B component of the BInMg layer is 0.3 and the in component is 0.05.
Preferably, the thickness of the InMgN layer is 5nm, and the In component In the InMgN layer is 0.1.
Correspondingly, the preparation method of the light-emitting diode epitaxial wafer in the embodiment comprises the following steps S10-S12:
step S10, providing a substrate;
wherein the substrate material is sapphire.
Step S11, a buffer layer, an undoped GaN layer, an N-type semiconductor layer, a multiple quantum well layer, an electron blocking layer and a P-type semiconductor layer are sequentially grown on the substrate;
specifically, the buffer layer includes an AlN layer provided on the substrate, and a GaN layer provided on the AlN layer.
Placing the substrate on which the AlN layer has been deposited into a reaction chamber, setting the temperature to 1000-1200 ℃, and at H 2 And (3) processing for 1-10 min to remove impurities on the surface, and nitriding the substrate to improve the crystal quality of the buffer layer, thereby effectively improving the crystal quality of the epitaxial layer which is grown subsequently.
The temperature was set to 1100 c and the pressure was set to 150Torr, and an undoped GaN layer was grown on the buffer layer to a thickness of 2 μm-3 μm.
The temperature was set at 1120℃and the pressure was set at 100Torr, the dopant was silane, and the doping concentration was 2.5X10 19 cm -3 An N-type GaN layer having a thickness of 2 μm to 3 μm is grown on the undoped GaN layer as an N-type semiconductor layer.
And growing a multi-quantum well layer on the N-type semiconductor layer, wherein the multi-quantum well layer comprises InGaN quantum well layers and AlGaN quantum barrier layers which are alternately stacked, the stacking period number is 10, the growth temperature of the InGaN quantum well layer is 795 ℃, the thickness of the InGaN quantum well layer is 3.5nm, the growth pressure is 200Torr, the growth temperature of the AlGaN quantum barrier layer is 855 ℃, the thickness of the AlGaN quantum well layer is 9.8nm, and the growth pressure is 200Torr, and the Al component is 0.05.
An electron blocking layer having a thickness of 15nm was grown on the multiple quantum well layer by setting the temperature to 965℃and the pressure to 200Torr, wherein the composition ratio of Al was 0.05 and the composition ratio of in was 0.01.
Setting the temperature to 985 deg.C, the pressure to 200Torr, the doping agent to be magnesium dicyclopentadiene, the doping concentration to be 2×10 20 cm -3 A P-type GaN layer having a thickness of 15nm was grown on the electron blocking layer as a P-type semiconductor layer.
And step S12, growing a composite P-type contact layer on the P-type semiconductor layer, wherein the composite P-type contact layer comprises a BGaMgN layer, a BMgN layer, a BInMG layer and an InMgN layer which are sequentially grown.
Adjusting the temperature to 900 ℃, the pressure to 150Torr, and the temperature is equal to N 2 /H 2 /NH 3 In the atmosphere, growing a BGaMgN layer on the P-type semiconductor layer in a two-dimensional manner;
maintaining the temperature and atmosphere unchanged, regulating the pressure to 400Torr, and three-dimensionally growing a BMgN layer on the BGaMgN layer;
keeping the temperature and the pressure unchanged, and adding N 2 /H 2 Three-dimensionally growing a BInMG layer on the BMgN layer in an atmosphere environment;
keeping the temperature and the pressure unchanged, and adding N 2 /H 2 /NH 3 In an atmosphere environment, three-dimensionally growing an InMgN layer on the BInMG layer;
wherein the N is 2 /H 2 /NH 3 N in atmosphere 2 /H 2 /NH 3 The ratio of (2) is 1:10:5, said N 2 /H 2 N in atmosphere 2 /H 2 The ratio of (2) is 1:5.
example two
The light emitting diode epitaxial wafer provided by the second embodiment of the present invention is different from the light emitting diode epitaxial wafer in the first embodiment in that:
the thickness of the BGaMgN layer was 25nm and the thickness of the BMgN layer was 15nm.
Example III
The light emitting diode epitaxial wafer provided by the third embodiment of the present invention is different from the light emitting diode epitaxial wafer in the first embodiment in that:
the thickness of the BGaMgN layer was 10nm and the thickness of the BMgN layer was 5nm.
Example IV
The light emitting diode epitaxial wafer provided by the fourth embodiment of the present invention is different from the light emitting diode epitaxial wafer in the first embodiment in that:
the thickness of the BInMG layer is 7nm, and the thickness of the InMgN layer is 7nm.
Example five
The light emitting diode epitaxial wafer provided in the fifth embodiment of the present invention is different from the light emitting diode epitaxial wafer in the first embodiment in that:
the thickness of the BInMG layer is 3nm, and the thickness of the InMgN layer is 3nm.
Example six
The light emitting diode epitaxial wafer provided in the sixth embodiment of the present invention is different from the light emitting diode epitaxial wafer in the first embodiment in that:
the B component in the BGaMgN layer accounts for 0.03, the Ga component accounts for 0.6, and the B component in the BMgN layer accounts for 0.4.
Example seven
The light emitting diode epitaxial wafer provided by the seventh embodiment of the present invention is different from the light emitting diode epitaxial wafer in the first embodiment in that:
the B component accounts for 0.07 and the Ga component accounts for 0.7 in the BGaMgN layer.
Example eight
The light emitting diode epitaxial wafer provided in the eighth embodiment of the present invention is different from the light emitting diode epitaxial wafer in the first embodiment in that:
the B component In the BInMg layer had a ratio of 0.4, the In component had a ratio of 0.07, and the In component In the inmgn layer had a ratio of 0.3.
Example nine
The light emitting diode epitaxial wafer provided by the ninth embodiment of the present invention is different from the light emitting diode epitaxial wafer in the first embodiment in that:
the B component In the BInMg layer was 0.2, the In component was 0.03, and the In component In the inmgn layer was 0.05.
Comparative example one
The light emitting diode epitaxial wafer provided by the first comparative example of the present invention is different from the light emitting diode epitaxial wafer in the first embodiment in that:
the composite P-type contact layer is a GaMgN layer.
Referring to Table 1 below, the parameters corresponding to the above-mentioned examples one to nine and comparative example one of the present invention are shown.
TABLE 1
The epitaxial wafers of examples one to nine and comparative example one were prepared under the same process conditions to obtain 10 mil×24 mil chips, and 300 LED chips were extracted and tested for performance at 120 mA/60 mA current.
As can be seen from the data of the first to ninth embodiments and the first comparative example, by providing the composite P-type contact layer, the contact resistance between the epitaxial layer and the electrode of the light emitting diode can be effectively reduced, the light emitting efficiency of the light emitting diode can be improved, the leakage of the light emitting diode can be reduced, and the light emitting efficiency of the light emitting diode can be improved.
As can be seen from the data of the first to third embodiments, when the thicknesses of the BGaMgN layer and the BMgN layer are too thick, the BGaMgN layer has a strong light absorption effect and the BMgN layer has a large roughness, which will limit the performance improvement of the light emitting diode; when the thicknesses of the BGaMgN layer and the BMgN layer are too thin, the performance improvement of the light emitting diode will be limited due to the poor flatness of the BGaMgN layer and the poor reflection or scattering effect of the light source of the BMgN layer.
As can be seen from the data of the first, fourth and fifth embodiments, when the thicknesses of the BInMg layer and the InMgN layer are too thick, the roughness is large, which is not beneficial to the contact of the subsequent electrodes, resulting in limited improvement of the performance of the light emitting diode; when the thicknesses of the BInMg layer and the InMgN layer are too thin, the current spreading capability of the BInMg layer is improved to a limited extent and the ohmic resistance of the InMgN layer is reduced to a limited extent, which results in a limited improvement in the performance of the light emitting diode.
As can be seen from the data of the first embodiment, the sixth embodiment and the seventh embodiment, when the B component and the Ga component in the BGaMgN layer and the B component in the BMgN layer are too low, the lattice mismatch between the composite P-type contact layer and the P-type semiconductor layer is larger, the crystal quality is reduced, the flatness and the coverage rate of the interface are improved to a limited extent, and the leakage effect is generated, so that the luminous efficiency of the light emitting diode is reduced; when the B component and the Ga component in the BGaMgN layer and the B component in the BMgN layer are too high, the Mg doping concentration is too low, so that the ohmic contact is poor, the contact resistance is increased, and the light emitting efficiency of the light emitting diode is reduced.
As can be seen from the data of the first, eighth and ninth embodiments, when the B and In components In the BInMg layer and the In component In the InMgN layer are too low, the activation energy of Mg is limited, the concentration of Mg to be activated is limited, and the contact resistance is limited; when the B component and the In component In the BInMG layer and the In component In the InMgN layer are too high, the doping concentration of Mg is too low, the concentration of activated Mg is too low, the ohmic contact is poor, the contact resistance is large, and the light emitting efficiency of the light emitting diode is reduced.
In conclusion, by arranging the composite P-type contact layer, the contact resistance between the epitaxial layer and the electrode of the light-emitting diode can be effectively reduced, the light-emitting efficiency of the light-emitting diode is improved, the leakage of the light-emitting diode is reduced, and the light-emitting efficiency of the light-emitting diode is improved.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing examples illustrate only a few embodiments of the invention, and are described in detail, but are not to be construed as limiting the scope of the invention. It should be noted that it is possible for those skilled in the art to make several variations and modifications without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (10)
1. The light-emitting diode epitaxial wafer comprises a substrate and is characterized in that the light-emitting diode epitaxial wafer further comprises:
the buffer layer, the undoped GaN layer, the N-type semiconductor layer, the multiple quantum well layer, the electron blocking layer, the P-type semiconductor layer and the composite P-type contact layer are sequentially laminated on the substrate;
the composite P-type contact layer comprises a BGaMgN layer, a BMgN layer, a BInMG layer and an InMgN layer which are sequentially stacked, and the BGaMgN layer is arranged on the P-type semiconductor layer.
2. The light emitting diode epitaxial wafer of claim 1, wherein the BGaMgN layer is grown in a two-dimensional structure, and the BMgN layer, the BInMg layer, and the InMgN layer are all grown in a three-dimensional structure.
3. The light-emitting diode epitaxial wafer according to claim 1, wherein the thickness of the BGaMgN layer is 1nm to 50nm, the proportion of the B component in the BGaMgN layer is 0.01 to 0.1, and the proportion of the ga component is 0.1 to 0.8.
4. The light-emitting diode epitaxial wafer of claim 1, wherein the thickness of the BMgN layer is 1nm-20nm, and the proportion of the B component in the BMgN layer is 0.1-0.5.
5. The light-emitting diode epitaxial wafer of claim 1, wherein the thickness of the BInMg layer is 1nm-10nm, the proportion of the B component in the BInMg layer is 0.1-0.5, and the proportion of the in component is 0.01-0.1.
6. The light-emitting diode epitaxial wafer of claim 1, wherein the thickness of the InMgN layer is 1nm-10nm, and the In component In the InMgN layer is 0.01-0.5.
7. The light emitting diode epitaxial wafer of claim 1, wherein the N-type semiconductor layer is an N-type GaN layer, the electron blocking layer is an AlInGaN layer, and the P-type semiconductor layer is a P-type GaN layer.
8. A method for preparing a light emitting diode epitaxial wafer, which is used for preparing the light emitting diode epitaxial wafer according to any one of claims 1 to 7, the method comprising:
providing a substrate;
sequentially growing a buffer layer, an undoped GaN layer, an N-type semiconductor layer, a multiple quantum well layer, an electron blocking layer and a P-type semiconductor layer on the substrate;
and growing a composite P-type contact layer on the P-type semiconductor layer, wherein the composite P-type contact layer comprises a BGaMgN layer, a BMgN layer, a BInMG layer and an InMgN layer which are sequentially grown.
9. The method for preparing a light emitting diode epitaxial wafer according to claim 8, wherein the step of growing the composite P-type contact layer comprises the following steps:
regulating the temperature to 800-1100 ℃ and the pressure to 50-300 Torr, and regulating the pressure to N 2 /H 2 /NH 3 In the atmosphere, growing a BGaMgN layer on the P-type semiconductor layer in a two-dimensional manner;
maintaining the temperature and atmosphere unchanged, regulating the pressure to 300Torr-600Torr, and three-dimensionally growing a BMgN layer on the BGaMgN layer;
keeping the temperature and the pressure unchanged, and adding N 2 /H 2 Three-dimensionally growing a BInMG layer on the BMgN layer in an atmosphere environment;
keeping the temperature and the pressure unchanged, and adding N 2 /H 2 /NH 3 In an atmosphere environment, three-dimensionally growing an InMgN layer on the BInMG layer;
wherein the N is 2 /H 2 /NH 3 N in atmosphere 2 /H 2 /NH 3 The ratio of (2) is 1: (1-20): (1-10), said N 2 /H 2 N in atmosphere 2 /H 2 The ratio of (2) is 1: (1-20).
10. A light emitting diode, characterized in that the light emitting diode comprises the light emitting diode epitaxial wafer according to any one of claims 1 to 7.
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| CN117253950A (en) * | 2023-11-14 | 2023-12-19 | 江西兆驰半导体有限公司 | Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode |
| CN117253950B (en) * | 2023-11-14 | 2024-02-20 | 江西兆驰半导体有限公司 | Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode |
| CN117393670A (en) * | 2023-12-08 | 2024-01-12 | 江西兆驰半导体有限公司 | LED epitaxial wafer, preparation method thereof and LED |
| CN117637953A (en) * | 2024-01-25 | 2024-03-01 | 江西兆驰半导体有限公司 | LED epitaxial wafer, preparation method thereof and LED chip |
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