CN116471737A - Point screen circuit board and point screen system - Google Patents

Point screen circuit board and point screen system Download PDF

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Publication number
CN116471737A
CN116471737A CN202310434066.0A CN202310434066A CN116471737A CN 116471737 A CN116471737 A CN 116471737A CN 202310434066 A CN202310434066 A CN 202310434066A CN 116471737 A CN116471737 A CN 116471737A
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CN
China
Prior art keywords
signal
phy
circuit board
dot
screen
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202310434066.0A
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Chinese (zh)
Inventor
汪伶俐
江吉龙
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hubei Changjiang New Display Industry Innovation Center Co Ltd
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Hubei Changjiang New Display Industry Innovation Center Co Ltd
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Application filed by Hubei Changjiang New Display Industry Innovation Center Co Ltd filed Critical Hubei Changjiang New Display Industry Innovation Center Co Ltd
Priority to CN202310434066.0A priority Critical patent/CN116471737A/en
Publication of CN116471737A publication Critical patent/CN116471737A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0224Patterned shielding planes, ground planes or power planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/0245Lay-out of balanced signal pairs, e.g. differential lines or twisted lines
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/025Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

The invention discloses a dot screen circuit board and a dot screen system. The dot screen circuit board comprises a signal generating chip and a plurality of signal wires, wherein the signal generating chip is used for generating a C-PHY signal or a D-PHY signal; the signal wiring is used for electrically connecting the signal generating chip and the external display screen. The signal wiring comprises a C-PHY signal wiring and a D-PHY signal wiring, and the C-PHY signal wiring is used for receiving the C-PHY signal; the D-PHY signal trace is for receiving a D-PHY signal. Wherein at least part of the D-PHY signal traces and at least part of the C-PHY signal traces are multiplexed with each other. Through the scheme, the dot screen circuit board can respectively transmit different types of dot screen signals under different dot screen requirements. When the screen is clicked by utilizing different screen-clicking signals, the screen-clicking circuit board is not required to be replaced, so that the screen-clicking testing efficiency is improved, the control difficulty of the screen-clicking circuit board is reduced, and unified management of the screen-clicking jig is facilitated.

Description

Point screen circuit board and point screen system
Technical Field
The invention relates to the technical field of signal transmission, in particular to a dot screen circuit board and a dot screen system.
Background
MIPI (Mobile Industry Processor Interface) is a mobile industry processor interface, and is an open standard and a specification which are initiated by the MIPI alliance and set for a mobile application processor, and aims to standardize interfaces inside a mobile phone, such as a camera, a display screen interface, a radio frequency/baseband interface, and the like, so that the complexity of the design of the mobile phone is reduced and the design flexibility is increased.
The MIPI signals for signal transmission of display and camera shooting generally comprise a C-PHY signal and a D-PHY signal, and one of the signals is selected for dot screen according to actual requirements. At present, when the C-PHY display screen and the D-PHY display screen are subjected to screen-pointing test, the screen-pointing jig plate needs to be replaced, and the test flow is complex.
Disclosure of Invention
In view of the above, the invention provides a dot screen circuit board and a dot screen system, so as to provide a dot screen circuit board compatible with C-PHY signal and D-PHY signal transmission, and improve the dot screen test efficiency.
In a first aspect, the present invention provides a dot screen circuit board, comprising:
the signal generating chip is used for generating a C-PHY signal or a D-PHY signal; the C-PHY signal and the D-PHY signal are used for transmitting different types of dot screen signals;
the signal wires are used for electrically connecting the signal generating chip and the external display screen;
the signal wiring comprises a C-PHY signal wiring and a D-PHY signal wiring, and the C-PHY signal wiring is used for receiving the C-PHY signal and transmitting the C-PHY signal to the external display screen; the D-PHY signal wiring is used for receiving the D-PHY signal and transmitting the D-PHY signal to the external display screen;
wherein at least a portion of the D-PHY signal traces and at least a portion of the C-PHY signal traces are multiplexed with each other.
In a second aspect, the present invention provides a dot screen system, including the dot screen circuit board according to the first aspect of the present invention, where the dot screen system further includes a control module, where the control module is electrically connected to the signal generating chip, and the control module is configured to control the signal generating chip to generate a C-PHY signal or a D-PHY signal.
The dot screen circuit board provided by the invention comprises a signal generating chip and a plurality of signal wires, wherein the signal generating chip is used for generating a C-PHY signal or a D-PHY signal; the signal wiring is used for electrically connecting the signal generating chip and the external display screen. The signal wiring comprises a C-PHY signal wiring and a D-PHY signal wiring, and the C-PHY signal wiring is used for receiving the C-PHY signal and transmitting the C-PHY signal to an external display screen; the D-PHY signal wiring is used for receiving the D-PHY signal and transmitting the D-PHY signal to an external display screen. At least part of the D-PHY signal wiring and at least part of the C-PHY signal wiring are multiplexed with each other, at least part of the signal wiring is shared by the C-PHY signal and the D-PHY signal for transmission, and the dot screen circuit board can respectively transmit different types of dot screen signals under different dot screen requirements. When the screen is clicked by utilizing different screen-clicking signals, the screen-clicking circuit board is not required to be replaced, so that the screen-clicking testing efficiency is improved, the control difficulty of the screen-clicking circuit board is reduced, and unified management of the screen-clicking jig is facilitated.
Drawings
Fig. 1 is a schematic circuit diagram of a dot screen circuit board according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a dot screen circuit board according to an embodiment of the present invention;
FIG. 3 is a schematic diagram illustrating an arrangement of signal traces according to an embodiment of the present invention;
FIG. 4 is a schematic diagram illustrating an arrangement of signal traces according to an embodiment of the present invention;
FIG. 5 is a schematic diagram illustrating an arrangement of signal traces according to an embodiment of the present invention;
FIG. 6 is a schematic diagram illustrating an arrangement of signal traces according to an embodiment of the present invention;
fig. 7 is a schematic cross-sectional structure of a dot screen circuit board according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a dot screen system according to an embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
In the related art, the point screen circuit boards for transmitting the C-PHY signals and the D-PHY signals are incompatible, different point screen jig boards are needed for the C-PHY signals and the D-PHY signals, so that the point screen process is complicated, and the jig boards are poor in control effect due to the fact that the number of the point screen jig boards is large.
Based on this, this application provides a point screen circuit board (point screen tool board promptly), and this point screen circuit board can compatible C-PHY signal and the transmission of D-PHY signal, promotes point screen test efficiency, makes point screen circuit board easily manage simultaneously.
Fig. 1 is a schematic circuit structure diagram of a dot screen circuit board according to an embodiment of the present invention, and referring to fig. 1, the dot screen circuit board includes: a signal generating chip 1 for generating a C-PHY signal or a D-PHY signal; the C-PHY signal and the D-PHY signal are used for transmitting different types of dot screen signals; the signal wires 2 are used for electrically connecting the signal generating chip 1 and the external display screen 3; the signal wiring 2 comprises a C-PHY signal wiring 20 and a D-PHY signal wiring 21, and the C-PHY signal wiring 20 is used for receiving the C-PHY signal and transmitting the C-PHY signal to the external display screen 3; the D-PHY signal wiring 21 is used for receiving the D-PHY signal and transmitting the D-PHY signal to the external display screen 3; wherein at least part of the D-PHY signal trace 21 and at least part of the C-PHY signal trace 20 are multiplexed with each other.
Specifically, the signal generating chip 1 is a chip capable of generating a C-PHY signal or a D-PHY signal, that is, the signal generating chip 1 may generate a C-PHY signal when the C-PHY signal dot screen is required to be used, and the signal generating chip 1 may generate a D-PHY signal when the D-PHY signal dot screen is required to be used. Thus, the signal generating chip 1 can meet the requirements of different types of dot screens.
The parameters such as the specification and model of the signal generating chip 1 are not limited, and those skilled in the art can select the parameters according to actual requirements. Illustratively, in an alternative embodiment, the signal generating chip 1 may be configured as an SSD2832 chip, which may provide a C-PHY signal or a D-PHY signal, meeting the use requirements.
Further, fig. 2 is a schematic structural diagram of a dot-screen circuit board according to an embodiment of the present invention, and referring to fig. 1 and 2, a signal generating chip 1 may be integrated on a dot-screen circuit board 4 and electrically connected to a plurality of signal traces 2 in the dot-screen circuit board 4, where the signal traces 2 are further electrically connected to an external display screen 3. The signal wiring 2 receives the dot screen signal generated by the signal generating chip 1, and transmits the dot screen signal to the external display screen 3 so as to perform dot screen test on the external display screen 3. Any structure known to those skilled in the art can be further arranged in the dot screen circuit board 4, and the invention is not repeated and limited.
The signal trace 2 may be disposed on an inner layer of the dot screen circuit board 4, and the signal trace 2 is not shown in fig. 2. Fig. 3 is a schematic diagram of an arrangement manner of signal traces provided in an embodiment of the present invention, as shown in fig. 3, the signal traces may be arranged in the dot screen circuit board 4 in the following manner: one end of the signal trace 2 may be electrically connected to a signal generating chip (not shown in fig. 3) through a first connection terminal 2a, and the other end of the signal trace 2 may be electrically connected to an external display screen (not shown in fig. 3) through a second connection terminal 2 b.
The dot screen circuit board is provided with a C-PHY signal wire 20 and a D-PHY signal wire 21, wherein the C-PHY signal wire 20 is used for transmitting C-PHY signals, and the D-PHY signal wire 21 is used for transmitting D-PHY signals. Furthermore, it should be noted that in the present embodiment, at least part of the D-PHY signal trace 21 and at least part of the C-PHY signal trace 20 are multiplexed with each other. By multiplexing with one another is meant that the C-PHY signal trace 20 and the D-PHY signal trace 21 are not two separate types of signal traces 2 from the signal trace 2, at least a portion of the D-PHY signal trace 21 may be multiplexed as the C-PHY signal trace 20, or at least a portion of the C-PHY signal trace 20 may be multiplexed as the D-PHY signal trace 21. In other words, the C-PHY signal and the D-PHY signal share at least part of the signal trace 2 for transmission; at least part of the signal traces 2 transmit C-PHY signals and D-PHY signals, respectively, under different dot screen requirements.
In the arrangement mode, when the C-PHY signal point screen is needed to be used, the control signal generating chip generates a C-PHY signal, and the C-PHY signal is transmitted to the external display screen through at least part of signal wiring; when the D-PHY signal point screen is needed, the control signal generating chip generates the D-PHY signal, and the D-PHY signal can be transmitted to the external display screen through at least part of the signal wiring, so that compatible transmission of the C-PHY signal and the D-PHY signal is realized.
At least part of the C-PHY signal wires and at least part of the D-PHY signal wires are mutually multiplexed, and the dot screen circuit board can respectively transmit different types of dot screen signals under different dot screen requirements. When the screen is clicked by utilizing different screen-clicking signals, the screen-clicking circuit board is not required to be replaced, so that the screen-clicking testing efficiency is improved, the control difficulty of the screen-clicking circuit board is reduced, and unified management of the screen-clicking jig is facilitated.
The dot screen circuit board provided by the invention comprises a signal generating chip and a plurality of signal wires, wherein the signal generating chip is used for generating a C-PHY signal or a D-PHY signal; the signal wiring is used for electrically connecting the signal generating chip and the external display screen. The signal wiring comprises a C-PHY signal wiring and a D-PHY signal wiring, and the C-PHY signal wiring is used for receiving the C-PHY signal and transmitting the C-PHY signal to an external display screen; the D-PHY signal wiring is used for receiving the D-PHY signal and transmitting the D-PHY signal to an external display screen. At least part of the D-PHY signal wiring and at least part of the C-PHY signal wiring are mutually multiplexed, so that the C-PHY signal and the D-PHY signal share at least part of the signal wiring for transmission, and the dot screen circuit board can respectively transmit different types of dot screen signals under different dot screen requirements. When the screen is clicked by utilizing different screen-clicking signals, the screen-clicking circuit board is not required to be replaced, so that the screen-clicking testing efficiency is improved, the control difficulty of the screen-clicking circuit board is reduced, and unified management of the screen-clicking jig is facilitated.
Optionally, with continued reference to fig. 3, in this embodiment, a plurality of signal traces 2 may be disposed on the same layer, and the signal traces 2 are arranged along a direction parallel to a plane of the dot screen circuit board; there is at least one signal trace 2 equidistant from two adjacent signal traces 2.
Specifically, the plurality of signal traces 2 may be formed in the signal trace arrangement layer of the dot screen circuit board 4, and the signal traces 2 are arranged along the same direction as a whole, for example, each signal trace 2 shown in fig. 3 is arranged along a horizontal direction X, and the signal trace 2 extends along a vertical direction Y perpendicular to the arrangement direction thereof, which is not limited thereto in practice. In this arrangement, the arrangement of the signal traces 2 is relatively regular. In the embodiment shown in fig. 3, the distance d1 between two adjacent signal traces 2 (i.e., the line distance between the signal traces 2) is the distance between two adjacent signal traces 2 in the arrangement direction (the distance in the horizontal direction X).
In other embodiments, the number of signal wires or connection holes in the dot screen circuit board 4 is large, the internal structure is complex, and the signal wires 2 may not be arranged in the arrangement manner shown in fig. 3. Fig. 4 is a schematic diagram of another arrangement mode of signal traces provided in the embodiment of the present invention, in the embodiment shown in fig. 4, the signal traces 2 are broken lines, and the whole signal traces 2 are still arranged along the horizontal direction X; in contrast, each signal trace 2 includes a plurality of sections intersecting in the extending direction, and in the orientation shown in fig. 4, the signal trace 2 includes a first section 201 extending in the horizontal direction X, a second section 202 extending in the vertical direction Y, and a third section 203 extending in any angular direction between horizontal and vertical. In this arrangement, the distance between two adjacent signal traces 2 can be understood as the distance between two sections of the two adjacent signal traces 2 having the same extending direction in the direction perpendicular to the extending direction. For example, in fig. 4, the pitch of two adjacent signal traces 2 may refer to the pitch d2 of two adjacent first branches 201 along the vertical direction Y, or the pitch d3 of two adjacent second branches 202 along the horizontal direction X, or the pitch d4 of two adjacent third branches 203 along the vertical direction extending thereto.
Of course, in the actual production process, the specific form of the signal trace 2 is not limited thereto, and the arrangement form of the signal trace 2 will not be described in detail.
Further, in this embodiment, with continued reference to fig. 3 or fig. 4, for the purpose of transmitting the C-PHY signal and the D-PHY signal respectively by using the same signal trace 2, it may be provided that at least one signal trace 2 of the plurality of signal traces 2 has an equal distance between two signal traces 2 adjacent to the signal trace 2. It will also be appreciated that there are three adjacent signal traces 2 satisfying the following relationship: the signal wires 2 in the middle are equidistant from the signal wires 2 on both sides thereof. Three signal wires 2 satisfying the above relation can be defined as a multiplexing wire group, and the signal wires 2 in the multiplexing wire group can be used for transmitting both C-PHY signals and D-PHY signals.
Those skilled in the art will recognize that the C-PHY signals are three-level signals, and at least three signals need to be transmitted through the three signal wires 2, and three C-PHY signals are mutually differentiated; the D-PHY signal is a two-way differential signal that needs to be transmitted via at least two signal traces 2. When the distances between the mutually-differential signal wires 2 are consistent, the transmission effect of the differential signals is good. In the invention, the signal wires 2 in the multiplexing wire group are used as the C-PHY signal wires 20 and the D-PHY signal wires 21 at the same time, and as the distances between two adjacent signal wires 2 in the multiplexing wire group are the same, three signal wires 2 in the multiplexing wire group can be used as the C-PHY signal wires 20, and any two signal wires 2 in the multiplexing wire group can be used as the D-PHY signal wires 21. When the C-PHY signals (or the D-PHY signals) are transmitted, the distances among three (or two) C-PHY signal wires 20 (or D-PHY signal wires 21) which need to be differentiated are the same, so that the transmission effect of the differential signals can be ensured.
For example, three signal traces 2 located at the leftmost side in fig. 4 may constitute a multiplexing trace group, in which the distance between the middle signal trace 2 and the signal trace 2 at the left side thereof and the distance between the middle signal trace 2 and the signal trace 2 at the right side thereof are d3 (or d2 or d 4). The three signal traces 2 may transmit C-PHY signals, and any two of the three signal traces 2 may transmit D-PHY signals.
Optionally, fig. 5 is a schematic diagram of an arrangement manner of signal traces according to another embodiment of the present invention, and referring to fig. 3 and fig. 5 may be combined, in a possible embodiment, the intervals between any two adjacent signal traces 2 may be set to be equal.
Specifically, in the embodiments shown in fig. 3 and fig. 5, the pitches between any two adjacent signal wires 2 in the extending direction of the vertical signal wires 2 are the same, for example, the pitches between any two adjacent signal wires 2 are d1; as such, each signal trace 2 may be configured to transmit both C-PHY signals and D-PHY signals; any two adjacent signal wires 2 can transmit D-PHY differential signals, any three adjacent signal wires 2 can transmit C-DHY three-level signals, the area of the signal wires 2 occupying the dot screen circuit board 4 is small, and the overall size of the circuit board can be reduced. In addition, in the arrangement mode, the signal wiring 2 is regularly arranged, and the wiring is relatively simple.
In addition, in an alternative embodiment, the line widths of the signal traces 2 may be the same, that is, the widths of the signal traces 2 in the direction perpendicular to the extending direction thereof may be further set, so as to further improve the transmission effect of the differential signals.
The embodiment of the invention is not limited to a specific value of the line distance of the signal line 2, and a person skilled in the art can set the value according to actual requirements.
For example, with continued reference to fig. 3, 4 or 5, along the arrangement sequence of the signal traces 2, the 2n_1st signal trace 2 and the 2n+1st signal trace 2 form a first trace group 22, and three signal traces 2 in the first trace group 22 transmit C-PHY three-level signals; along the arrangement sequence of the signal wires 2, the 2n-1 signal wires 2 and the 2n signal wires 2 form a second wire group 23, and two signal wires 2 in the second wire group 23 transmit D-PHY differential signals; wherein n is a positive integer.
As in the above embodiment, each adjacent three signal wires 2 transmit a C-PHY signal three-level signal, and each adjacent two signal wires 2 may transmit a D-PHY differential signal. Thus, along the arrangement sequence of the signal traces 2, every third signal trace 2 adjacent to each other can be divided into the first trace group 22; every two adjacent signal wires 2 are divided into a second wire group 23, the first wire group 22 is used for transmitting C-PHY three-level signals, and the second wire group 23 is used for transmitting D-PHY differential signals.
As shown in fig. 3, 4 or 5, the signal traces 2 may be arranged in a left-to-right (or right-to-left) order, the 1 st to 3 rd signal traces 2 form the first trace group 22, the 4 th to 6 th signal traces 2 form the first trace group 22, and so on. Meanwhile, the 1 st and 2 nd signal wirings 2 constitute a second wiring group 23, the 3 rd and 4 th signal wirings 2 constitute a second wiring group 23, and so on. Each signal trace 2 serves as both a C-PHY signal trace 20 and a D-PHY signal trace 21.
Further, the number of signal traces 2 in the drawings of the embodiment of the present invention is merely an example, and does not represent an actual situation. The number of signal traces 2 can be adjusted by one skilled in the art by himself in the case of meeting the actual spot screen requirements.
Illustratively, the number of signal traces 2 may be set to be greater than or equal to 3, and the number of signal traces 2 is a multiple of 2 or 3. Typically, the transmission of the C-PHY signals requires passing through 3 first wire groups 22, i.e., 3*3 =9C-PHY signal wires 20; the transmission of D-PHY signals needs to pass through 5 second wire groups 23, i.e. 2*5 =10D-PHY signal wires 21, in the present invention, the number of signal wires 2 may be set to 10, 10 signal wires 2 are all used as D-PHY signal wires 21, and 9 of 10 signal wires 2 are used as C-PHY signal wires 20. Of course, in practical applications, the number of signal traces 2 is not limited to this, and the present invention will not be described in detail in other cases.
Referring to fig. 6, fig. 6 is a schematic diagram illustrating an arrangement manner of signal traces according to another embodiment of the invention, in the embodiment, the signal traces 2 are irregular traces, the signal traces 2 may include straight portions 204 and bent portions 205 connected to each other, at least some of the straight portions 204 of different signal traces 2 extend in parallel, and the distance between any two adjacent straight portions 204 is equal along a direction perpendicular to the extending direction of the straight portions 204.
In the above embodiment, the signal trace 2 is in a relatively regular straight line shape, and in the embodiment shown in fig. 6, the signal trace 2 is formed by a straight line portion 204 and a bent portion 205. The straight line portion 204 is also regarded as a broken line portion in the above embodiment, and the bent portion 205 refers to a portion of the signal trace 2 having an irregular shape and being bent more. At least some of the straight sections 204 of adjacent signal traces 2 are parallel to each other and the bent sections 205 are not required.
The bending portion 205 may be used to adjust the overall length of the signal trace 2, it may be understood that a certain loss exists when the dot screen signal is transmitted on the signal trace 2, and by setting the bending portion 205, the extending length of the signal trace 2 may be increased, so that the lengths of the signal traces 2 tend to be consistent, and the attenuation conditions of the dot screen signal are relatively consistent.
In view of the complex shape of the bending portions 205, in this embodiment, the space between the bending portions 205 of any two adjacent signal traces 2 may not be required to be equal; meanwhile, in order to ensure that the distances between any two adjacent signal wires 2 tend to be consistent, the distances between the straight line sections 204 of the two adjacent signal wires 2 in the extending direction perpendicular to the straight line sections 204 may be consistent, for example, the distances between the straight line sections 204 of the two adjacent signal wires 2 in the extending direction perpendicular to the straight line sections 204 are d5, so as to ensure that the multiplexing requirement of the signal wires 2 is met.
In the embodiment shown in fig. 6, in each of the bending sections 205, the projection of a part of the bending sections 205 along the extending direction overlaps with the projection of the adjacent bending sections 205 along the direction, and the projection shapes of the two bending sections 205 along the plane direction perpendicular to the panel circuit board are identical, such as the bending sections 205 in the 10 th signal trace 2-11 and the 11 th signal trace 2-11; at this time, the distance between the two adjacent bending portions 205 may be the same as the distance between the straight portions 204 of the signal traces 2 where the two bending portions 205 are located, so as to further improve the consistency of the distance between the signal traces 2.
Alternatively, in the embodiment of the present invention, the shape of the bending portion 205 may be serpentine, arc-shaped or zigzag, but the extending manner of the bending portion 205 may be set by those skilled in the art according to actual needs. The serpentine extension of the folded section 205 is illustrated in fig. 6 by way of example and is not limited thereto. Providing the bent portion 205 with at least one of a serpentine shape, an arc shape, or a folded shape can achieve flexible arrangement of the signal trace 2.
Alternatively, as in the above embodiment, at least part of the signal traces 2 may be provided to have the same length in the extending direction in order to ensure that the signal attenuation conditions tend to be uniform.
Referring to fig. 3 and 5, when the extension shapes of the respective signal wires 2 are substantially the same, the lengths of the signal wires 2 connected between the first connection terminals 2a and the corresponding second connection terminals 2b are the same. Referring to fig. 6, when there is a difference in the extension shape of different signal traces 2, for example, the extension range of the signal trace 2 at the edge is larger, the extension region of the signal left trace 2 at the middle is smaller, and at this time, the overall extension length of each signal trace 2 can be adjusted by providing the bending portion 205 in a part of the signal traces 2. For example, only straight sections 204 or a smaller number of bent sections 205 are provided in the signal trace 2 near the edge; a plurality of bending parts 205 are arranged in the signal wires 2 close to the middle, so that the extension length of each signal wire 2 tends to be consistent, and the uniformity of the length of each signal wire 2 is improved.
Optionally, as a preferred embodiment, the lengths of the plurality of signal wires 2 in the extending direction are the same, so that the signal loss of the dot screen is basically the same, and the signal transmission effect of the dot screen is improved.
Optionally, fig. 7 is a schematic cross-sectional structure of a dot screen circuit board according to an embodiment of the present invention, referring to fig. 7, in this embodiment, a plurality of signal traces 2 are disposed on the same layer, the dot screen circuit board further includes a ground layer 5, the ground layer 5 and a film layer on which the signal traces 2 are disposed on different layers, and along a thickness direction of the dot screen circuit board, a projection of the ground layer 5 covers a projection of the signal traces 2.
Specifically, the signal traces 2 in the embodiment are still arranged in the same layer, and are arranged in different layers from the ground layer 5 in the panel circuit board, and the ground layer 5 can shield other layers or extraneous signals from the outside, so as to avoid interference of the extraneous signals to the panel signal. Further, the projection of the signal wires 2 on the ground layer 5 can be set to be located in the coverage area of the ground layer 5, so that the anti-interference effect of each signal wire 2 is improved.
The ground layer 5 may be a ground metal layer, such as a copper layer, but is not limited thereto. The ground layer 5 may be disposed entirely or only in a region overlapping with the projection of the signal trace 2 in the panel thickness direction of the dot screen circuit board, which is not limited by the present invention, and may be disposed according to actual needs by those skilled in the art. In addition, the ground layer 5 and the signal trace 2 may be separated by an insulating medium layer 6, and the arrangement mode of the insulating medium layer 6 is not repeated and limited in the present invention.
Alternatively, with continued reference to fig. 7, in a possible embodiment, the panel circuit board includes at least two ground layers 5, and the film layer where the signal trace 2 is located between the two ground layers 5 along the thickness direction of the panel circuit board.
As an alternative embodiment, the signal trace 2 may be disposed on an inner layer of the dot screen circuit board, and the signal trace 2 is disposed between two layers of the ground layers 5, so that uniformity of signal transmission of the dot screen may be ensured, external interference may be further reduced, and anti-interference capability of the dot screen circuit board may be improved.
Those skilled in the art can know that the voltage between the differential signals is twice the voltage on each differential signal line, and the current flowing through the differential signal lines is the same as the single-ended voltage, and according to the relationship among the voltage, the circuit and the resistance, in the embodiment of the invention, the differential impedance of two adjacent signal wires 2 can be controlled to be twice the single-ended impedance of the signal wires 2, so as to meet the impedance requirement of differential signal transmission.
Illustratively, in an alternative embodiment, the single-ended impedance of the signal traces 2 may be 40-60 ohms, and the differential impedance between two adjacent signal traces 2 may be 90-110 ohms. That is, the single-ended impedance of the signal wires 2 can be controlled by 50 ohm±20%, and the differential impedance between the two signal wires 2 can be controlled by 100 ohm±20%, so as to meet the transmission requirement of differential signals.
The specific value of the impedance of the signal trace 2 is only an example, but not limited to the value, and can be adjusted according to actual requirements in the actual application process. For example, the single ended impedance may be controlled at 50 ohm + -10%, and the differential impedance may be controlled at 100 ohm + -10%, but is not limited thereto.
Optionally, with continued reference to fig. 3 or fig. 5, in an embodiment of the present invention, a plurality of grounding wires 7 are further included, and at least one grounding wire 7 is disposed between at least some two adjacent signal wires 2.
Specifically, as shown in fig. 3 or fig. 5, at least one grounding trace 7 in the same layer as the signal traces 2 is further disposed in the dot screen circuit board, and the grounding trace 7 is disposed between two adjacent signal traces 2. The grounding wiring 7 can be a reference potential signal and also has a certain anti-interference effect.
Further alternatively, in a preferred embodiment, a ground trace 7 is provided between any two adjacent signal traces 2. A grounding wire 7 is arranged between any adjacent signal wires 2, and the anti-interference effect of the grounding wire 7 is better.
In addition, the point that needs to be stated is that the point screen circuit board is connected with the external display screen through the coaxial line generally, the center of the coaxial line is a signal line, and the outside of the signal line wraps the ground wire. Based on the coaxial line, in the embodiment, the grounding wiring is arranged between two adjacent signal wirings, so that the differential effect between the dot screen signals is not affected, and the dot screen circuit board can realize the purpose of transmitting the C-PHY signal and the D-PHY signal.
Alternatively, in a possible embodiment, the spacing between the ground trace 7 and the adjacent signal trace 2 may be set to be greater than or equal to the line width of the signal trace 2. The distance between the grounding wire 7 and any signal wire 2 adjacent to the grounding wire is controlled to be larger than or equal to one-time line width of the signal wire 2, so that crosstalk between signals is reduced.
The dot-screen circuit board provided by the invention can also comprise any structure known to a person skilled in the art, and the invention is not repeated and limited.
Based on the same concept, the embodiment of the invention further provides a dot screen system, which includes the dot screen circuit board provided by any embodiment of the invention, fig. 8 is a schematic structural diagram of the dot screen system provided by the embodiment of the invention, and as shown in fig. 8, the dot screen system further includes a control module (not shown in the figure), where the control module is electrically connected to the signal generating chip 1, and the control module is used to control the signal generating chip 1 to generate a C-PHY signal or a D-PHY signal.
The control module may be a control chip, such as an FPGA chip, an ARM chip, or a DSP chip, but is not limited thereto, and the control chip controls the signal generating chip 1 to generate a C-PHY signal or a D-PHY signal, and then the C-PHY signal or the D-PHY signal is transmitted to the external display screen 3 through a signal trace (not shown in the figure) in the dot screen circuit board.
The screen pointing system provided by the invention can respectively transmit different types of screen pointing signals under different screen pointing demands, and a screen pointing circuit board is not required to be replaced when the screen pointing is carried out by utilizing different screen pointing signals, so that the screen pointing testing efficiency is improved, and the unified management of a screen pointing jig is facilitated.
As shown in fig. 8, the panel circuit board 4 may be fastened to a test fixture board 8 such as a two-in-one test board, and a control module (not shown) may be located on the test fixture board 8 or the panel circuit board 4.
The dot screen system provided by the invention comprises all technical characteristics and corresponding beneficial effects of the dot screen circuit board provided by any embodiment of the invention, and is not repeated here.
Optionally, with continued reference to fig. 8, the dot screen system may further include an adapter board 9, where the adapter board 9 is used to transfer the dot screen circuit board 4 and the external display screen 3.
The adapter board 9 can receive the dot screen signals (including the C-PHY signals and the D-PHY signals) sent by the dot screen circuit board 4, and output the dot screen signals to the external display screen 3, so that the external display screen 3 is lightened.
The specific setting manner of the adapter plate 9 can be set by a person skilled in the art according to actual needs, and the embodiment of the present invention is not repeated and limited.
The external display screen 3 may be an Organic Light-Emitting Diode (OLED) display screen, a liquid crystal (Liquid Crystal Display, LCD) panel, a Micro LED display screen, a Mini LED display screen, or the like, but is not limited thereto.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, and that various obvious changes, rearrangements, combinations, and substitutions can be made by those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.

Claims (15)

1. A dot screen circuit board, comprising:
the signal generating chip is used for generating a C-PHY signal or a D-PHY signal; the C-PHY signal and the D-PHY signal are used for transmitting different types of dot screen signals;
the signal wires are used for electrically connecting the signal generating chip and the external display screen;
the signal wiring comprises a C-PHY signal wiring and a D-PHY signal wiring, and the C-PHY signal wiring is used for receiving the C-PHY signal and transmitting the C-PHY signal to the external display screen; the D-PHY signal wiring is used for receiving the D-PHY signal and transmitting the D-PHY signal to the external display screen;
wherein at least a portion of the D-PHY signal traces and at least a portion of the C-PHY signal traces are multiplexed with each other.
2. The dot-screen circuit board according to claim 1, wherein a plurality of the signal traces are arranged in the same layer, the signal traces are arranged along a direction parallel to a plane in which the dot-screen circuit board is located, and at least one signal trace is equal to a distance between two adjacent signal traces.
3. The dot-screen circuit board according to claim 2, wherein the extending directions of the adjacent signal wires are parallel, and the distance between any two adjacent signal wires is equal along the direction perpendicular to the extending direction of the signal wires.
4. The dot screen circuit board according to claim 2, wherein the signal wires comprise straight line sections and bending sections which are connected with each other, the extending directions of at least part of the straight line sections in different signal wires are parallel, and the distance between any two adjacent straight line sections is equal along the direction perpendicular to the extending direction of the straight line sections.
5. The dot screen circuit board of claim 4, wherein the shape of the bent sections comprises a serpentine shape, an arc shape, or a polyline shape.
6. The dot screen circuit board of claim 1, wherein at least some of the signal traces have the same length in the direction of extension.
7. The dot-screen circuit board according to claim 1, wherein a plurality of the signal traces are arranged on the same layer, the dot-screen circuit board further comprises a ground layer, the ground layer and the film layer where the signal traces are arranged on different layers, and along the thickness direction of the dot-screen circuit board, the projection of the ground layer covers the projection of the signal traces.
8. The dot-screen circuit board according to claim 7, wherein the dot-screen circuit board comprises at least two layers of the ground layers, and the film layer where the signal trace is located between the two layers of the ground layers along the thickness direction of the dot-screen circuit board.
9. The dot-screen circuit board according to claim 1, wherein along an arrangement sequence of the signal traces, the 2n-1 th signal trace, the 2 n-th signal trace, and the 2n+1 th signal trace form a first trace group, and three signal traces in the first trace group transmit C-PHY three-level signals;
along the arrangement sequence of the signal wires, the 2n-1 th signal wire and the 2 n-th signal wire form a second wire group, and two signal wires in the second wire group transmit D-PHY differential signals;
wherein n is a positive integer.
10. The dot-screen circuit board of claim 1, wherein the single-ended impedance of the signal traces is 40-60 ohms, and the differential impedance between two adjacent signal traces is 90-110 ohms.
11. The dot-screen circuit board of claim 1, further comprising a plurality of ground traces, one of the ground traces being disposed between at least some adjacent two of the signal traces.
12. The dot-screen circuit board of claim 11, wherein one of the ground traces is disposed between any two adjacent signal traces.
13. The dot-screen circuit board of claim 12, wherein a spacing between the ground trace and an adjacent signal trace is greater than or equal to a linewidth of the signal trace.
14. A dot screen system comprising the dot screen circuit board according to any one of claims 1 to 13, further comprising a control module electrically connected to the signal generating chip, wherein the control module is configured to control the signal generating chip to generate a C-PHY signal or a D-PHY signal.
15. The spot-screen system of claim 14 further comprising an adapter plate for adapting the spot-screen circuit board to an external display screen.
CN202310434066.0A 2023-04-18 2023-04-18 Point screen circuit board and point screen system Pending CN116471737A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310434066.0A CN116471737A (en) 2023-04-18 2023-04-18 Point screen circuit board and point screen system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310434066.0A CN116471737A (en) 2023-04-18 2023-04-18 Point screen circuit board and point screen system

Publications (1)

Publication Number Publication Date
CN116471737A true CN116471737A (en) 2023-07-21

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202310434066.0A Pending CN116471737A (en) 2023-04-18 2023-04-18 Point screen circuit board and point screen system

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Country Link
CN (1) CN116471737A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117294808A (en) * 2023-09-01 2023-12-26 武汉精立电子技术有限公司 Image signal generator and generating method of DPHY and CPHY signal sharing interface

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117294808A (en) * 2023-09-01 2023-12-26 武汉精立电子技术有限公司 Image signal generator and generating method of DPHY and CPHY signal sharing interface

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