WO2023019824A1

WO2023019824A1 - Substrate and packaging structure thereof

Info

Publication number: WO2023019824A1
Application number: PCT/CN2021/137816
Authority: WO
Inventors: 周新书; 孟宪余
Original assignee: 北京爱芯科技有限公司
Priority date: 2021-08-19
Filing date: 2021-12-14
Publication date: 2023-02-23
Also published as: CN113571480A; CN113571480B

Abstract

Provided in the present application are a substrate and a packaging structure thereof. The substrate comprises a first area and a second area, the second area being arranged around the first area, and a plurality of solder balls being provided in each of the first area and the second area, wherein there is a first spacing between the solder balls in the first area, and a spacing between the solder balls in the second area is a second spacing, which is smaller than the first spacing; the solder balls in the first area are provided with a through hole, so as to realize signal transmission by means of the through hole; and the solder balls in the second area are led out by means of a lead, so as to realize signal transmission by means of the lead. The substrate provided in the present application can have more solder balls arranged thereon with respect to a substrate on which solder balls are arranged at a single spacing, thereby realizing miniaturization of the substrate.

Description

A kind of substrate and packaging structure thereof

Cross References to Related Applications

This application claims the priority of a Chinese patent application with application number 202110956893.7 and titled "A Substrate and Its Packaging Structure" filed with the State Intellectual Property Office of China on August 19, 2021, the entire contents of which are incorporated by reference in this application middle.

technical field

The present application relates to the technical field of chip packaging, in particular, to a substrate and a packaging structure thereof.

Background technique

In chip package design, under normal circumstances, the array of solder balls on the back of the chip is arranged at equal intervals, which is convenient for soldering to the circuit board. However, the array of solder balls arranged at equal intervals limits the number of solder balls on the chip, and the number of solder balls arranged is relatively limited.

In the related art, it is possible to meet the arrangement requirements of multiple signals by increasing the size of the package, but the increase of the size of the package will lead to an increase in the cost of the package or the substrate cannot be placed in the package.

Contents of the invention

The present application provides a substrate and its packaging structure, which solve the above problems by arranging solder balls in different regions at unequal intervals.

Some embodiments of the present application provide a substrate, the substrate may include a first region and a second region, the second region is arranged around the first region, and multiple solder balls, wherein there is a first pitch between the solder balls in the first region, and a second pitch smaller than the first pitch between the solder balls in the second region; The solder balls in one area are provided with through holes for signal transmission through the through holes; the solder balls in the second area are led out through wires for signal transmission through the wires.

The above designed substrate, by designing the first region and the second region, and designing the second distance between the solder balls in the second region to be smaller than the first distance between the solder balls in the first region, makes the designed substrate relatively For the arrangement of the first pitch, more solder balls can be arranged, which solves the problem of increasing the package size caused by the increase of the substrate in the related art, which in turn increases the cost of the package, or in order to realize the corresponding function However, the technical problem that the substrate cannot be placed in the package is that the substrate cannot be placed in the package; in addition, by using the technical solution that the solder balls in the second area are led out through the leads, and the solder balls in the first area are transmitted through the through holes, the circuit board is reduced. The number of wiring layers can achieve the purpose of cost saving.

In an optional embodiment in some embodiments, a plurality of through holes may be arranged in the first region, each of the through holes is arranged in the first pitch, and the solder balls in the first region The leads are connected to other circuit layers of the circuit board through corresponding through holes, so as to realize signal transmission between signals in the first area and the other circuit layers.

In an optional implementation manner in some implementation manners, a plurality of passive elements may be arranged in the first region, and the passive elements are arranged at intervals from the solder balls.

In an optional embodiment in some embodiments, the substrate may further include a third region disposed around the second region, and a plurality of solder balls are disposed in the third region, wherein the solder balls in the third region The spacing between the solder balls is greater than or equal to the second spacing; wherein, the third area also includes a plurality of lead gaps, which are formed by the spacing between the solder balls in the third area greater than the second spacing The leads of the solder balls in the second region are led out through the lead gaps, so as to realize signal transmission in the second region.

In the implementation of the above design, by designing the first region, the second region and the third region, and designing the second distance between the solder balls in the second region to be smaller than the first distance between the solder balls in the first region, The third pitch of some of the solder balls in the third area is greater than the second pitch, and the pitch of the other part of the solder balls is equal to the second pitch, so that the designed substrate can be arranged more than the arrangement of the first pitch. Solder balls; in addition, the leads of the solder balls in the second area are drawn out through the lead gaps formed in the third area, the solder balls in the third area are directly drawn out through the leads, and the solder balls in the first area realize signal transmission through through holes, thereby achieving The purpose of reducing the number of wiring layers of the circuit board is to reduce the cost of the circuit board; moreover, since the leads of the solder balls in the second area are drawn out through the lead gap formed in the third area, the leads in the second area have enough lead-out space , to avoid wiring or installation problems caused by lead volume or insufficient space.

In some optional implementations, the solder balls with close distances in the third area can form a solder ball pair, and the solder balls in the solder ball pair are drawn out through wires, so as to realize the distance in the third area through wires. transmission of signals.

In an optional embodiment among some embodiments, the distance between the solder balls in the solder ball pair in the third region may be equal to the second distance, so as to facilitate the molding of the substrate.

In an optional embodiment in some embodiments, the pairs of solder balls in the third region may be arranged in a first direction, and the lead gaps are formed between a plurality of pairs of solder balls in a second direction. , where the first direction is perpendicular to the second direction.

In an optional embodiment among some embodiments, the leads in the second region and the third region may extend away from the first region along the second direction.

In an optional embodiment in some embodiments, the solder balls in the first region, the second region and the third region may be symmetrically arranged.

In an optional implementation in some implementations, the solder balls in the first region may be arranged in a matrix.

In an optional embodiment in some embodiments, the four solder balls in the first region may share one through hole, so that the leads of the four solder balls are connected to the circuit board through the same through hole. other circuit layers.

In an optional embodiment in some embodiments, the two solder balls in the first region may share a through hole, so that the leads of the two solder balls are connected to the circuit board through the same through hole. other circuit layers.

In an optional embodiment in some embodiments, a through hole is separately provided for each solder ball in the first region, so that the lead wire of each solder ball is connected to the circuit board through the corresponding through hole other circuit layers.

Some other embodiments of the present application provide a package structure, which includes: a package body, the substrate according to any one of the foregoing embodiments, and circuit elements on the substrate.

The package structure designed above, because it includes the substrate designed in some embodiments of the present application, therefore, the package structure designed can arrange more solder balls compared to the first-pitch arrangement, solving the problem of In the related art, the increase of the size of the package will lead to the increase of the package cost or the technical problem that the substrate cannot be placed in the package. In addition, the solder balls in the second area are led out through leads, and the solder balls in the first area are transmitted through through holes, thereby reducing the number of wiring layers of the circuit board and achieving the purpose of saving costs.

Description of drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the accompanying drawings that need to be used in the embodiments of the present application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present application, so It should not be regarded as a limitation on the scope, and those skilled in the art can also obtain other related drawings according to these drawings without creative work.

FIG. 1 is a schematic diagram of a first structure of a substrate provided in an embodiment of the present application;

FIG. 2 is a schematic diagram of a first structure of a via layout provided by an embodiment of the present application;

FIG. 3 is a second structural schematic diagram of a via layout provided by an embodiment of the present application;

FIG. 4 is a second structural schematic diagram of the substrate provided by the embodiment of the present application;

FIG. 5 is a schematic diagram of a third structure of a substrate provided in an embodiment of the present application;

FIG. 6 is a schematic diagram of a fourth structure of a substrate provided in an embodiment of the present application;

FIG. 7 is a schematic structural diagram of a packaging structure provided by an embodiment of the present application.

Icons: 1-package structure; 10-substrate; 101-first area; 1011-passive component; 102-second area; 103-third area; 1031-lead gap; 1032-second lead; 20-solder ball; 201 - through hole; 202 - first lead; 203 - solder ball pair; 50 - package; 60 - circuit element; L1 - first spacing; L2 - second spacing; L3 - third spacing.

Detailed ways

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.

Some embodiments of the present application provide a substrate 10, which is used for chip packaging. As shown in FIG. 1, the substrate 10 includes a first region 101 and a second region 102, and the second region 102 surrounds the first region 101, a plurality of solder balls 20 are arranged in the first area 101 and the second area 102, the solder balls 20 in the first area 101 have a first distance L1, and the solder balls 20 in the second area 102 There is a second distance L2, and the second distance L2 is smaller than the first distance L1. For example, the first distance L1 between each solder ball 20 in the first region 101 is 0.65mm, and the second distance L2 between each solder ball 20 in the second region 102 can be less than 0.65mm, as specifically 0.4mm.

On the substrate with the above-mentioned structural design, through-holes 201 are provided corresponding to the solder balls 20 in the first area 101, and then signal transmission is realized through the through-holes; Lead wires realize signal transmission.

The substrate with the above structural design, by designing the first region 101 and the second region 102, and designing the second distance between the solder balls 20 in the second region 102 to be smaller than the first distance between the solder balls 20 in the first region , so that the designed substrate can arrange more solder balls compared to the equal-spaced arrangement of the first pitch, and can give the first region 101 and the second region 102 different circuit functions according to different regions. In addition, the solder balls 20 in the second area 102 are led out through leads, and the solder balls 20 in the first area 101 realize signal transmission through through holes, thereby reducing the number of wiring layers of the circuit board and achieving the purpose of cost saving.

In the designed embodiment, each through hole 201 in the first region 101 is arranged in the first pitch L1, and the leads of each solder ball 20 are connected to other circuit layers of the circuit board through the corresponding through hole 201, thereby realizing the first Signals in a region 101 are transmitted between other circuit layers, thereby reducing the number of wiring layers of the circuit board and reducing the design cost of the circuit board.

As a possible implementation, as shown in FIG. 2, the four solder balls in the first region 101 can share one through hole 201, so that the leads of the four solder balls can be connected to other layers through the same through hole 201. ; As another possible implementation, as shown in FIG. 3, in the first region 101, two solder balls can share a through hole 201, so that the leads of the two solder balls can be connected to the circuit through the same through hole 201 other layers of the board, thereby avoiding contact between leads. In addition, a through hole 201 may be provided for each solder ball 20 , so that the leads of each solder ball 20 are connected to other layers of the circuit board through the corresponding through hole 201 .

In some optional implementations, as shown in FIG. 1 , the solder balls 20 in the first region 101 and the solder balls 20 in the second region 102 present a symmetrical arrangement, and the symmetrical arrangement is the first region The arrangement structure of the solder balls in 101 and the solder balls 20 in the second area 102 is symmetrical left and right, up and down; as a possible implementation mode, the solder balls 20 in the first area 101 can be arranged in a matrix as shown in FIG. 1 cloth.

In some optional embodiments, the solder balls arranged in the first region 101 may not be arranged in a complete matrix in addition to the matrix symmetric arrangement mentioned above, and the solder balls may be removed as required ; In addition to removing part of the solder balls, as shown in Figure 4, this program can also set a plurality of passive elements 1011 in the first area 101, the passive elements 1011 and solder balls 20 are arranged at intervals, the passive elements 1011 can be capacitance or components such as resistors. By setting the passive element 1011 on the substrate, the gain function required by the PCB board can be realized through the passive element 1011 of the substrate, for example, the passive element 1011 provides the PCB board with power gain, etc., thereby making the designed substrate cost low and simultaneously function stronger.

Other embodiments of the present application provide another substrate 10, which is also used for chip packaging. As shown in FIG. The second area 102 is arranged around the first area 101 , and the third area 103 is arranged around the second area 102 .

There is a first distance L1 between the solder balls 20 in the first region 101, a second distance L2 between the solder balls 20 in the second region 102, and a third distance L3 between the solder balls 20 in the third region 103. , wherein the second distance L2 is smaller than the first distance L1, and the third distance L3 is greater than or equal to the second distance L2. For example, the first distance L1 between the solder balls 20 in the first region 101 is 0.65mm, the second distance L2 between the solder balls 20 in the second region 102 can be 0.4mm, and the distance L2 between the solder balls 20 in the third region 103 The third distance L3 between the solder balls may be equal to the second distance L2, that is, 0.4 mm, or greater than the second distance L2, such as 0.8 mm; The third distance L3 is equal to the second distance L2 ie 0.4 mm; the third distance L3 between another part of the solder balls 20 is greater than the second distance L2 , for example 0.8 mm.

Wherein, the third region 103 also includes a plurality of lead gaps 1031, the plurality of lead gaps 1031 are formed by the distance between the solder balls in the third region greater than the second distance L2, for example, the aforementioned third distance L3 is 0.8mm The spacing between the lead wires 1031 is formed; the first lead wires 202 of the solder balls 20 in the second region 102 are led out through the lead wire gaps 1031 to realize signal transmission in the second region 102 .

The solder balls in the third area 103 are directly drawn out through the second lead 1032, thereby realizing the signal transmission in the third area 103; the solder balls 20 in the first area 101 are connected to other layers of the circuit board through the through holes 201, thereby realizing the second Signal transmission in a region 101 , wherein the layout of the through holes 201 may be consistent with the layouts in FIG. 2 and FIG. 3 in the first embodiment, and will not be repeated here.

The substrate designed above, by designing the first region 101, the second region 102 and the third region 103, and designing the second distance L2 between the solder balls 20 in the second region 102 to be smaller than the solder balls 20 in the first region 101 The first pitch L1 between them, the third pitch L3 of some of the solder balls in the third area is greater than the second pitch L2, and the pitch of the other part of the solder balls is equal to the second pitch L2, so that the designed substrates are relatively equal to the first pitch More solder balls can be arranged in an equidistant arrangement; in addition, the leads of the solder balls 20 in the second region 102 are drawn out through the lead gaps formed in the third region 103, and the solder balls 20 in the third region 103 are drawn out through the lead gaps formed in the third region 103. Directly drawn out, the solder balls 20 in the first region 101 realize signal transmission through through holes, thereby achieving the purpose of reducing the number of wiring layers of the circuit board and reducing the cost of the circuit board; Lead wires are led out through the lead wire gap formed in the third region 103 , so that the lead wires in the second region 102 have enough lead-out space to avoid installation problems caused by lead wire volume.

In some other optional implementations, as shown in FIG. 5 , the solder balls 20 in the third region 103 with similar distances form solder ball pairs 203 , and the solder balls 20 in the solder ball pairs 203 pass through the second lead 1032 lead out to implement signal transmission in the third area 103 through the second wire 1032 . It should be noted here that the number of solder balls in the solder ball pair 203 may be other than the 2 shown in FIG. 5 , for example, three solder balls 20 form a solder ball pair 203 .

As a possible implementation manner, the distance between the solder balls 20 in the solder ball pairs 203 is equal to the second distance, and the distance between every two solder ball pairs 203 is greater than the second distance L2, for example, in the solder ball pairs 203 The distance between the solder balls 20 is 0.4 mm, and the distance between every two solder ball pairs 203 is 0.8 mm, so that a lead gap 1031 is formed between every two solder ball pairs 203 .

In some other optional implementations, as shown in FIG. 5 , the solder ball pairs 203 in the third region 103 are arranged in the first direction, and the lead gaps 1031 are formed in the second direction on the plurality of solder ball pairs. 203, wherein the first direction is perpendicular to the second direction. It can be seen from the example in FIG. 5 that the solder ball pairs 203 are arranged in the horizontal direction, and the lead gap 1031 is formed between the two solder ball pairs 203 in the vertical direction.

In some other optional embodiments, as shown in FIG. 5 , the leads of the second region 102 and the third region 103 extend away from the first region 101 along the second direction, that is, the second region 102 and the third region The lead wires of 103 are all directly led to the outside of the substrate 10 .

In some other optional embodiments, as shown in FIG. 5 , the solder balls 20 in the first region 101, the solder balls 20 in the second region 102 and the third region 103 present a symmetrical arrangement, and the symmetrical arrangement The arrangement structure of the solder balls in the first area 101, the solder balls 20 in the second area 102 and the third area 103 is symmetrical left and right, up and down; as a possible implementation mode, the solder balls 20 in the first area 101 Arranged in a matrix as shown in Figure 5. In addition, in addition to presenting the matrix arrangement as shown in FIG. 5 , it is also possible to present a manner in which part of the solder balls in the first region are replaced by passive elements 1011 as shown in FIG. 6 .

Some other embodiments of the present application provide a packaging structure 1, as shown in FIG. The circuit element 60 on the substrate 10 is disposed in the package body 50 .

The packaging structure designed above, because it includes the substrate 10 designed in the first embodiment or the second embodiment, therefore, the designed packaging structure 1 can arrange more solder joints compared to the arrangement of the first pitch. Balls 20; In addition, the solder balls 20 in the second area 102 are drawn out through leads, and the solder balls 20 in the first area 101 realize signal transmission through the through holes 201, thereby reducing the number of wiring layers of the circuit board and achieving the purpose of saving costs.

In the embodiments provided in this application, it should be understood that the disclosed devices and methods may be implemented in other ways. The device embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or May be integrated into another system, or some features may be ignored, or not implemented. In another point, the mutual coupling or direct coupling or communication connection shown or discussed may be through some communication interfaces, and the indirect coupling or communication connection of devices or units may be in electrical, mechanical or other forms.

In addition, a unit described as a separate component may or may not be physically separated, and a component displayed as a unit may or may not be a physical unit, that is, it may be located in one place, or may be distributed to multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

Furthermore, each functional module in each embodiment of the present application may be integrated to form an independent part, each module may exist independently, or two or more modules may be integrated to form an independent part.

In this document, relational terms such as first and second etc. are used only to distinguish one entity or operation from another without necessarily requiring or implying any such relationship between these entities or operations. Actual relationship or sequence.

The above descriptions are only examples of the present application, and are not intended to limit the scope of protection of the present application. For those skilled in the art, various modifications and changes may be made to the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of this application shall be included within the protection scope of this application.

Industrial Applicability

The present application provides a substrate and its packaging structure, the substrate includes a first region and a second region, the second region is arranged around the first region, and a plurality of solder balls are arranged in the first region and the second region, wherein, There is a first pitch between the solder balls in the first area, and a second pitch smaller than the first pitch between the solder balls in the second area; the solder balls in the first area are provided with through holes to pass through The holes implement signal transmission; the solder balls in the second area are led out through the wires, so as to realize signal transmission through the wires. By using the substrate provided by the present application, more solder balls can be arranged relative to a substrate with a unique pitch of solder balls, so as to realize the miniaturization of the substrate.

In addition, it can be understood that the substrate and its packaging structure of the present application are reproducible and can be used in various industrial applications. For example, the substrate and its packaging structure of the present application can be used in the field of chip packaging technology.

Claims

A substrate, characterized in that the substrate includes a first area and a second area, the second area is arranged around the first area, and a plurality of solder balls are arranged in the first area and the second area, wherein , the solder balls in the first region have a first pitch, and the solder balls in the second region have a second pitch smaller than the first pitch;

The solder balls in the first area are provided with through holes, so as to realize signal transmission through the through holes;

The solder balls in the second area are led out through the wires, so as to realize signal transmission through the wires.
The substrate according to claim 1, wherein a plurality of through holes are arranged in the first region, each of the through holes is arranged in the first pitch, and the solder balls in the first region The leads are connected to other circuit layers of the circuit board through corresponding through holes, so as to realize signal transmission between signals in the first area and the other circuit layers.
The substrate according to claim 1 or 2, wherein a plurality of passive elements are arranged in the first region, and the passive elements are arranged at intervals from the solder balls.
The substrate according to any one of claims 1 to 3, wherein the substrate further comprises a third region arranged around the second region, and a plurality of solder balls are arranged in the third region, wherein the The distance between the solder balls in the third region is greater than or equal to the second distance;

Wherein, the third area also includes a plurality of lead gaps, which are formed by the spacing between the solder balls in the third area greater than the second spacing, and the leads of the solder balls in the second area pass through the The lead wires are led out through the gaps to realize signal transmission in the second area.
The substrate according to claim 4, wherein the solder balls with close distances in the third area form solder ball pairs, and the solder balls in the solder ball pairs are led out through wires, so as to achieve transmission of signals.
The substrate according to claim 5, wherein the distance between the solder balls in the solder ball pair in the third region is equal to the second distance.
The substrate according to claim 4 or 5, wherein the solder ball pairs in the third region are arranged in a first direction, and the lead gaps are formed between a plurality of solder ball pairs in a second direction , where the first direction is perpendicular to the second direction.
The substrate according to claim 7, wherein the leads in the second and third regions extend away from the first region along the second direction.
The substrate according to any one of claims 4 to 7, wherein the solder balls in the first region, the second region and the third region are symmetrically arranged.
The substrate according to any one of claims 1 to 9, wherein the solder balls in the first region are arranged in a matrix.
The substrate according to any one of claims 2 to 10, wherein the four solder balls in the first region share one through hole, so that the leads of the four solder balls are connected through the same through hole to the other circuit layers of the circuit board.
The substrate according to any one of claims 2 to 10, wherein the two solder balls in the first region share a through hole so that the leads of the two solder balls are connected through the same through hole to the other circuit layers of the circuit board.
The substrate according to any one of claims 2 to 10, wherein a through hole is provided for each solder ball in the first region, so that the leads of each solder ball pass through the corresponding through hole. A hole is connected to the other circuit layer of the circuit board.
A package structure, characterized in that the package structure comprises: a package body, the substrate according to any one of claims 1 to 13, and circuit elements on the substrate.