CN116467122B

CN116467122B - Method and device for testing data retention capacity of flash memory

Info

Publication number: CN116467122B
Application number: CN202210062545.XA
Authority: CN
Inventors: 刘政林; 潘玉茜; 张婵婵; 张浩明
Original assignee: Wuhan Zhifu Semiconductor Technology Co ltd
Current assignee: Wuhan Zhifu Semiconductor Technology Co ltd
Priority date: 2022-01-19
Filing date: 2022-01-19
Publication date: 2024-04-05
Anticipated expiration: 2042-01-19
Also published as: CN116467122A

Abstract

The application discloses a method and a device for testing data retention capacity of a flash memory, a storage medium and computer equipment, wherein the method comprises the following steps: determining a storage unit to be tested from a flash memory to be tested, and performing erasing-programming operation on the storage unit to be tested; when the operation times of the erasing-programming operation reach a preset operation times threshold value, powering off the flash memory to be tested; when the power-off time reaches a first time length, recovering power supply, and performing erasing-programming-reading operation on the memory cell to be tested; performing power-off treatment on the flash memory to be tested again, and performing temperature change treatment operation on the flash memory to be tested after power-off; and after the temperature change processing operation is finished, performing a reading operation on the memory unit to be tested, and determining the data holding capacity of the flash memory to be tested based on a reading result. The self-recovery effect of the flash memory can be fully considered, so that the test accuracy of the data retention capacity of the flash memory is higher.

Description

Method and device for testing data retention capacity of flash memory

Technical Field

The present invention relates to the field of memory testing technologies, and in particular, to a method and apparatus for testing data retention capability of a flash memory, a storage medium, and a computer device.

Background

With the rapid development of integrated circuit technology, memory is increasingly important in modern electronic devices as the primary unit for storing data. The memories currently in common use include hard disk memory, floppy disk memory, removable memory, and flash memory.

Data retention is an important indicator of memory reliability and represents the ability of a memory to store data correctly. During use of flash memory, as the number of program-erase operations increases, some electrons gradually break away during the interval of the program-erase operations (i.e., dwell time), and this phenomenon of electron break away (i.e., trap-away) is known as a self-recovery effect. This self-recovery effect can affect the data retention of the flash memory after an erase-program operation. The existing test method is used for testing the data retention capacity of the flash memory with the self-recovery effect, the test accuracy is low, and the safety of the subsequent data storage is seriously affected when the data retention capacity of the flash memory with the self-recovery effect is tested by the method without considering the operation times and the influence of the self-recovery effect.

Disclosure of Invention

In view of this, the present application provides a method and apparatus for testing data retention capability of a flash memory, a storage medium, and a computer device, which can fully consider a self-recovery effect of the flash memory by setting a step of power-off placement, so that the test accuracy of the data retention capability of the flash memory is higher, and is beneficial to improving the data storage security of the flash memory.

According to one aspect of the present application, there is provided a method for testing data retention capability of a flash memory, including:

determining a storage unit to be tested from a flash memory to be tested, and performing an erase-program operation on the storage unit to be tested;

when the operation times of the erase-program operation reach a preset operation times threshold, performing power-off processing on the flash memory to be tested;

when the power-off time reaches a first time, recovering the power supply of the flash memory to be tested, and performing an erase-programming-reading operation on the memory cells to be tested, wherein each memory cell to be tested writes a target graph when executing the erase-programming-reading operation;

performing power-off processing on the flash memory to be tested again, and performing temperature change processing operation on the flash memory to be tested after power-off;

And after the temperature change processing operation is finished, performing a reading operation on the storage unit to be tested, and determining the data holding capacity of the flash memory to be tested based on a reading result.

Optionally, the temperature change processing operation is performed on the flash memory to be tested after power failure, which specifically includes:

heating the flash memory to be tested based on a preset temperature changing device after power failure, and keeping the temperature of the preset temperature changing device at a first preset temperature threshold value when the temperature of the preset temperature changing device reaches the first preset temperature threshold value;

and when the time that the preset temperature changing device is kept under the first preset temperature threshold exceeds a second time length, cooling the preset temperature changing device, and when the temperature of the preset temperature changing device reaches a second preset temperature threshold, ending the temperature changing operation.

Optionally, the performing an erase-program operation on the memory cell to be tested specifically includes:

determining a preset operation frequency threshold value and a first operation frequency of the erase-program operation corresponding to the flash memory to be tested, and performing the erase-program operation of the first operation frequency on each memory cell to be tested;

Recording the operation ending time of the erasing-programming operation of the first operation time when the first operation time is smaller than the preset operation time threshold, performing the erasing-programming operation of the second operation time on the memory cell to be tested when the operation ending time is longer than the current time by a third duration, and recording the total operation time of the erasing-programming operation of the memory cell to be tested;

recording the operation ending time of the erasing-programming operation of the second operation time when the total operation time is smaller than the preset operation time threshold, and performing the erasing-programming operation of the second operation time again on the memory cell to be tested when the operation ending time is longer than the current time by the third time, and updating the total operation time of the erasing-programming operation of the memory cell to be tested until the updated total operation time is equal to the preset operation time threshold.

Optionally, the determining a memory cell to be tested from the flash memory to be tested, and performing an erase-program operation on the memory cell to be tested specifically includes:

dividing storage units in the flash memory to be tested to obtain a plurality of storage intervals;

Determining a first number of storage units to be tested from each storage interval, and grouping the storage units to be tested to obtain unit groups to be tested, wherein each unit group to be tested comprises the same number of storage units to be tested in each storage interval, and the number of storage units to be tested in each unit group to be tested is the same;

and respectively determining the threshold value of the preset operation times corresponding to each cell group to be tested, and performing the erasing-programming operation on the memory cells to be tested in each cell group to be tested.

Optionally, the determining a first number of the memory cells to be tested from each of the memory intervals specifically includes:

randomly determining a first number of memory cells from the memory section as the memory cells to be tested when the memory section does not include the problem memory cells;

and when the problem storage unit is included in the storage interval, taking neighbor storage units of the problem storage unit as the storage units to be tested, and when the second number of the neighbor storage units is smaller than the first number, randomly determining the rest number of storage units as the storage units to be tested from the storage units of the storage interval except the problem storage unit and the neighbor storage units of the problem storage unit, wherein the rest number is determined based on the first number and the second number.

Optionally, the determining the data retention capability of the flash memory to be tested based on the read result specifically includes:

based on the reading results corresponding to the storage units to be tested in any one of the unit groups to be tested, comparing the reading results with the target graph to obtain the original error bit numbers corresponding to the storage units to be tested;

obtaining an original error rate corresponding to each storage unit to be tested according to the original error bit number and the storage capacity corresponding to each storage unit to be tested;

and determining the data retention capacity of the flash memory to be tested based on the original error rate corresponding to each storage unit to be tested.

Optionally, the determining the data retention capability of the flash memory to be tested based on the original bit error rate corresponding to each storage unit to be tested specifically includes:

respectively determining whether the storage units to be tested exist in each unit group to be tested, wherein the original error rate of the storage units to be tested is larger than a preset error rate threshold value;

when the original error rate of each storage unit to be tested in any one of the unit groups to be tested is smaller than or equal to the preset error rate threshold value, determining the data retention capacity of the flash memory to be tested based on the maximum preset operation frequency threshold value corresponding to different unit groups to be tested;

When the storage unit to be tested with the original error rate larger than the preset error rate threshold exists in the unit group to be tested, taking any one unit group to be tested as a first unit group, determining a minimum preset operation frequency threshold corresponding to the first unit group, determining a second unit group with the preset operation frequency threshold smaller than the minimum preset operation frequency threshold from other unit groups to be tested, determining a maximum preset operation frequency threshold from the second unit group as a target operation frequency threshold, and determining the data retention capacity of the flash memory to be tested based on the target operation frequency threshold.

According to another aspect of the present application, there is provided a test apparatus for data retention capability of a flash memory, including:

the determining module is used for determining a storage unit to be tested from the flash memory to be tested and performing erasing-programming operation on the storage unit to be tested;

the power-off module is used for performing power-off treatment on the flash memory to be tested when the operation times of the erase-program operation reach a preset operation times threshold;

the power supply recovery module is used for recovering the power supply of the flash memory to be tested when the power-off time reaches a first time, and performing erasure-programming-reading operation on the memory cells to be tested, wherein each memory cell to be tested writes in a target graph when the erasure-programming-reading operation is performed;

The temperature change processing module is used for carrying out power-off processing on the flash memory to be tested again and carrying out temperature change processing operation on the flash memory to be tested after power-off;

and the reading module is used for carrying out reading operation on the storage unit to be tested after the temperature change processing operation is finished, and determining the data holding capacity of the flash memory to be tested based on a reading result.

Optionally, the temperature change processing module is specifically configured to:

heating the flash memory to be tested based on a preset temperature changing device after power failure, and keeping the temperature of the preset temperature changing device at a first preset temperature threshold value when the temperature of the preset temperature changing device reaches the first preset temperature threshold value; and when the time that the preset temperature changing device is kept under the first preset temperature threshold exceeds a second time length, cooling the preset temperature changing device, and when the temperature of the preset temperature changing device reaches a second preset temperature threshold, ending the temperature changing operation.

Optionally, the determining module specifically includes:

a first determining unit, configured to determine a preset operation frequency threshold value and a first operation frequency of the erase-program operation corresponding to the flash memory to be tested, and perform the erase-program operation of the first operation frequency on each memory cell to be tested;

A recording unit configured to record an operation end time of the erase-program operation of the first operation number when the first operation number is smaller than the preset operation number threshold, perform the erase-program operation of a second operation number on the memory cell to be tested when the operation end time is longer than a current time by a third duration, and record a total operation number of the erase-program operation of the memory cell to be tested;

and an updating unit configured to record an operation end time of the erase-program operation of the second operation number when the total operation number is less than the preset operation number threshold, perform the erase-program operation of the second operation number again on the memory cell to be tested when the operation end time is greater than the current time by the third time, and update the total operation number of the erase-program operation of the memory cell to be tested until the updated total operation number is equal to the preset operation number threshold.

Optionally, the determining module further includes:

the dividing unit is used for dividing the storage units in the flash memory to be tested to obtain a plurality of storage intervals;

The grouping unit is used for respectively determining a first number of storage units to be tested from each storage interval, grouping the storage units to be tested to obtain unit groups to be tested, wherein each unit group to be tested comprises the same number of storage units to be tested in each storage interval, and the number of storage units to be tested in each unit group to be tested is the same;

the first determining unit is further configured to determine the preset operation frequency thresholds corresponding to the to-be-tested cell groups, and perform the erase-program operation on the to-be-tested memory cells in each to-be-tested cell group.

Optionally, the grouping unit is specifically configured to:

randomly determining a first number of memory cells from the memory section as the memory cells to be tested when the memory section does not include the problem memory cells; and when the problem storage unit is included in the storage interval, taking neighbor storage units of the problem storage unit as the storage units to be tested, and when the second number of the neighbor storage units is smaller than the first number, randomly determining the rest number of storage units as the storage units to be tested from the storage units of the storage interval except the problem storage unit and the neighbor storage units of the problem storage unit, wherein the rest number is determined based on the first number and the second number.

Optionally, the reading module specifically includes:

the comparison unit is used for comparing the read results corresponding to the storage units to be tested in any one of the unit groups to be tested with the target graph to obtain the original error bit numbers corresponding to the storage units to be tested;

the computing unit is used for obtaining the original error rate corresponding to each storage unit to be tested according to the original error bit number and the storage capacity corresponding to each storage unit to be tested;

and the second determining unit is used for determining the data holding capacity of the flash memory to be tested based on the original error rate corresponding to each storage unit to be tested.

Optionally, the second determining unit is specifically configured to:

respectively determining whether the storage units to be tested exist in each unit group to be tested, wherein the original error rate of the storage units to be tested is larger than a preset error rate threshold value; when the original error rate of each storage unit to be tested in any one of the unit groups to be tested is smaller than or equal to the preset error rate threshold value, determining the data retention capacity of the flash memory to be tested based on the maximum preset operation frequency threshold value corresponding to different unit groups to be tested; when the storage unit to be tested with the original error rate larger than the preset error rate threshold exists in the unit group to be tested, taking any one unit group to be tested as a first unit group, determining a minimum preset operation frequency threshold corresponding to the first unit group, determining a second unit group with the preset operation frequency threshold smaller than the minimum preset operation frequency threshold from other unit groups to be tested, determining a maximum preset operation frequency threshold from the second unit group as a target operation frequency threshold, and determining the data retention capacity of the flash memory to be tested based on the target operation frequency threshold.

According to still another aspect of the present application, there is provided a storage medium having stored thereon a computer program which, when executed by a processor, implements the above-described method for testing data retention capability of a flash memory based on a self-recovery effect.

According to still another aspect of the present application, there is provided a computer device including a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, the processor implementing the above-mentioned method for testing data retention capacity of a flash memory based on self-recovery effect when executing the program.

By means of the technical scheme, after the flash memory to be tested is determined, the storage unit to be tested can be further determined from a plurality of storage units of the flash memory to be tested, and then each storage unit to be tested can be subjected to erasing-programming operation. When the operation times of the erasing-programming operation of the memory cells to be tested reach the preset operation times threshold, the erasing-programming operation of each memory cell to be tested can be stopped, and the power-off treatment is performed on the memory to be tested. When the power-off time reaches the first time, the flash memory to be tested can be electrified again, after the power-on, each storage unit to be tested in the flash memory to be tested can be subjected to one-time erasing-programming-reading operation, and each storage unit to be tested is written into the target graph in the erasing-programming-reading operation process. After each memory cell to be tested is subjected to one-time erase-programming-reading operation, the power supply to the flash memory to be tested can be stopped again, and the temperature change treatment operation can be further performed on the flash memory to be tested after the power is off. After the temperature change processing operation is performed on the flash memory to be tested, a reading operation can be performed on the memory cells to be tested, so that a reading result corresponding to each memory cell to be tested is obtained. And then, the data retention capacity of the flash memory to be tested can be determined according to the corresponding reading result of each memory cell to be tested. According to the embodiment of the application, the step of placing the power failure is set, the self-recovery effect of the flash memory can be fully considered, so that the testing accuracy of the data holding capacity of the flash memory is higher, and the data storage safety of the flash memory is improved.

The foregoing description is only an overview of the technical solutions of the present application, and may be implemented according to the content of the specification in order to make the technical means of the present application more clearly understood, and in order to make the above-mentioned and other objects, features and advantages of the present application more clearly understood, the following detailed description of the present application will be given.

Drawings

The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiments of the application and together with the description serve to explain the application and do not constitute an undue limitation to the application. In the drawings:

fig. 1 is a flow chart illustrating a method for testing data retention capability of a flash memory according to an embodiment of the present application;

FIG. 2 is a flow chart illustrating another method for testing data retention of a flash memory according to an embodiment of the present disclosure;

FIG. 3 is a flow chart illustrating another method for testing data retention of a flash memory according to an embodiment of the present disclosure;

fig. 4 is a schematic structural diagram of a testing device for data retention capability of a flash memory according to an embodiment of the present application.

Detailed Description

The present application will be described in detail hereinafter with reference to the accompanying drawings in conjunction with embodiments. It should be noted that, in the case of no conflict, the embodiments and features in the embodiments may be combined with each other.

In this embodiment, a method for testing data retention capability of a flash memory is provided, as shown in fig. 1, and the method includes:

step 101, determining a storage unit to be tested from a flash memory to be tested, and performing an erase-program operation on the storage unit to be tested;

the method for testing the data retention capacity of the flash memory can consider the self-recovery effect of the flash memory, so that the data retention capacity of the flash memory is predicted more accurately, and the safety of data storage is improved. The embodiment of the application can take the flash memory as a test object, and particularly can take the 3D multi-level cell NAND flash memory product as the test object. After determining the flash memory to be tested, the memory unit to be tested can be further determined from a plurality of memory units of the flash memory to be tested, specifically, one memory unit to be tested can be determined therefrom, and a plurality of memory units to be tested can also be determined. After determining the memory cells to be tested, then, an erase-program operation may be performed on each memory cell to be tested.

102, when the operation times of the erase-program operation reach a preset operation times threshold, performing power-off processing on the flash memory to be tested;

In this embodiment, when the erase-program operation is performed on each memory cell to be tested, the number of operations to perform the operation may be recorded, and when the number of operations of the operation reaches a preset operation number threshold, the erase-program operation may be stopped on each memory cell to be tested, and the power-off process may be performed on the memory to be tested. Here, the preset operation number threshold may be determined by the number of maximum executable erase-program operations specified in the data manual of the flash memory to be tested, and should be smaller than the number of maximum executable erase-program operations to ensure test safety and rationality of the data retention capability.

Step 103, when the power-off time reaches a first time, recovering the power supply of the flash memory to be tested, and performing an erase-program-read operation on the memory cells to be tested, wherein each memory cell to be tested writes in a target pattern when executing the erase-program-read operation;

in this embodiment, starting from the power-off of the flash memory to be tested, the timing may be performed by the timing device, when the timing device records that the power-off time reaches the first time, the flash memory to be tested may be powered on again, after the power-on, an erase-program-read operation may be performed on each memory cell to be tested in the flash memory to be tested, and during the erase-program-read operation, each memory cell to be tested writes in a target pattern, where the target pattern may specifically be a pseudo random pattern. In addition, the first time period is greater than 0 and should be less than 10% of the maximum operating time specified by the data manual corresponding to the flash memory to be tested.

104, performing power-off processing on the flash memory to be tested again, and performing temperature change processing operation on the flash memory to be tested after power-off;

in this embodiment, after one erase-program-read operation is performed on each memory cell to be tested, power supply to the flash memory to be tested may be stopped again, and a temperature change process operation may be further performed on the flash memory to be tested after power is turned off. The flash memory to be tested can be placed in a preset temperature changing device, and when the temperature changing treatment operation is not performed on the flash memory to be tested, the preset temperature changing device can be in a non-working state, and the environment temperature of the flash memory to be tested is room temperature; when the temperature change treatment operation is carried out on the flash memory to be tested, the preset temperature change device is in a working state so as to realize the temperature change treatment of the flash memory to be tested.

And 105, after the temperature change processing operation is finished, performing a reading operation on the storage unit to be tested, and determining the data holding capacity of the flash memory to be tested based on a reading result.

In this embodiment, after the temperature change processing operation is performed on the flash memory to be tested, a read operation may be performed on the memory cells to be tested, so as to obtain a read result corresponding to each memory cell to be tested. And then, the data retention capacity of the flash memory to be tested can be determined according to the corresponding reading result of each memory cell to be tested.

By applying the technical scheme of the embodiment, after the flash memory to be tested is determined, the memory cell to be tested can be further determined from a plurality of memory cells of the flash memory to be tested, and then, each memory cell to be tested can be subjected to an erase-program operation. When the operation times of the erasing-programming operation of the memory cells to be tested reach the preset operation times threshold, the erasing-programming operation of each memory cell to be tested can be stopped, and the power-off treatment is performed on the memory to be tested. When the power-off time reaches the first time, the flash memory to be tested can be electrified again, after the power-on, each storage unit to be tested in the flash memory to be tested can be subjected to one-time erasing-programming-reading operation, and each storage unit to be tested is written into the target graph in the erasing-programming-reading operation process. After each memory cell to be tested is subjected to one-time erase-programming-reading operation, the power supply to the flash memory to be tested can be stopped again, and the temperature change treatment operation can be further performed on the flash memory to be tested after the power is off. After the temperature change processing operation is performed on the flash memory to be tested, a reading operation can be performed on the memory cells to be tested, so that a reading result corresponding to each memory cell to be tested is obtained. And then, the data retention capacity of the flash memory to be tested can be determined according to the corresponding reading result of each memory cell to be tested. According to the embodiment of the application, the step of placing the power failure is set, the self-recovery effect of the flash memory can be fully considered, so that the testing accuracy of the data holding capacity of the flash memory is higher, and the data storage safety of the flash memory is improved.

Further, as a refinement and extension of the foregoing embodiment, in order to fully describe the implementation procedure of this embodiment, another method for testing the data retention capability of a flash memory is provided, as shown in fig. 2, where the method includes:

step 201, determining a memory cell to be tested from a flash memory to be tested, determining a preset operation frequency threshold value and a first operation frequency of the erase-program operation corresponding to the flash memory to be tested, and performing the erase-program operation of the first operation frequency on each memory cell to be tested;

in this embodiment, after determining the flash memory to be tested, the memory cell to be tested may be further determined from the flash memory to be tested, and a preset operation frequency threshold and a first operation frequency of an erase-program operation corresponding to the flash memory to be tested may be determined, where the preset operation frequency threshold may be determined by a maximum number of executable erase-program operations specified in a data manual of the flash memory to be tested, and the preset operation frequency threshold should be less than the maximum number of executable erase-program operations; the first operation times can be determined by a preset operation times threshold and a coefficient a, wherein a is more than or equal to 0 and less than or equal to 1, i.e. the first operation times can be equal to or less than the preset operation times threshold. Then, each memory cell to be tested in the flash memory to be tested can be respectively subjected to the erasing-programming operation of the first operation times.

Step 202, when the first operation frequency is smaller than the preset operation frequency threshold, recording operation ending time of the erasing-programming operation of the first operation frequency, when the operation ending time is longer than a current time by a third duration, performing the erasing-programming operation of a second operation frequency on the memory cell to be tested, and recording total operation frequency of the erasing-programming operation of the memory cell to be tested;

in this embodiment, after the erase-program operation of the first operation number is performed on each memory cell to be tested, the magnitude relation between the first operation number and the preset operation number threshold may be further determined. And when the first operation times are equal to a preset operation times threshold value, ending the erasing-programming operation, and then performing power-off treatment on the flash memory to be tested. When the first operation number is smaller than the threshold value of the preset operation number, the coefficient a in the previous step is smaller than 1, at this time, the operation end time after the first operation number of the erase-program operation is performed on the memory cells to be tested may be recorded, and the recording may be performed from the operation end time by using the timer device, and when the recorded time reaches the third duration, the second operation number of the erase-program operation is performed again on each memory cell to be tested, where the second operation number may be one. The total number of operations of the memory cell to be tested may be updated while the erase-program operation of the second number of operations is performed. For example, the first operation time is 100 times, the second operation time is 1 time, and after the erasing-programming operation of the second operation time is finished, the total operation time corresponding to the memory cell to be tested is 101 times. The third time period is longer than 0 and should be less than 10% of the maximum working time specified by the data manual corresponding to the flash memory to be tested.

Step 203, when the total operation number is less than the preset operation number threshold, recording an operation end time of the erase-program operation of the second operation number, and when the operation end time is more than the current time, performing the erase-program operation of the second operation number on the memory cell to be tested again, and updating the total operation number of the erase-program operation of the memory cell to be tested until the updated total operation number is equal to the preset operation number threshold;

in this embodiment, the magnitude relation between the total operation number of the memory cell to be tested and the preset operation number threshold value may be continuously determined. If the total operation times are still smaller than the preset operation times threshold, timing can be performed again after the erasing-programming operation of the second operation times is finished, when the timing time reaches the third duration, the erasing-programming operation of the second operation times is performed on the storage unit to be tested again, then the magnitude relation between the total operation times of the storage unit to be tested and the preset operation times threshold is judged again, if the updated total operation times are still smaller than the preset operation times threshold, timing is repeated, and when the timing time reaches the third duration again, the step of the erasing-programming operation of the second operation times is performed on the storage unit to be tested until the updated total operation times are finished when the updated total operation times are equal to the preset operation times threshold, and then the power-off processing can be performed on the storage to be tested. For example, the preset operation times threshold is 150 times, the first operation times are 120 times, the second operation times are 1 time, and the third time is 10min, then after the memory cell to be tested is subjected to 120 times of erase-program operation, the memory cell to be tested is stopped for 10min, then is subjected to 1 time of erase-program operation, then is stopped for 10min, then is subjected to 1 time of erase-program operation, and is stopped for 10min … … until the total operation times are 150 times, wherein the operation times of each repeated erase-program operation are the second operation times, and the time of each stopping is the third time. Further, it should be noted that, in the above steps, when the total number of operations reaches the preset number of operations threshold, all the third time periods are added up so as not to exceed the maximum operating time specified in the data manual of the flash memory to be tested.

Step 204, when the operation frequency of the erase-program operation reaches a preset operation frequency threshold, performing power-off processing on the flash memory to be tested;

step 205, when the power-off time reaches a first time, recovering the power supply of the flash memory to be tested, and performing an erase-program-read operation on the memory cells to be tested, wherein each memory cell to be tested writes in a target pattern when executing the erase-program-read operation;

in this embodiment, when the number of operations of performing the erase-program operation on the memory cells to be tested reaches the preset operation number threshold, the erase-program operation may be stopped for each memory cell to be tested, and the power-off process may be performed on the memory to be tested. When the power-off time reaches the first time, the flash memory to be tested can be electrified again, after the power-on, each storage unit to be tested in the flash memory to be tested can be subjected to one-time erasing-programming-reading operation, and each storage unit to be tested is written into the target graph in the erasing-programming-reading operation process.

Step 206, performing power-off processing on the flash memory to be tested again, performing temperature rising processing on the flash memory to be tested based on a preset temperature changing device after power-off, and keeping the temperature of the preset temperature changing device at a first preset temperature threshold when the temperature of the preset temperature changing device reaches the first preset temperature threshold;

In this embodiment, after the erasing-programming-reading operation is performed on the memory cell to be tested, the power-off processing is performed on the flash memory to be tested again, after the power-off processing is performed on the flash memory to be tested, specifically, the flash memory to be tested may be placed in a preset temperature changing device before the test, and after the power-off, the temperature of the flash memory to be tested may be raised through the preset temperature changing device, that is, the temperature of the flash memory to be tested is raised in the preset temperature changing device. When the temperature of the preset temperature changing device reaches the first preset temperature threshold value, the preset temperature changing device is not heated, and the temperature of the preset temperature changing device is kept at the first preset temperature threshold value. Here, the first preset temperature threshold should be smaller than the upper holding temperature limit specified on the flash memory manual to be tested.

Step 207, when the time that the preset temperature changing device is kept under the first preset temperature threshold exceeds a second duration, performing cooling treatment on the preset temperature changing device, and when the temperature of the preset temperature changing device reaches a second preset temperature threshold, ending the temperature changing treatment operation;

in this embodiment, the temperature of the preset temperature changing device may be kept at the first preset temperature threshold for a second period of time, then, the preset temperature changing device may be cooled until the temperature of the preset temperature changing device reaches the second preset temperature threshold, and the temperature changing operation of the flash memory to be tested by the preset temperature changing device is finished. Here, the second preset temperature threshold is typically room temperature, and the second time period may be calculated according to the following formula: second duration = Tr/TAF, where Tr is the data retention time of the flash memory required for testing at normal temperature, TAF is an acceleration factor calculated according to Arrhenius (Arrhenius) acceleration formula. For example, a manual for a flash memory to be tested specifies that the maximum data retention time for such a flash memory is 1 year at normal temperature. The TAF is 1309 calculated according to the Arrhenius acceleration formula, and the second duration=maximum data retention time at normal temperature/1309, resulting in 6 hours 41 minutes 30 seconds, i.e., in this case the second duration is 6 hours 41 minutes 30 seconds. According to the method and the device, the second duration is determined according to the data retention time of the flash memory at normal temperature required by the test and the acceleration factor, so that the test time can be effectively shortened, and the data retention capacity test result which is closer to the actual situation can be obtained.

And step 208, after the temperature change processing operation is finished, performing a reading operation on the storage unit to be tested, and determining the data holding capacity of the flash memory to be tested based on a reading result.

In this embodiment, after the temperature change processing operation is finished, a read operation may be further performed on the memory cell to be tested, and finally, the data retention capability of the flash memory to be tested may be determined according to the read result.

Further, another method for testing data retention capability of a flash memory is provided, as shown in fig. 3, the method includes:

step 301, dividing the storage units in the flash memory to be tested to obtain a plurality of storage intervals;

step 302, determining a first number of storage units to be tested from each storage interval, and grouping the storage units to be tested to obtain a unit group to be tested, wherein each unit group to be tested comprises the same number of storage units to be tested in each storage interval, and the number of storage units to be tested in each unit group to be tested is the same;

in this embodiment, after determining the flash memory to be tested, the memory cells in the flash memory to be tested may be divided into a plurality of memory sections. Then, a first number of memory cells to be tested may be determined from each memory section, and the memory cells to be tested may be grouped, and a group of memory cells to be tested may be obtained after grouping. Here, the same number of memory cells to be tested may be determined from the memory cells to be tested corresponding to each memory section to form one unit group to be tested, and for any two unit groups to be tested, the number of memory cells to be tested included therein is the same, that is, the number of memory cells to be tested in all the unit groups to be tested is the same. For example, the flash memory to be tested includes 1008 memory cells, and [1,1008] is equally divided into 4 memory sections, which are denoted as a, b, c, d memory sections. The same number of memory cells to be tested is determined from each memory section, here 3 memory cells to be tested are determined from each memory section, denoted as a1, a2, a3, b1, b2, b3, c1, c2, c3, d1, d2, d3, respectively, the determined memory cells to be tested are divided into 3 groups of memory cells to be tested, each group of memory cells to be tested comprising 4 memory cells to be tested, denoted as X, Y, Z groups. The X group comprises memory cells a1, b1, c1 and d1 to be tested; the Y group comprises memory cells a2, b2, c2 and d2 to be tested; the Z group includes the memory cells a3, b3, c3, d3 to be tested. It should be noted that each unit cell group to be tested includes the unit cells to be tested in each storage section.

Step 303, determining the threshold value of the preset operation times corresponding to each unit group to be tested, and performing the erase-program operation on the unit to be tested in each unit group to be tested;

in this embodiment, after obtaining a plurality of unit groups to be tested, a preset operation frequency threshold may be set for each unit group to be tested, and the preset operation frequency thresholds corresponding to different unit groups to be tested may be different, so that the data retention capability of the flash memory to be tested may be determined in more detail at a time. For example, for the above three cell groups to be tested X, Y, Z, where X groups include the memory cells to be tested a1, b1, c1, d1, a preset operation number threshold value of 1000 may be set; the Y group comprises storage units a2, b2, c2 and d2 to be tested, and a preset operation frequency threshold value can be set to be 2000; the Z group includes the memory cells a3, b3, c3, d3 to be tested, and the preset operation frequency threshold value can be set to 3000. After determining the threshold value of the preset operation times for each cell group to be tested, the erasing-programming operation can be performed on the memory cells to be tested in each cell group to be tested.

Step 304, when the operation frequency of the erase-program operation reaches a preset operation frequency threshold, performing power-off processing on the flash memory to be tested;

In this embodiment, when the memory cells to be tested in each of the cell groups to be tested have performed the erase-program operation of the preset operation number threshold corresponding to the cell group to be tested, the flash memory to be tested may be powered off. For example, the three unit groups to be tested are respectively an X group, a Y group and a Z group, and the preset operation frequency threshold value of the X group is 1000; the preset operation times threshold value of the Y group is 2000; the preset operation frequency threshold value of the Z group is 3000, and when the operation frequency of the erasing-programming operation of the storage unit to be tested of the Z group reaches the preset operation frequency threshold value 3000, the flash memory to be tested can be powered off.

Step 305, when the power-off time reaches a first time, recovering the power supply of the flash memory to be tested, and performing an erase-program-read operation on the memory cells to be tested, wherein each memory cell to be tested writes in a target pattern when executing the erase-program-read operation;

step 306, performing power-off processing on the flash memory to be tested again, and performing temperature change processing operation on the flash memory to be tested after power-off;

in this embodiment, when the power-off time reaches the first time, the flash memory to be tested may be powered on again, and after powering on, each memory cell to be tested in the flash memory to be tested may perform an erase-program-read operation, and each memory cell to be tested writes the target pattern during the erase-program-read operation. After each memory cell to be tested is subjected to one-time erase-programming-reading operation, the power supply to the flash memory to be tested can be stopped again, and the temperature change treatment operation can be further performed on the flash memory to be tested after the power is off.

Step 307, after the temperature change processing operation is finished, performing a reading operation on the storage units to be tested, and comparing the read results corresponding to the storage units to be tested in any one of the unit groups to be tested with the target graph to obtain an original error bit number corresponding to each storage unit to be tested;

in this embodiment, when the temperature change processing operation of the flash memory to be tested is finished, a read operation may be performed on each memory cell to be tested, so as to obtain a read result corresponding to each memory cell to be tested. And then, based on the reading results corresponding to the storage units to be tested in each unit group to be tested, comparing the reading results with the written target graph, and obtaining the original error bit numbers corresponding to the storage units to be tested after comparing.

Step 308, obtaining an original error rate corresponding to each storage unit to be tested according to the original error bit number and the storage capacity corresponding to each storage unit to be tested;

in this embodiment, after determining the number of original error bits corresponding to each memory cell to be tested, the original error rate corresponding to the memory cell to be tested may be further determined according to the number of original error bits and the storage capacity corresponding to the memory cell to be tested.

Step 309, determining the data retention capability of the flash memory to be tested based on the original bit error rate corresponding to each storage unit to be tested.

In this embodiment, after determining the original bit error rate of each memory cell to be tested, the data retention capability of the flash memory to be tested may be further determined by these original bit error rates. Specifically, the maximum original error rate corresponding to each memory cell to be tested in each unit group to be tested can be determined, and then the data retention capacity of the flash memory to be tested is determined through the maximum original error rate corresponding to each unit group to be tested.

In this embodiment of the present application, optionally, step 302 "determining the first number of storage units to be tested from each storage interval" specifically includes: randomly determining a first number of memory cells from the memory section as the memory cells to be tested when the memory section does not include the problem memory cells; and when the problem storage unit is included in the storage interval, taking neighbor storage units of the problem storage unit as the storage units to be tested, and when the second number of the neighbor storage units is smaller than the first number, randomly determining the rest number of storage units as the storage units to be tested from the storage units of the storage interval except the problem storage unit and the neighbor storage units of the problem storage unit, wherein the rest number is determined based on the first number and the second number.

In this embodiment, when determining the first number of memory cells to be tested from each memory section, it may be first determined whether the memory section contains a problem memory cell. If no problem memory cells are included in each memory interval, a first number of memory cells to be tested may be determined directly from each memory interval; if there is a storage section including a problem storage unit in the storage section, a second number of storage units to be tested may be determined from neighbor storage units of the problem storage unit when determining the storage unit to be tested from the storage section, and if the second number of storage units to be tested determined from the neighbor storage units of the problem storage unit is smaller than the first number, then a remaining number of storage units to be tested, that is, a difference between the first number and the second number, may be randomly determined from other storage units in the storage section, that is, storage units other than the problem storage unit and the neighbor storage unit of the problem storage unit.

In the embodiment of the present application, optionally, step 309 specifically includes:

step 309-1, determining whether there are the memory cells to be tested with the original bit error rate greater than a preset bit error rate threshold in each of the unit groups to be tested;

In this embodiment, each unit group to be tested is checked in turn to determine whether there are memory cells to be tested in each unit group to be tested whose original bit error rate is greater than a preset bit error rate threshold.

309-2, when the original bit error rate of each memory cell to be tested in any one of the unit groups to be tested is less than or equal to the preset bit error rate threshold, determining the data retention capability of the flash memory to be tested based on the maximum preset operation frequency threshold corresponding to different unit groups to be tested;

in this embodiment, if there is no memory cell to be tested having an original bit error rate greater than a preset bit error rate threshold in each unit group to be tested, it is indicated that the memory cells to be tested of each unit group to be tested pass the test, and at this time, the data retention capability of the flash memory to be tested may be determined based on the maximum preset operation number threshold corresponding to each unit group to be tested. For example, the flash memory to be tested corresponds to three unit groups to be tested, namely, an X group, a Y group and a Z group, the preset operation frequency threshold of the X group is 1000, the preset operation frequency threshold of the Y group is 2000, and the preset operation frequency threshold of the Z group is 3000, and if the original bit error rates corresponding to the storage units to be tested in the three unit groups to be tested are all smaller than or equal to the preset bit error rate threshold, the data retention capacity of the flash memory to be tested can be determined according to 3000 times. Specifically, if a manual of a flash memory to be tested specifies that the maximum data retention time of such a flash memory is 1 year at normal temperature, the data retention capacity of the flash memory is such that data can be retained for a period of 1 year after 3000 erase-program operations.

Step 309-3, when the to-be-tested memory cell whose original bit error rate is greater than the preset bit error rate threshold exists in the to-be-tested cell group, using any one of the to-be-tested cell groups as a first cell group, determining a minimum preset operation frequency threshold corresponding to the first cell group, determining a second cell group whose preset operation frequency threshold is smaller than the minimum preset operation frequency threshold from other to-be-tested cell groups, determining a maximum preset operation frequency threshold from the second cell group as a target operation frequency threshold, and determining the data retention capability of the to-be-tested flash memory based on the target operation frequency threshold.

In this embodiment, if one or more to-be-tested memory cells having an original bit error rate greater than a preset bit error rate threshold exist in each to-be-tested cell group, the to-be-tested memory cell groups may be used as first cell groups, then, a preset operation frequency threshold corresponding to each first cell group is determined respectively, and a minimum preset operation frequency threshold is determined from the preset operation frequency thresholds corresponding to the first cell groups. And removing the first unit group from all the unit groups to be tested corresponding to the flash memory to be tested, finding out the second unit groups with preset operation frequency threshold values smaller than the minimum preset operation frequency threshold value from the rest unit groups to be tested, determining the preset operation frequency threshold value corresponding to each second unit group, selecting the maximum preset operation frequency threshold value from the preset operation frequency threshold values corresponding to the second unit groups, taking the maximum preset operation frequency threshold value as a target operation frequency threshold value, and finally determining the data holding capacity of the flash memory to be tested according to the target operation frequency threshold value. For example, the flash memory to be tested corresponds to six to-be-tested unit groups, namely an A group, a B group, a C group, an X group, a Y group and a Z group, wherein the preset operation frequency threshold of the A group is 1000, the preset operation frequency threshold of the B group is 2000, the preset operation frequency threshold of the C group is 3000, the preset operation frequency threshold of the X group is 4000, the preset operation frequency threshold of the Y group is 5000, the preset operation frequency threshold of the Z group is 6000, and the C group and the Y group are respectively provided with to-be-tested storage units with original bit error rate larger than the preset bit error rate threshold, so that the C group and the Y group can be called as a first unit group, the preset operation frequency threshold of the C group is smaller than the preset operation frequency threshold of the Y group, the minimum preset operation frequency threshold corresponding to the first unit group is 3000, then the A group, the B group, the X group and the Z group are found out to-be-tested unit groups with preset operation frequency threshold smaller than the minimum preset operation frequency threshold 3000, namely the A group and the B group are second unit group, the C group and the B group are determined to be the maximum operation frequency threshold corresponding to the preset bit error rate threshold is 2000, and the threshold is kept to be the threshold to be the target to be tested, and the threshold is finally determined to be the threshold 2000. According to the method and the device, the data retention capacity of the flash memory to be tested can be more accurately determined by setting different preset operation frequency thresholds for each unit group to be tested.

Further, as a specific implementation of the method of fig. 1, an embodiment of the present application provides a device for testing data retention capability of a flash memory, as shown in fig. 4, where the device includes:

Optionally, the determining module specifically includes:

Optionally, the determining module further includes:

Optionally, the grouping unit is specifically configured to:

Optionally, the reading module specifically includes:

Optionally, the second determining unit is specifically configured to:

It should be noted that, other corresponding descriptions of each functional unit related to the testing apparatus for data retention capability of flash memory provided in the embodiments of the present application may refer to corresponding descriptions in the methods of fig. 1 to 3, which are not repeated herein.

Based on the above-mentioned method shown in fig. 1 to 3, correspondingly, the embodiment of the present application further provides a storage medium, on which a computer program is stored, where the computer program is executed by a processor to implement the above-mentioned method for testing the data retention capability of the flash memory based on the self-recovery effect shown in fig. 1 to 3.

Based on such understanding, the technical solution of the present application may be embodied in the form of a software product, which may be stored in a non-volatile storage medium (may be a CD-ROM, a U-disk, a mobile hard disk, etc.), and includes several instructions for causing a computer device (may be a personal computer, a server, or a network device, etc.) to perform the methods described in various implementation scenarios of the present application.

Based on the method shown in fig. 1 to 3 and the virtual device embodiment shown in fig. 4, in order to achieve the above object, the embodiment of the present application further provides a computer device, which may specifically be a personal computer, a server, a network device, etc., where the computer device includes a storage medium and a processor; a storage medium storing a computer program; a processor for executing a computer program to implement the above-described method for testing the data retention capacity of the flash memory based on the self-recovery effect as shown in fig. 1 to 3.

Optionally, the computer device may also include a user interface, a network interface, a camera, radio Frequency (RF) circuitry, sensors, audio circuitry, WI-FI modules, and the like. The user interface may include a Display screen (Display), an input unit such as a Keyboard (Keyboard), etc., and the optional user interface may also include a USB interface, a card reader interface, etc. The network interface may optionally include a standard wired interface, a wireless interface (e.g., bluetooth interface, WI-FI interface), etc.

It will be appreciated by those skilled in the art that the architecture of a computer device provided in the present embodiment is not limited to the computer device, and may include more or fewer components, or may combine certain components, or may be arranged in different components.

The storage medium may also include an operating system, a network communication module. An operating system is a program that manages and saves computer device hardware and software resources, supporting the execution of information handling programs and other software and/or programs. The network communication module is used for realizing communication among all components in the storage medium and communication with other hardware and software in the entity equipment.

From the above description of the embodiments, it will be apparent to those skilled in the art that the present application may be implemented by means of software plus necessary general hardware platforms, or may be implemented by hardware. After determining the flash memory to be tested, the memory cell to be tested may be further determined from among a plurality of memory cells of the flash memory to be tested, and then, an erase-program operation may be performed on each memory cell to be tested. When the operation times of the erasing-programming operation of the memory cells to be tested reach the preset operation times threshold, the erasing-programming operation of each memory cell to be tested can be stopped, and the power-off treatment is performed on the memory to be tested. When the power-off time reaches the first time, the flash memory to be tested can be electrified again, after the power-on, each storage unit to be tested in the flash memory to be tested can be subjected to one-time erasing-programming-reading operation, and each storage unit to be tested is written into the target graph in the erasing-programming-reading operation process. After each memory cell to be tested is subjected to one-time erase-programming-reading operation, the power supply to the flash memory to be tested can be stopped again, and the temperature change treatment operation can be further performed on the flash memory to be tested after the power is off. After the temperature change processing operation is performed on the flash memory to be tested, a reading operation can be performed on the memory cells to be tested, so that a reading result corresponding to each memory cell to be tested is obtained. And then, the data retention capacity of the flash memory to be tested can be determined according to the corresponding reading result of each memory cell to be tested. According to the embodiment of the application, the step of placing the power failure is set, the self-recovery effect of the flash memory can be fully considered, so that the testing accuracy of the data holding capacity of the flash memory is higher, and the data storage safety of the flash memory is improved.

Those skilled in the art will appreciate that the drawings are merely schematic illustrations of one preferred implementation scenario, and that the modules or flows in the drawings are not necessarily required to practice the present application. Those skilled in the art will appreciate that modules in an apparatus in an implementation scenario may be distributed in an apparatus in an implementation scenario according to an implementation scenario description, or that corresponding changes may be located in one or more apparatuses different from the implementation scenario. The modules of the implementation scenario may be combined into one module, or may be further split into a plurality of sub-modules.

The foregoing application serial numbers are merely for description, and do not represent advantages or disadvantages of the implementation scenario. The foregoing disclosure is merely a few specific implementations of the present application, but the present application is not limited thereto and any variations that can be considered by a person skilled in the art shall fall within the protection scope of the present application.

Claims

1. A method for testing the data retention capability of a flash memory, comprising:

after the temperature change treatment operation is finished, reading the storage unit to be tested;

based on the reading results corresponding to the storage units to be tested in any one of the unit groups to be tested, comparing the reading results with the target graph to obtain the original error bit numbers corresponding to the storage units to be tested; obtaining an original error rate corresponding to each storage unit to be tested according to the original error bit number and the storage capacity corresponding to each storage unit to be tested; and determining the data retention capacity of the flash memory to be tested based on the original error rate corresponding to each storage unit to be tested.

2. The method of claim 1, wherein the performing a temperature change process operation on the flash memory to be tested after the power failure specifically comprises:

3. The method of claim 1, wherein the performing an erase-program operation on the memory cell under test comprises:

4. The method of claim 1, wherein determining a memory cell to be tested from a flash memory to be tested and performing an erase-program operation on the memory cell to be tested, comprises:

5. The method according to claim 4, wherein determining a first number of the memory cells to be tested from each of the memory intervals, respectively, comprises:

6. The method according to claim 1, wherein the determining the data retention capability of the flash memory to be tested based on the original bit error rate corresponding to each of the memory cells to be tested specifically includes:

7. A device for testing data retention capability of a flash memory, comprising:

the reading module is used for reading the storage unit to be tested after the temperature change treatment operation is finished; based on the reading results corresponding to the storage units to be tested in any one of the unit groups to be tested, comparing the reading results with the target graph to obtain the original error bit numbers corresponding to the storage units to be tested; obtaining an original error rate corresponding to each storage unit to be tested according to the original error bit number and the storage capacity corresponding to each storage unit to be tested; and determining the data retention capacity of the flash memory to be tested based on the original error rate corresponding to each storage unit to be tested.

8. A storage medium having stored thereon a computer program, which when executed by a processor, implements the method of any of claims 1 to 6.

9. A computer device comprising a storage medium, a processor and a computer program stored on the storage medium and executable on the processor, characterized in that the processor implements the method of any one of claims 1 to 6 when executing the computer program.