CN116404078A - Light-emitting diode for improving light efficiency and preparation method thereof - Google Patents
Light-emitting diode for improving light efficiency and preparation method thereof Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/025—Physical imperfections, e.g. particular concentration or distribution of impurities
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
- H01L33/325—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen characterised by the doping materials
Abstract
The present disclosure provides a light emitting diode for improving light efficiency and a preparation method thereof, which belong to the technical field of photoelectron manufacturing. The light emitting diode includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked in this order; the active layer comprises a plurality of quantum well layers and a plurality of quantum barrier layers which are alternately stacked, the quantum barrier layers comprise a first sub-layer, a second sub-layer, a third sub-layer and a fourth sub-layer which are sequentially stacked, the first sub-layer comprises a u-type AlGaN layer, the second sub-layer and the fourth sub-layer comprise a GaN layer, and the third sub-layer comprises an n-type GaN layer. The embodiment of the disclosure can improve the preparation quality of the quantum barrier layer in the active layer and improve the luminous efficiency of the light emitting diode.
Description
Technical Field
The present disclosure relates to the field of optoelectronic manufacturing technology, and in particular, to a light emitting diode for improving light efficiency and a method for manufacturing the same.
Background
The light emitting diode (English: light Emitting Diode, abbreviated as LED) is used as a new product with great influence in the photoelectron industry, has the characteristics of small volume, long service life, rich and colorful colors, low energy consumption and the like, and is widely applied to the fields of illumination, display screens, signal lamps, backlights, toys and the like.
Light emitting diodes generally comprise: the active layer and the p-type GaN layer are sequentially laminated on the substrate. Wherein the active layer generally includes a plurality of InGaN quantum well layers and GaN quantum barrier layers alternately stacked.
In the preparation of the GaN quantum barrier layer, si and Al are generally doped, and since Al atoms are very active and are easily combined with N atoms, the effective doping efficiency of Si atoms is reduced. Therefore, co-doping Si and Al may cause Si atoms to exist in the quantum barrier GaN material in the form of impurities, thereby forming lattice defects to cause non-radiative recombination, affecting the light emitting efficiency of the light emitting diode.
Disclosure of Invention
The embodiment of the disclosure provides a light-emitting diode with improved light efficiency and a preparation method thereof, which can improve the preparation quality of a quantum barrier layer in an active layer and improve the light-emitting efficiency of the light-emitting diode. The technical scheme is as follows:
in one aspect, embodiments of the present disclosure provide a light emitting diode including a first semiconductor layer, an active layer, and a second semiconductor layer stacked in this order; the active layer comprises a plurality of quantum well layers and a plurality of quantum barrier layers which are alternately stacked, the quantum barrier layers comprise a first sub-layer, a second sub-layer, a third sub-layer and a fourth sub-layer which are sequentially stacked, the first sub-layer comprises a u-type AlGaN layer, the second sub-layer and the fourth sub-layer comprise a GaN layer, and the third sub-layer comprises an n-type GaN layer.
Optionally, the first sub-layer comprises Al w Ga 1-w And N layers, wherein w is more than 0 and less than 0.2.
Optionally, the third sub-layer has a Si doping concentration of 1×10 17 cm -3 Up to 1X 10 18 cm -3 。
Optionally, the thickness of the first sub-layer and the third sub-layer is 20nm to 80nm.
Optionally, the second sub-layer and the fourth sub-layer comprise p-type GaN layers, and the doping concentration of Mg of the second sub-layer and the fourth sub-layer is 1×10 17 cm -3 Up to 1X 10 18 cm -3 。
Optionally, the thickness of the second sub-layer and the fourth sub-layer is 5nm to 20nm.
On the other hand, the embodiment of the disclosure also provides a preparation method of the light emitting diode, which comprises the following steps: providing a substrate; forming a first semiconductor layer on the substrate; forming a plurality of quantum well layers and a plurality of quantum barrier layers which are alternately stacked on the first semiconductor layer to obtain an active layer, wherein the quantum barrier layers comprise a first sub-layer, a second sub-layer, a third sub-layer and a fourth sub-layer which are sequentially stacked, the first sub-layer comprises a u-type AlGaN layer, the second sub-layer and the fourth sub-layer comprise a GaN layer, and the third sub-layer comprises an n-type GaN layer; a second semiconductor layer is formed on the active layer.
Optionally, growing the first sub-layer includes: growing Al in pure nitrogen atmosphere at a growth temperature of 800-1000 ℃ under a growth pressure of 75-150 Torr w Ga 1-w And N layers, wherein w is more than 0 and less than 0.2.
Optionally, growing the third sub-layer includes: growing an n-type GaN layer in a nitrogen and hydrogen atmosphere at a growth pressure of 200Torr to 300Torr and a growth temperature of 800 ℃ to 1000 ℃, wherein the doping concentration of Si in the n-type GaN layer is 1×10 17 cm -3 Up to 1X 10 18 cm -3 。
Optionally, growing the second sub-layer includes: growing p-type GaN layer in nitrogen and hydrogen atmosphere at growth pressure of 200 Torr-300 Torr and growth temperature of 800 deg.C-1000 deg.C, and Mg concentration of 1×10 17 cm -3 Up to 1X 10 18 cm -3 The method comprises the steps of carrying out a first treatment on the surface of the Growing the fourth sub-layer includes: controlling the growth pressure in a nitrogen and hydrogen atmosphereAt 200Torr to 300Torr, a p-type GaN layer is grown at a growth temperature of 800 ℃ to 1000 ℃ and a concentration of Mg of 1X 10 17 cm -3 Up to 1X 10 18 cm -3 。
The technical scheme provided by the embodiment of the disclosure has the beneficial effects that at least:
the light emitting diode provided by the embodiment of the disclosure divides the quantum barrier layer in the active layer into four sub-layers, wherein the first sub-layer is a u-type AlGaN layer, al is doped but Si is not doped in the process of growing the AlGaN layer, and the third sub-layer is an n-type GaN layer doped with Si and not doped with Al. In this way, si and Al are respectively doped into different sublayers by adopting a separate doping mode in the quantum barrier layer. That is, when Al is doped, si is not doped, and when Si is doped, the quantum barrier layer is grown without Al doping.
Thus, when the first sub-layer in the quantum barrier layer is grown, an AlGaN layer doped with only Al is formed, so that the problem that Al atoms are easy to combine with N atoms when Al and Si are doped simultaneously, and the doping efficiency of Si atoms is reduced is avoided; and when the third sub-layer is grown, an n-type GaN layer doped with Si only is formed, so that the doping efficiency of Si atoms is prevented from being influenced by the existence of Al atoms, and the doping efficiency of Si atoms is facilitated. When the second sub-layer and the fourth sub-layer are grown, the GaN layer which is not doped with Al and Si is formed, and dislocation or extending direction of defects of the first sub-layer and the third sub-layer can be shielded or turned, so that the purpose of repairing lattice defects is achieved. The quantum barrier layer is obtained by adopting a separation and doping mode of Si and Al, so that the preparation quality of the quantum barrier layer in the active layer can be effectively improved, and the luminous efficiency of the light-emitting diode is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and other drawings may be obtained according to these drawings without inventive effort for a person of ordinary skill in the art.
Fig. 1 is a schematic structural diagram of a light emitting diode according to an embodiment of the present disclosure;
fig. 2 is a flowchart of a method for manufacturing a light emitting diode according to an embodiment of the present disclosure.
The various labels in the figures are described below:
10. a substrate;
20. a first semiconductor layer;
30. an active layer; 31. a quantum well layer; 32. a quantum barrier layer; 321. a first sub-layer; 322. a second sub-layer; 323. a third sub-layer; 324. a fourth sub-layer;
40. a second semiconductor layer; 41. a low temperature p-type AlGaN layer; 42. a p-type electron blocking layer; 43. a high temperature p-type GaN layer; 44. a p-type ohmic contact layer;
51. a buffer layer; 52. a nucleation layer; 53. an undoped GaN layer.
Detailed Description
For the purposes of clarity, technical solutions and advantages of the present disclosure, the following further details the embodiments of the present disclosure with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of a light emitting diode according to an embodiment of the present disclosure. As shown in fig. 1, the light emitting diode includes a first semiconductor layer 20, an active layer 30, and a second semiconductor layer 40, which are sequentially stacked.
As shown in fig. 1, the active layer 30 includes a plurality of quantum well layers 31 and a plurality of quantum barrier layers 32 alternately stacked, the quantum barrier layers 32 include a first sub-layer 321, a second sub-layer 322, a third sub-layer 323, and a fourth sub-layer 324 stacked in this order, the first sub-layer 321 includes a u-type AlGaN layer, the second sub-layer 322 and the fourth sub-layer 324 include a GaN layer, and the third sub-layer 323 includes an n-type GaN layer.
The light emitting diode provided in the embodiment of the present disclosure divides the quantum barrier layer 32 in the active layer 30 into four sub-layers, wherein the first sub-layer 321 is an AlGaN layer, al is doped but Si is not doped in the process of growing the AlGaN layer, and the third sub-layer 323 is an n-type GaN layer doped with Si and not doped with Al, so that Si and Al are respectively doped into different sub-layers in the quantum barrier layer 32 in a separate doping manner. I.e., si is not doped when Al is doped, and the quantum barrier layer 32 is grown without Al doping when Si is doped.
Thus, when the first sub-layer 321 in the quantum barrier layer 32 is grown, an AlGaN layer doped with only Al is formed, so that the problem that Al atoms are easily combined with N atoms when Al and Si are doped simultaneously, and the doping efficiency of Si atoms is reduced is avoided; when the third sub-layer 323 is grown, an n-type GaN layer doped with Si only is formed, so that the doping efficiency of Si atoms is prevented from being influenced by the existence of Al atoms, and the doping efficiency of Si atoms is facilitated. When the second sub-layer 322 and the fourth sub-layer 324 are grown, a GaN layer without Al and Si is formed, and dislocation or extending direction of defect of the first sub-layer 321 and the third sub-layer 323 can be shielded or turned to repair lattice defect. The quantum barrier layer 32 is obtained by adopting a mode of separate doping of Si and Al, so that the preparation quality of the quantum barrier layer 32 in the active layer 30 can be effectively improved, and the luminous efficiency of the light-emitting diode is improved.
Optionally, the first sub-layer 321 comprises Al w Ga 1-w And N layers, wherein w is more than 0 and less than 0.2.
Thus, only Al is doped when the first sub-layer 321 in the quantum barrier layer 32 is grown, and the ratio of Al to AlGaN is controlled within the above range to obtain an AlGaN layer, so that the problem that Al atoms are easily combined with N atoms when Al and Si are simultaneously doped, and the Si atom doping efficiency is reduced is avoided.
Alternatively, the thickness of the first sub-layer 321 is 20nm to 80nm. For example, the thickness of the first sub-layer 321 is 50nm.
Optionally, the third sublayer 323 has a Si doping concentration of 1×10 17 cm -3 Up to 1X 10 18 cm -3 。
In this way, only Si is doped when the third sub-layer 323 in the quantum barrier layer 32 is grown, and the doping concentration of Si is controlled within the above range, so as to obtain a GaN layer, avoid the influence of the presence of Al atoms on the doping efficiency of Si atoms, and facilitate the doping efficiency of Si atoms.
Illustratively, the Si doping concentration in the third sub-layer 323 is 2×10 17 cm -3 。
Optionally, the thickness of the third sub-layer 323 is 20nm to 80nm. For example, the thickness of the third sub-layer 323 is 50nm.
Alternatively, the second sub-layer 322 and the fourth sub-layer 324 include p-type GaN layers, and the doping concentration of Mg of the second sub-layer 322 and the fourth sub-layer 324 is 1×10 17 cm -3 Up to 1X 10 18 cm -3 。
In the above-described implementation, when the second sub-layer 322 and the fourth sub-layer 324 are grown, a GaN layer in which Mg is doped without Al and Si is formed. And the doping concentration of Mg is 1 multiplied by 10 17 cm -3 Up to 1X 10 18 cm -3 . The lightly Mg-doped GaN layer can shield or divert the extension direction of dislocation or defect of the first sub-layer 321 and the third sub-layer 323, thereby achieving the purpose of repairing lattice defect.
Illustratively, the second sub-layer 322 and the fourth sub-layer 324 have a doping concentration of Mg of 3×10 17 cm -3 。
Optionally, the thickness of both the second sub-layer 322 and the fourth sub-layer 324 is 5nm to 20nm. For example, the thickness of the second sub-layer 322 and the fourth sub-layer 324 are each 15nm.
Optionally, the light emitting diode may further comprise a substrate 10, the substrate 10 being a substrate carrying an epitaxial layer.
Illustratively, the substrate 10 is a sapphire substrate 10, a silicon substrate 10, or a silicon carbide substrate 10. The substrate 10 may be a flat substrate 10 or a patterned substrate 10.
As an example, in the presently disclosed embodiment, the substrate 10 is a sapphire substrate 10. The sapphire substrate 10 is a common substrate 10, and has mature technology and low cost. Specifically, the sapphire substrate 10 or the sapphire flat substrate 10 may be patterned.
Alternatively, one of the first semiconductor layer 20 and the second semiconductor layer 40 is an n-type layer, and the other of the first semiconductor layer 20 and the second semiconductor layer 40 is a p-type layer.
Illustratively, the first semiconductor layer 20 is an n-type layer.
Alternatively, the n-type layer may be an n-type GaN layer. The thickness of the n-type layer is 0.5 μm to 3 μm.
Wherein the dopant of the n-type layer is silane, and the concentration of the doped silane is 1×10 18 cm -3 Up to 1X 10 19 cm -3 。
Alternatively, the active layer 30 may include a quantum well layer 31 and a quantum barrier layer 32 of 8 to 15 cycles.
Wherein the quantum well layer 31 may include In x Ga 1-x N layer, 0.2<x<0.5. And the thickness of each quantum well layer 31 may be 2nm to 5nm.
Illustratively, the In component of each quantum well layer 31 has an equal proportion, and industrial mass production can be better achieved.
Wherein the first sub-layer 321 of the quantum barrier layer 32 includes a u-type AlGaN layer doped with Al and undoped Si, the second sub-layer 322 of the quantum barrier layer 32 includes a p-type GaN layer undoped with Al and Si and doped with Mg, the third sub-layer 323 of the quantum barrier layer 32 includes an n-type GaN layer doped with Si and undoped Al, and the fourth sub-layer 324 of the quantum barrier layer 32 includes a p-type GaN layer undoped with Al and Si and doped with Mg.
Illustratively, the second semiconductor layer 40 is a p-type layer.
Alternatively, the thickness of the p-type layer is 50nm to 100nm.
Wherein the dopant of the p-type layer is magnesium-cyclopentadienyl.
Among them, the p-type layer may include a low temperature p-type AlGaN layer 41, a p-type electron blocking layer 42, a high temperature p-type GaN layer 43, and a p-type ohmic contact layer 44 sequentially stacked on the active layer 30.
Illustratively, the p-type electron blocking layer 42 may be p-type Al k Ga 1-k N0.2<k<The thickness of the p-type electron blocking layer 42 may be 20nm to 100nm at 0.5 layer.
If the thickness of the p-type electron blocking layer 42 is too thin, the blocking effect on electrons is reduced, and if the thickness of the p-type electron blocking layer 42 is too thick, the absorption of light by the p-type electron blocking layer 42 is increased, resulting in a decrease in the luminous efficiency of the LED.
In the presently disclosed embodiment, both the low temperature p-type AlGaN layer 41 and the high temperature p-type GaN layer 43 are Mg doped.
The Mg doping concentration of the low temperature p-type AlGaN layer 41 is 5×10 19 cm -3 Up to 1X 10 21 cm -3 The Mg doping concentration of the high temperature p-type GaN layer 43 is 5×10 19 cm -3 Up to 1X 10 21 cm -3 。
Wherein the thickness of the low temperature p-type AlGaN layer 41 may be 50nm to 100nm, for example, the thickness of the low temperature p-type AlGaN layer 41 may be 80nm.
Wherein the thickness of the high temperature p-type GaN layer 43 may be 100nm to 200nm, for example, the thickness of the high temperature p-type GaN layer 43 may be 150nm.
Alternatively, the thickness of the p-type ohmic contact layer 44 may be 10nm to 50nm. By way of example, in the presently disclosed embodiment, the p-type ohmic contact layer 44 has a thickness of 20nm.
If the thickness of the p-type ohmic contact layer 44 is too thin, current contact between the epitaxial layer and the electrode is affected, and if the thickness of the p-type ohmic contact layer 44 is too thick, absorption of light by the p-type ohmic contact layer 44 is increased, resulting in a decrease in light emission efficiency of the LED.
Wherein the p-type ohmic contact layer 44 is Mg-doped, and the Mg doping concentration of the p-type ohmic contact layer 44 is 1×10 20 cm -3 Up to 1X 10 21 cm -3 。
Optionally, as shown in fig. 1, a buffer layer 51, a nucleation layer 52 and an undoped GaN layer 53 are further included between the substrate 10 and the n-type layer, and the buffer layer 51, the nucleation layer 52 and the undoped GaN layer 53 are sequentially stacked on the substrate 10.
In the embodiment of the present disclosure, the buffer layer 51 may be an AlN layer, which is an AlN layer grown at a temperature of between 400 to 800 ℃.
Wherein the thickness of the buffer layer 51 may be 10nm to 50nm. The thickness of the buffer layer 51 may be, for example, 20nm.
By setting the thickness of the buffer layer 51 within the above range, it is possible to avoid excessively thin thickness of the buffer layer 51, and to reduce the crystal quality of the epitaxial layer grown on the thinner buffer layer 51; it is also possible to avoid that the buffer layer 51 is too thick, which increases the absorption of light by the buffer layer 51, resulting in a decrease in the luminous efficiency of the light emitting diode.
Alternatively, nucleation layer 52 may be a three-dimensional GaN nucleation layer 52.
Illustratively, the growth thickness of the three-dimensional GaN nucleation layer 52 may be 0.3 μm to 0.5 μm.
In the embodiment of the disclosure, an undoped GaN layer 53 is further grown between the three-dimensional GaN nucleation layer 52 and the n-type layer, and compared with the substrate 10, the crystal quality of the subsequent epitaxial layer can be improved by setting the undoped GaN layer 53 as a transition layer because the undoped GaN layer 53 has a similar crystal structure to the n-type layer.
Wherein the thickness of the undoped GaN layer 53 is 0.5 μm to 3 μm. The thickness of the undoped GaN layer 53 is 2 μm, for example.
By setting the thickness of the undoped GaN layer 53 within the above range, it is possible to avoid excessively thin undoped GaN layer 53, which does not play a transitional role, and to reduce the crystal quality of the grown epitaxial layer; it is also possible to avoid that the thickness of the undoped GaN layer 53 is too thick, which increases the absorption of light by the undoped GaN layer 53, thereby resulting in a decrease in the light emitting efficiency of the light emitting diode.
Fig. 2 is a flowchart of a method for manufacturing a light emitting diode according to an embodiment of the present disclosure. The method is used to prepare the light emitting diode shown in fig. 1. As shown in fig. 2, the preparation method comprises:
s11: a substrate is provided.
S12: a first semiconductor layer is formed on a substrate.
S13: a plurality of quantum well layers and a plurality of quantum barrier layers are alternately stacked on the first semiconductor layer to obtain an active layer.
The quantum barrier layer comprises a first sub-layer, a second sub-layer, a third sub-layer and a fourth sub-layer which are sequentially stacked, wherein the first sub-layer comprises a u-type AlGaN layer doped with Al and undoped with Si, the second sub-layer and the fourth sub-layer comprise p-type GaN layers undoped with Al and Si, and the third sub-layer comprises an n-type GaN layer doped with Si and undoped with Al.
S14: a second semiconductor layer is formed on the active layer.
The light-emitting diode prepared by the preparation method divides a quantum barrier layer in an active layer into four sub-layers, wherein a first sub-layer is a u-type AlGaN layer doped with Al and undoped with Si, and a third sub-layer is an n-type GaN layer doped with Si and undoped with Al, so that Si and Al are respectively doped into different sub-layers in the quantum barrier layer in a separate doping mode. That is, when Al is doped, si is not doped, and when Si is doped, the quantum barrier layer is grown without Al doping.
Thus, when the first sub-layer in the quantum barrier layer is grown, an AlGaN layer doped with only Al is formed, so that the problem that Al atoms are easy to combine with N atoms when Al and Si are doped simultaneously, and the doping efficiency of Si atoms is reduced is avoided; and when the third sub-layer is grown, a GaN layer doped with Si only is formed, so that the doping efficiency of Si atoms is prevented from being influenced by the existence of Al atoms, and the doping efficiency of Si atoms is facilitated. When the second sub-layer and the fourth sub-layer are grown, the GaN layer which is not doped with Al and Si is formed, and dislocation or extending direction of defects of the first sub-layer and the third sub-layer can be shielded or turned, so that the purpose of repairing lattice defects is achieved. The quantum barrier layer is obtained by adopting a separation and doping mode of Si and Al, so that the preparation quality of the quantum barrier layer in the active layer can be effectively improved, and the luminous efficiency of the light-emitting diode is improved.
In step S11, the substrate is a sapphire substrate, a silicon substrate, or a silicon carbide substrate. The substrate may be a flat substrate or a patterned substrate.
As an example, in embodiments of the present disclosure, the substrate is a sapphire substrate. The sapphire substrate is a common substrate, the technology is mature, and the cost is low. Specifically, the substrate can be a patterned sapphire substrate or a sapphire flat substrate.
In step S11, the sapphire substrate may be subjected to a high temperature cleaning process in a hydrogen atmosphere of 1000 to 1200 ℃ for 5to 20 minutes, and then subjected to a nitriding process.
In step S11, the sapphire substrate may be subjected to pretreatment, placed in an MOCVD (Metal-organic Chemical Vapor Deposition, metal organic chemical vapor deposition) reaction chamber, and baked for 12 to 18 minutes. As an example, in the embodiment of the present disclosure, the sapphire substrate is baked for 15 minutes.
Specifically, the baking temperature may be 1000 ℃ to 1200 ℃, and the pressure in the MOCVD reactor during baking may be 100mbar to 200mbar.
The following steps may be further included before step S12:
first, a buffer layer is grown on a substrate.
Specifically, the sapphire substrate is put into a physical vapor deposition (Physical Vapour Deposition, PVD for short) device for magnetron sputtering deposition of an AlN layer, and a buffer layer is obtained.
Wherein the growth temperature in the PVD equipment is 400-800 ℃, the sputtering power is 3000-5000W, the pressure is 2-20 mtorr, and the AlN layer deposition thickness is 10-50 nm.
And secondly, placing the substrate plated with the buffer layer into an MOCVD system to grow a nucleation layer. The MOCVD reaction chamber temperature is 950 ℃ to 1080 ℃, the reaction chamber pressure is controlled between 300torr and 500torr, and the growth thickness of the nucleation layer is 0.3 μm to 0.5 μm under the condition of the mixed atmosphere of nitrogen, hydrogen and ammonia.
And thirdly, growing an undoped GaN layer on the nucleation layer.
In the embodiment of the disclosure, a non-doped GaN layer is further grown between the nucleation layer and the n-type layer, and compared with the substrate, the crystal quality of the subsequent epitaxial layer can be improved by setting the non-doped GaN layer as a transition layer due to the fact that the crystal structure of the non-doped GaN layer is similar to that of the n-type layer.
Wherein the thickness of the undoped GaN layer is 0.5 μm to 3 μm. The thickness of the undoped GaN layer is 2 μm, for example.
Specifically, MOCVD grows undoped GaN buffer recovery layers. The temperature in the MOCVD system is adjusted to 1000 ℃ to 1150 ℃ and the growth pressure is 100Torr to 300Torr, and the undoped GaN layer with the thickness of 0.5 μm to 3 μm is grown.
Step S12 may include: an n-type layer is grown on the undoped GaN layer.
Alternatively, the n-type layer may be an n-type GaN layer. The thickness of the n-type layer is 0.5 μm to 3 μm. Wherein the dopant of the n-type layer is silane.
Specifically, the temperature in the MOCVD system is adjusted to 1000 ℃ to 1150 ℃, the growth pressure is 100Torr to 300Torr, the n-type doped GaN layer with the thickness of 0.5 μm to 3 μm is grown, and the concentration of doped Si of the n-type GaN layer is 1 multiplied by 10 18 cm -3 Up to 1X 10 19 cm -3 。
Step S13 may include: an active layer is grown on the n-type GaN layer.
Wherein the active layer includes a quantum well layer and a quantum barrier layer of 8 to 15 periods.
Wherein the quantum well layer may include In x Ga 1-x N layer, 0.2<x<0.5. And the thickness of each quantum well layer may be 2nm to 5nm.
Illustratively, the ratio of In components In each quantum well layer is equal, and industrial mass production can be better realized.
The process of preparing each quantum well layer may include: under the pure nitrogen atmosphere growth condition, the growth temperature is controlled to be 700 ℃ to 850 ℃, the growth pressure is controlled to be 200torr to 500torr, and the In with the thickness of 2nm to 5nm is grown x Ga 1-x And N layers.
The quantum barrier layer comprises a first sub-layer, a second sub-layer, a third sub-layer and a fourth sub-layer which are sequentially stacked. The first sub-layer comprises a u-type AlGaN layer doped with Al and undoped with Si, the second sub-layer comprises a p-type GaN layer undoped with Al and Si and doped with Mg, the third sub-layer comprises an n-type GaN layer doped with Si and undoped with Al, and the fourth sub-layer comprises a p-type GaN layer undoped with Al and Si and doped with Mg.
Optionally, the first sub-layer comprises Al w Ga 1-w And N layers, wherein w is more than 0 and less than 0.2.
Optionally, the thickness of the first sub-layer is 20nm to 80nm. For example, the thickness of the first sub-layer is 50nm.
Optionally, the third sub-layer has a Si doping concentration of 1×10 17 cm -3 Up to 1X 10 18 cm -3 。
Illustratively, the Si doping concentration in the third sub-layer is 2×10 17 cm -3 。
Optionally, the thickness of the third sub-layer is 20nm to 80nm. For example, the thickness of the third sub-layer is 50nm.
Optionally, the second and fourth sublayers comprise Mg-doped p-type GaN layers, the Mg doping concentration of the second and fourth sublayers being 1×10 17 cm -3 Up to 1X 10 18 cm -3 。
Exemplary, the second and fourth sublayers have a Mg doping concentration of 3×10 17 cm -3 。
Optionally, the thickness of the second sub-layer and the fourth sub-layer is from 5nm to 20nm. For example, the thickness of the second and fourth sub-layers is 15nm.
Wherein growing the first sub-layer may include: growing Al in pure nitrogen atmosphere at a growth temperature of 800-1000 ℃ under a growth pressure of 75-150 Torr w Ga 1-w And N layers, wherein w is more than 0 and less than 0.2.
In the embodiments of the present disclosure, low pressure growth is employed in the growth of the first sub-layer, but low pressure growth is detrimental to Si atom incorporation. Therefore, the first sub-layer may be grown with only Al to avoid affecting the Si atom doping ratio. And, the low pressure is favorable for effectively doping Al atoms, and reduces the existence of Al atoms in impurity form so as to form lattice defects to cause non-radiative recombination. Because Al atoms are very active, parasitic reaction is generated with N atoms in the mass transportation process, and Al atoms diffused to the surface to participate in the growth of the material are reduced greatly, so that the Al component in the final AlGaN material is smaller than the Al component in the gas phase.
Growing the second sub-layer may include: growing p-type GaN layer in nitrogen and hydrogen atmosphere at growth pressure of 200 Torr-300 Torr and growth temperature of 800 deg.C-1000 deg.C, and Mg concentration of 1×10 17 cm -3 Up to 1X 10 18 cm -3 。
Growing the third sub-layer includes: growing an n-type GaN layer in a nitrogen and hydrogen atmosphere at a growth pressure of 200Torr to 300Torr and a growth temperature of 800 ℃ to 1000 ℃, wherein the doping concentration of Si in the n-type GaN layer is 1×10 17 cm -3 Up to 1X 10 18 cm -3 。
Growing the fourth sub-layer includes: growing p-type GaN layer in nitrogen and hydrogen atmosphere at growth pressure of 200 Torr-300 Torr and growth temperature of 800 deg.C-1000 deg.C, and Mg concentration of 1×10 17 cm -3 Up to 1X 10 18 cm -3 。
In step S14, growing the second semiconductor layer may include a p-type layer.
Alternatively, the thickness of the p-type layer is 30nm to 120nm. Wherein the dopant of the p-type layer is magnesium-cyclopentadienyl.
The p-type layer may include a low temperature p-type AlGaN layer, a p-type electron blocking layer, a high temperature p-type GaN layer, and a p-type ohmic contact layer sequentially stacked on the active layer.
Illustratively, the p-type electron blocking layer may be p-type Al k Ga 1-k N(0.1<k<0.5 A p-type electron blocking layer may be 20nm to 100nm thick.
If the thickness of the p-type electron blocking layer is too thin, the blocking effect on electrons is reduced, and if the thickness of the p-type electron blocking layer is too thick, the absorption of light by the p-type electron blocking layer is increased, thereby reducing the luminous efficiency of the LED.
In the embodiment of the disclosure, the low-temperature p-type AlGaN layer and the high-temperature p-type GaN layer are both Mg doped.
Illustratively, the low temperature p-type AlGaN layer includes Al w Ga 1-w N layer, 0.1<w<0.3。
The Mg doping concentration of the low-temperature p-type AlGaN layer is 5 multiplied by 10 19 cm -3 Up to 1X 10 21 cm -3 The Mg doping concentration of the high-temperature p-type GaN layer is 5 multiplied by 10 19 cm -3 Up to 1X 10 21 cm -3 。
Wherein the thickness of the low temperature p-type AlGaN layer may be 50nm to 100nm, for example, the thickness of the low temperature p-type AlGaN layer may be 80nm.
Wherein the thickness of the high temperature p-type GaN layer may be 100nm to 200nm, for example, the thickness of the low and high temperature p-type GaN layer may be 150nm.
Alternatively, the thickness of the p-type ohmic contact layer may be 10nm to 50nm. As an example, in the embodiments of the present disclosure, the thickness of the p-type ohmic contact layer is 20nm.
If the thickness of the p-type ohmic contact layer is too thin, current contact between the epitaxial layer and the electrode is affected, and if the thickness of the p-type ohmic contact layer is too thick, absorption of light by the p-type ohmic contact layer is increased, resulting in a decrease in luminous efficiency of the LED.
Wherein the p-type ohmic contact layer is doped with Mg, and the Mg doping concentration of the p-type ohmic contact layer is 1 multiplied by 10 20 cm -3 Up to 1X 10 21 cm -3 。
When the low-temperature p-type AlGaN layer is grown, the growth temperature is regulated to 700-800 ℃, and the low-temperature p-type AlGaN layer is grown under the environment of 200-500 Torr and the thickness is 50-100 nm.
Wherein the Mg doping concentration of the low-temperature p-type AlGaN layer is 5 multiplied by 10 19 cm -3 Up to 1X 10 21 cm -3 。
In growing the p-type electron blocking layer, the growth temperature is regulated to 800-1000 ℃ and the growth pressure is 100-300 Torr, and the p-type electron blocking layer can be Al k Ga 1-k N layer, 0.2<k<0.5, thickness of 20nm to 100nm.
When growing a high temperature p-type GaN layer, controlling the growth pressure in an environment of 200Torr to 600Torr, growing the p-type GaN layer with the growth temperature of 800 ℃ to 1000 ℃ and the thickness of 100nm to 200nm, and the doping concentration of Mg is 5 multiplied by 10 19 cm -3 Up to 1X 10 21 cm -3 。
When the p-type ohmic contact layer is grown, the growth temperature is regulated to 850-1000 ℃, the p-type ohmic contact layer with the thickness of 10-50 nm is grown on the high-temperature p-type GaN layer under the environment of the growth pressure of 100-300 torr, and the doping concentration of Mg is 1 multiplied by 10 20 cm -3 Up to 1X 10 21 cm -3 。
After step S14, the preparation method may further include: the light emitting diode is annealed.
After the epitaxial growth is finished, the temperature of the reaction chamber is reduced to 650 ℃ to 850 ℃ and then the reaction chamber is heated to N 2 Annealing treatment is carried out for 5min to 15min in atmosphere, then the temperature is gradually reduced to room temperature, and then the chip is manufactured through subsequent processing technologies of cleaning, deposition, photoetching and etching.
In particular implementations, embodiments of the present disclosure may employ high purity H 2 Or/and N 2 As a carrier gas, TEGa or TMGa as Ga source, TMIn as In source, siH 4 TMAL as an aluminum source, ammonia as an N source, cp as an N-type dopant 2 Mg acts as a p-type dopant.
The foregoing description of the preferred embodiments of the present disclosure is provided for the purpose of illustration only, and is not intended to limit the disclosure to the particular embodiments disclosed, but on the contrary, the intention is to cover all modifications, equivalents, alternatives, and alternatives falling within the spirit and principles of the disclosure.
Claims (10)
1. A light emitting diode, characterized in that the light emitting diode comprises a first semiconductor layer (20), an active layer (30) and a second semiconductor layer (40) which are laminated in this order;
the active layer (30) comprises a plurality of quantum well layers (31) and a plurality of quantum barrier layers (32) which are alternately stacked, the quantum barrier layers (32) comprise a first sub-layer (321), a second sub-layer (322), a third sub-layer (323) and a fourth sub-layer (324) which are sequentially stacked, the first sub-layer (321) comprises a u-type AlGaN layer, the second sub-layer (322) and the fourth sub-layer (324) comprise a GaN layer, and the third sub-layer (323) comprises an n-type GaN layer.
2. The light emitting diode according to claim 1, wherein the first sub-layer (321) comprises Al w Ga 1-w And N layers, wherein w is more than 0 and less than 0.2.
3. The led of claim 1, wherein the third sub-layer (323) has a Si doping concentration of 1 x 10 17 cm -3 Up to 1X 10 18 cm -3 。
4. The light emitting diode according to claim 1, wherein the thickness of the first sub-layer (321) and the third sub-layer (323) are each 20nm to 80nm.
5. The light emitting diode according to any one of claims 1 to 4, wherein the second sub-layer (322) and the fourth sub-layer (324) comprise p-type GaN layers, and the Mg doping concentration of the second sub-layer (322) and the fourth sub-layer (324) is 1 x 10 17 cm -3 Up to 1X 10 18 cm -3 。
6. The light emitting diode according to any one of claims 1 to 4, wherein the thickness of the second sub-layer (322) and the fourth sub-layer (324) is each 5nm to 20nm.
7. A method of manufacturing a light emitting diode, the method comprising:
providing a substrate;
forming a first semiconductor layer on the substrate;
forming a plurality of quantum well layers and a plurality of quantum barrier layers which are alternately stacked on the first semiconductor layer to obtain an active layer, wherein the quantum barrier layers comprise a first sub-layer, a second sub-layer, a third sub-layer and a fourth sub-layer which are sequentially stacked, the first sub-layer comprises a u-type AlGaN layer, the second sub-layer and the fourth sub-layer comprise a GaN layer, and the third sub-layer comprises an n-type GaN layer;
a second semiconductor layer is formed on the active layer.
8. The method of manufacturing of claim 7, wherein growing the first sub-layer comprises:
growing Al in pure nitrogen atmosphere at a growth temperature of 800-1000 ℃ under a growth pressure of 75-150 Torr w Ga 1-w And N layers, wherein w is more than 0 and less than 0.2.
9. The method of manufacturing of claim 7, wherein growing the third sub-layer comprises:
growing an n-type GaN layer in a nitrogen and hydrogen atmosphere at a growth pressure of 200Torr to 300Torr and a growth temperature of 800 ℃ to 1000 ℃, wherein the doping concentration of Si in the n-type GaN layer is 1×10 17 cm -3 Up to 1X 10 18 cm -3 。
10. The method of manufacturing of claim 7, wherein growing the second sub-layer comprises:
growing p-type GaN layer in nitrogen and hydrogen atmosphere at growth pressure of 200 Torr-300 Torr and growth temperature of 800 deg.C-1000 deg.C, and Mg concentration of 1×10 17 cm -3 Up to 1X 10 18 cm -3 ；
Growing the fourth sub-layer includes:
growing p-type GaN layer in nitrogen and hydrogen atmosphere at growth pressure of 200 Torr-300 Torr and growth temperature of 800 deg.C-1000 deg.C, and Mg concentration of 1×10 17 cm -3 Up to 1X 10 18 cm -3 。
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