CN116380135A - Charge transfer balance type capacitor-to-voltage conversion circuit - Google Patents

Charge transfer balance type capacitor-to-voltage conversion circuit Download PDF

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Publication number
CN116380135A
CN116380135A CN202310658403.4A CN202310658403A CN116380135A CN 116380135 A CN116380135 A CN 116380135A CN 202310658403 A CN202310658403 A CN 202310658403A CN 116380135 A CN116380135 A CN 116380135A
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capacitor
capacitance
sensitive
basic
switch
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CN116380135B (en
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魏全
段晓敏
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Chengdu Jingrong Microelectronics Co ltd
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Chengdu Jingrong Microelectronics Co ltd
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
    • G01D5/00—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
    • G01D5/12—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means
    • G01D5/14—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage
    • G01D5/24—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means influencing the magnitude of a current or voltage by varying capacitance
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P15/00—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
    • G01P15/02—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses
    • G01P15/08—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values
    • G01P15/125—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values by capacitive pick-up
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Amplifiers (AREA)
  • Networks Using Active Elements (AREA)

Abstract

The invention discloses a charge transfer balance type capacitor-to-voltage conversion circuit, which comprises a sensitive capacitor structure, a basic capacitor structure and an operational amplifier circuit, wherein a trimming capacitor structure is further arranged between the sensitive capacitor structure and the basic capacitor structure, the basic capacitor structure is connected with the operational amplifier circuit, and reference voltage VREF and two-phase non-overlapping clock signals are respectively input at two sides of the sensitive capacitor structure and the basic capacitor structureΦ1 andΦ2, atΦStage 1, using reference voltage VREF applied to the sensitive capacitance structure to generate a charge proportional to the capacitance change, inΦAnd 2, completing conversion from the capacitor to the voltage through an operational amplifier circuit. The invention has simple structure, does not need a special input common mode feedback circuit structure, and can achieve successful conversion from capacitance to voltage by adopting a charge transfer balance structure.

Description

Charge transfer balance type capacitor-to-voltage conversion circuit
Technical Field
The present invention relates to the field of integrated circuits, and more particularly, to a charge transfer balanced capacitor-to-voltage conversion circuit.
Background
With the development of microelectromechanical systems (MEMS) technology, MEMS sensors have been one of the most widely used MEMS devices in the past few years, and the sensors have played an important role in people's life and work as if they were eyes and skin, wherein MEMS accelerometer sensors, gyroscope sensors, pressure sensors, etc. are widely used to measure acceleration, angular velocity, and pressure of objects, and have been widely used in automotive, industrial automation, aerospace, and other numerous fields.
However, the existing sensor circuit technology has the defects of complex design (needing to input common mode feedback, a demodulator, a filter and other modules), poor sensor adaptability, high power consumption, poor linearity, large capacitance-to-voltage conversion leakage, complex time sequence and the like, so that when the sensor circuit technology is applied to a system, the system heats up greatly, the temperature coefficient of the system is influenced, the test precision is influenced, and the power consumption and the circuit complexity of the sensor are not ideal.
Disclosure of Invention
The invention aims to provide a charge transfer balance type capacitor-to-voltage conversion circuit so as to solve the technical problem of how to improve the accuracy and linearity of capacitor-to-voltage conversion.
The invention is realized by adopting the following technical scheme: a charge transfer balance type capacitance-to-voltage conversion circuit comprises a sensitive capacitance structure, a basic capacitance structure and an operational amplification circuit, wherein a trimming capacitance structure is further arranged between the sensitive capacitance structure and the basic capacitance structure, the basic capacitance structure is connected with the operational amplification circuit, and reference voltage VREF and two-phase non-overlapping clock signals are respectively input to two sides of the sensitive capacitance structure and the basic capacitance structureΦ1 andΦ2, atΦStage 1, using reference voltage VREF applied to the sensitive capacitance structure to generate a charge proportional to the capacitance change, inΦAnd 2, completing conversion from the capacitor to the voltage through an operational amplifier circuit.
Further, a conducting switch S1 and a grounding switch S2 are arranged between the reference voltage VREF and the sensitive capacitor structure, the sensitive capacitor structure comprises sensitive capacitors Cs1 and Cs2, the reference voltage VREF is connected between the sensitive capacitors Cs1 and Cs2, and the phase of the conducting switch S1 is equal to that of the sensitive capacitor structureΦ1 the same, the phase of the grounding switch S2 is equal toΦ2 are identical.
Further, a conducting switch S3 and a grounding switch S4 are arranged between the reference voltage VREF and a basic capacitor structure, the basic capacitor structure comprises basic capacitors Cc1 and Cc2, the reference voltage VREF is connected between the basic capacitors Cc1 and Cc2, and the basic capacitor Cc1 and the sensitivity are providedCapacitor Cs1 is connected, base capacitor Cc2 is connected with sensitive capacitor Cs2, and the phase of switch S3 is turned onΦ2 the phase of the grounding switch S4 is the same asΦ1 are identical.
Further, the trimming capacitor structure comprises a plurality of trimming capacitors, and the trimming capacitors are respectively connected between the sensitive capacitor structure and the basic capacitor structure through a series of switches.
Further, the intermediate node of the trimming capacitor is connected between the base capacitors Cc1 and Cc 2.
Further, the operational amplifier circuit includes an operational amplifier a, a positive input end of the operational amplifier a is connected with the basic capacitor Cc2, and a negative input end of the operational amplifier a is connected with the basic capacitor Cc 1.
Furthermore, the operational amplifier circuit further comprises feedback capacitors Cf1 and Cf2, one end of the feedback capacitor Cf1 is connected with the negative input end of the operational amplifier A, and the other end of the feedback capacitor Cf1 is connected with the output node Voutp; one end of the feedback capacitor Cf2 is connected with the positive input end of the operational amplifier A, and the other end of the feedback capacitor Cf2 is connected with the output node Voutn.
Further, two ends of the feedback capacitor Cf1 are provided with a switch Srt1, two ends of the feedback capacitor Cf2 are provided with a switch Srt2, and phases of the switch Srt1 and the switch Srt2 are equal to each otherΦ2 are identical.
Further, the charge variation amounts of the feedback capacitor Cf1 and the feedback capacitor Cf2 are as follows:
Qcf=VREF*(Cs+ΔC)-VREF*Cc=VREF*ΔC=Cf*Vout；
wherein Cs is a basic capacitance of the sensitive capacitance structure; cc is the balance capacitance; Δc is the capacitance change sensed up and down the sensitive capacitance structure, vout=voutp-Voutn.
The invention has the beneficial effects that: the invention has simple structure, does not need a special input common mode feedback circuit structure, and can achieve successful conversion from capacitance to voltage by adopting a charge transfer balance structure; the capacitor-to-voltage conversion can be performed without additional modules such as a demodulator and a filter, and the requirement can be met by one operational amplifier, so that the complexity of a circuit is reduced; the resistor device which is not easily affected by noise and temperature is arranged in the feedback branch circuit of the conversion voltage, and the switch is arranged in the feedback branch circuit, so that the influence of environmental factors on the voltage is reduced, the electric leakage caused by the resistor is eliminated, and the conversion precision and the linearity are improved. The invention realizes the matching of the mechanical structures of the sensors with various capacitance by programming and adjusting the size of the balance capacitance, and has good adaptability. The capacitor-to-voltage conversion method has the advantages of high conversion accuracy, low noise, simple and practical circuit structure and negligible influence of temperature.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to the structures shown in these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of the structure of the present invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures.
Some embodiments of the present invention are described in detail below with reference to the accompanying drawings. The following embodiments and features of the embodiments may be combined with each other without conflict.
Example 1
Referring to FIG. 1, a charge transfer balanced capacitor to voltage conversion circuit includes2 sensitive capacitors Cs1 and Cs2,2 basic capacitors Cc1 and Cc2 balancing the sensitive capacitors, 2 operational amplifier feedback capacitors Cf1 and Cf2, a plurality of trimming capacitors (including Cm11, cm12, cm13 … Cm1n; cm21, cm22, cm23 … Cm2 n), and two-phase non-overlapping clock signalsΦ1 andΦ2, a plurality of switches (including: S1, S2, S3, S4; srt1, srt2; sw11, sw12, sw13 … Sw1n; sw21, sw22, sw23 … Sw2 n), 1 reference voltage VREF,1 operational amplifier A. The voltage output of the circuit structure is proportional to the variation of the capacitance of the sensitive structure, wherein the phases of S1 and S4 are the sameΦ1, S2, S3, srt1, srt2 are in the same phaseΦ2. The charge transfer characteristic is obtained by using the charge-discharge characteristic of the capacitor, and the charge transfer characteristic is obtained byΦStage 1, using reference voltage applied on sensitive structure capacitor to act on the changed capacitor to generate electric charge proportional to the changed capacitor, and thenΦ2And in the stage, the charge obtained by sampling in the previous stage is amplified by an operational amplifier A, so that the required conversion relation from the capacitor to the voltage is obtained.
In this embodiment, the input reference voltage VREF is connected to one end of S1, and the other end of S1 is connected to one end of S2 and the intermediate node of the sensitive structure at node 1; cs1 and Cc1, cm11, cm12, cm13 … Cm1n are connected to the same point 2 after passing through a series of switches Sw (including Sw11, sw12, sw13 … Sw1 n), cs2 and Cc2, cm21, cm22, cm23 … Cm2n are connected to the same point 3 after passing through a series of switches Sw (including Sw21, sw22, sw23 … Sw2 n).
In this embodiment, the input reference voltage VREF is connected to one end of the S3, the other end of the S3 is connected to one end of the S4 and an intermediate node of a series of balance capacitors at the node 4, one end of the Cf1 and one end of the switch Srt1 are connected to the node 2 with the negative input terminal of the operational amplifier a, the other end is connected to the node Voutp, one end of the Cf2 and one end of the switch Srt2 are connected to the node 3 with the positive input terminal of the operational amplifier a, and the other end is connected to the node Voutn.
The analysis of the discrete time circuit can obtain that when Srt1 and Srt2 are conducted, the charge storage relational expression is as follows:
Qc=VREF*Cc，Qs=0；
when Srt1 and Srt2 are disconnected, the charge storage relationship is:
Qs=VREF*(Cs+ΔC)，Qc=0；
by the two relational expressions, in the process of on/off of the Srt1 and Srt2 switches, the charge change amounts of Cf1 and Cf2 are as follows:
Qcf=VREF*(Cs+ΔC)-VREF*Cc=VREF*ΔC=Cf*Vout；
wherein Cs is the basic capacitance of the accelerometer sensitive structure, cc is the balance capacitance corresponding to the gauge outfit, Δc is the opposite capacitance variation sensed up and down by the accelerometer sensitive structure, vout=voutp-Voutn.
Based on the above embodiments, the present invention has at least the following technical effects:
the invention has simple structure, does not need a special input common mode feedback circuit structure, and can achieve successful conversion from capacitance to voltage by adopting a charge transfer balance structure; the capacitor-to-voltage conversion can be performed without additional modules such as a demodulator and a filter, and the requirement can be met by one operational amplifier, so that the complexity of a circuit is reduced; the resistor device which is not easily affected by noise and temperature is arranged in the feedback branch circuit of the conversion voltage, and the switch is arranged in the feedback branch circuit, so that the influence of environmental factors on the voltage is reduced, the electric leakage caused by the resistor is eliminated, and the conversion precision and the linearity are improved. The invention realizes the matching of the mechanical structures of the sensors with various capacitance by programming and adjusting the size of the balance capacitance, and has good adaptability. The capacitor-to-voltage conversion method has the advantages of high conversion accuracy, low noise, simple and practical circuit structure and negligible influence of temperature.
It should be noted that the terms "coupled," "configured," and "arranged" are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implying a number of technical features being indicated. Thus, features defining "connected", "arranged" may explicitly or implicitly include one or more such features. Moreover, the terms "connected," "configured," and the like are used to distinguish between similar objects and do not necessarily describe a particular order or sequence. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. And for the foregoing embodiments, for simplicity of explanation, the same is shown as a series of acts, but it should be understood by those skilled in the art that the present application is not limited by the order of acts described, as some steps may occur in other orders or concurrently in accordance with the application. Further, those skilled in the art will also appreciate that the embodiments described in the specification are presently preferred embodiments, and that the acts referred to are not necessarily required for the present application.
In the above embodiments, the basic principle and main features of the present invention and advantages of the present invention are described. It will be appreciated by persons skilled in the art that the present invention is not limited by the foregoing embodiments, but rather is shown and described in what is considered to be illustrative of the principles of the invention, and that modifications and changes can be made by those skilled in the art without departing from the spirit and scope of the invention, and therefore, is within the scope of the appended claims.

Claims (9)

1. The charge transfer balance type capacitance-to-voltage conversion circuit is characterized by comprising a sensitive capacitance structure, a basic capacitance structure and an operational amplification circuit, wherein a trimming capacitance structure is further arranged between the sensitive capacitance structure and the basic capacitance structure, the basic capacitance structure is connected with the operational amplification circuit, and reference voltage VREF and two-phase non-overlapping clock signals are respectively input at two sides of the sensitive capacitance structure and the basic capacitance structureΦ1 andΦ2, atΦStage 1, using reference voltage VREF applied to the sensitive capacitance structure to generate a charge proportional to the capacitance change, inΦAnd 2, completing conversion from the capacitor to the voltage through an operational amplifier circuit.
2. The charge transfer balanced capacitor to voltage conversion circuit according to claim 1, wherein a turn-on switch S1 and a ground switch S2 are disposed between the reference voltage VREF and a sensitive capacitor structure, the sensitive capacitor structure includes sensitive capacitors Cs1 and Cs2, the reference voltage VREF is connected between the sensitive capacitors Cs1 and Cs2, and a phase of the turn-on switch S1 is equal to a phase of the ground switch S2Φ1 the same, the phase of the grounding switch S2 is equal toΦ2 are identical.
3. The charge transfer balanced type capacitor to voltage conversion circuit according to claim 2, wherein a conducting switch S3 and a grounding switch S4 are arranged between the reference voltage VREF and a basic capacitor structure, the basic capacitor structure comprises basic capacitors Cc1 and Cc2, the reference voltage VREF is connected between the basic capacitors Cc1 and Cc2, the basic capacitor Cc1 is connected with a sensitive capacitor Cs1, the basic capacitor Cc2 is connected with the sensitive capacitor Cs2, and the phase of the conducting switch S3 is connected withΦ2 the phase of the grounding switch S4 is the same asΦ1 are identical.
4. A charge transfer balanced capacitor to voltage conversion circuit according to claim 3 wherein said trimming capacitor structure comprises a plurality of trimming capacitors connected between said sensing capacitor structure and said base capacitor structure by a series of switches, respectively.
5. The charge transfer balanced capacitor to voltage conversion circuit of claim 4, wherein an intermediate node of the trimming capacitor is connected between the base capacitors Cc1 and Cc 2.
6. The charge transfer balanced capacitance-to-voltage conversion circuit of claim 5 wherein the operational amplifier circuit comprises an operational amplifier a having a positive input connected to a base capacitance Cc2 and a negative input connected to a base capacitance Cc 1.
7. The charge transfer balanced capacitor to voltage conversion circuit according to claim 6, wherein said operational amplifier circuit further comprises feedback capacitors Cf1 and Cf2, said feedback capacitor Cf1 having one end connected to the negative input terminal of the operational amplifier a and the other end connected to the output node Voutp; one end of the feedback capacitor Cf2 is connected with the positive input end of the operational amplifier A, and the other end of the feedback capacitor Cf2 is connected with the output node Voutn.
8. The charge transfer balanced capacitor to voltage conversion circuit of claim 7, wherein switch Srt1 is provided across feedback capacitor Cf1, switch Srt2 is provided across feedback capacitor Cf2, and phases of switch Srt1 and switch Srt2 are equal to each otherΦ2 are identical.
9. The charge transfer balanced capacitor to voltage conversion circuit according to claim 7, wherein the charge variation of the feedback capacitor Cf1 and the feedback capacitor Cf2 is as follows:
Qcf=VREF*(Cs+ΔC)-VREF*Cc=VREF*ΔC=Cf*Vout；
wherein Cs is a basic capacitance of the sensitive capacitance structure; cc is the balance capacitance; Δc is the capacitance change sensed up and down the sensitive capacitance structure, vout=voutp-Voutn.
CN202310658403.4A 2023-06-06 2023-06-06 Charge transfer balance type capacitor-to-voltage conversion circuit Active CN116380135B (en)

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CN116545428A (en) * 2023-07-05 2023-08-04 成都市晶蓉微电子有限公司 High-precision capacitance-to-voltage conversion error trimming circuit and method
CN116625339A (en) * 2023-07-20 2023-08-22 成都市晶蓉微电子有限公司 System and method for realizing phase demodulation in MEMS gyroscope digital circuit

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