CN116343717B - Display device and driving method thereof - Google Patents
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- CN116343717B CN116343717B CN202310306236.7A CN202310306236A CN116343717B CN 116343717 B CN116343717 B CN 116343717B CN 202310306236 A CN202310306236 A CN 202310306236A CN 116343717 B CN116343717 B CN 116343717B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/39—Control of the bit-mapped memory
- G09G5/393—Arrangements for updating the contents of the bit-mapped memory
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The application discloses a display device and a driving method thereof, relating to the technical field of display, wherein the driving method of the display device comprises the following steps: receiving a data signal of the front end; reducing the transmission quantity of the data signal to form a first preset signal; increasing the induction gray level of the first preset signal to form a second preset signal; driving a display panel by taking the second preset signal as an output signal; wherein the data signal and the second preset signal display the same color depth. By the driving method, the refresh rate of the display device can be improved on the premise of not upgrading hardware.
Description
Technical Field
The present application relates to the field of display technologies, and in particular, to a display device and a driving method thereof.
Background
Along with the rapid development of display technology and increasing consumer demand, the refresh rate of the display is higher and higher, and the currently mainstream high-brush display resolution is above 90Hz, but the high-brush display has higher requirements on the hardware condition of display driving, a chip corresponding to the high refresh rate is required to be used, and the corresponding production cost is increased.
Due to the high price of high-brush displays, current usage scenarios such as office, home, etc. that do not require high refresh rates still employ displays with conventional refresh rates. Therefore, how to improve the refresh rate of the display and realize high-brush application without upgrading hardware is a difficult problem to be solved in the industry.
Disclosure of Invention
The application aims to provide a display device and a driving method thereof, which can improve the refresh rate of the display device on the premise of not upgrading hardware.
The application discloses a driving method of display equipment, which comprises the following steps:
Receiving a data signal of the front end;
reducing the transmission quantity of the data signal to form a first preset signal;
increasing the induction gray level of the first preset signal to form a second preset signal; and
Driving a display panel by taking the second preset signal as an output signal;
Wherein the data signal and the second preset signal display the same color depth.
Optionally, before the step of reducing the transmission amount of the data signal to form the first preset signal, the method further includes the step of:
Calculating the corresponding analog clock frequency when the data signal is used as an output signal;
comparing the analog clock frequency with a preset clock frequency; and
When the analog clock frequency exceeds the preset clock frequency, executing the subsequent steps; and when the analog clock frequency does not exceed the preset clock frequency, driving the display panel by taking the data signal as an output signal.
Optionally, in the step of calculating the corresponding analog clock frequency when the data signal is used as the output signal, the analog clock frequency is calculated by the formula t= (h×v×f× 3*M)/6N;
wherein T represents the analog clock frequency, H represents the sum of the number of scanning lines of an effective area and the number of scanning lines of a blank area in the display panel, V represents the sum of the number of data lines of the effective area and the number of data lines of the blank area in the display panel, F represents the refresh rate, M represents the display color depth, and N represents the number of display signal channels.
Optionally, before the step of reducing the transmission amount of the data signal to form the first preset signal, the method further includes the step of:
Receiving a selection signal;
detecting a signal type of the selection signal; and
When the selection signal is in a first signal condition, driving the display panel in a first driving mode, and executing the subsequent steps; when the selection signal is in a second signal condition, driving the display panel in a second driving mode, and driving the display panel by taking the data signal as an output signal;
wherein the refresh rate in the first drive mode is greater than the refresh rate in the second drive mode.
Optionally, the first signal condition is a low level, and the second signal condition is a high level; in the first driving mode, the display mode of the output signal is 6bit+2FRC, and the refresh rate is 100Hz; in the second driving mode, the display mode of the output signal is 8 bits and the refresh rate is 75Hz.
Optionally, in the step of reducing the transmission amount of the data signal to form a first preset signal, the transmission amount of the data signal is reduced by reducing the display color depth of the data signal.
Optionally, in the step of increasing the induced gray level of the first preset signal to form the second preset signal, the induced gray level of the first preset signal is increased by using a gray level enhancement technique.
The application also discloses a display device driven by the driving method, the display device comprises a display panel, a time sequence control chip, a data driving circuit and a front end, wherein the front end is connected with the time sequence control chip through an input signal line, and the time sequence control chip receives a data signal output by the front end through the input signal line; the time sequence control chip is connected with the data driving circuit through an output signal line, and the data driving circuit receives an output signal output by the time sequence control chip through the output signal line; the data driving circuit is connected with the display panel and drives the display panel through the output signal; the time sequence control chip comprises a color depth weakening module and a gray scale enhancement module, wherein the color depth weakening module receives the data signals and reduces the transmission quantity of the data signals, and the gray scale enhancement module is respectively connected with the color depth weakening module and the data driving circuit and provides induction gray scales to compensate the transmission quantity reduced by the color depth weakening module.
Optionally, the timing control chip further includes an analog-to-digital converter and a selector, where the analog-to-digital converter is connected to the front end and calculates an analog clock frequency corresponding to the data signal; the input end of the selector is connected with the analog-to-digital converter, the first output end of the selector is connected with the color depth weakening module, and the second output end of the selector is connected with the data driving circuit; when the analog clock frequency exceeds the preset clock frequency, the selector outputs the data signal to the color depth weakening module; when the analog clock frequency does not exceed the preset clock frequency, the selector outputs the data signal to the data driving circuit.
Optionally, the display device further includes a gamma integrated chip, a first storage module and a second storage module, wherein the first storage module stores first driving mode information, and the second storage module stores second driving mode information; one end of the gamma integrated chip is connected with the time sequence control chip, the other end of the gamma integrated chip is connected with the data driving circuit, and the first storage module and the second storage module are respectively connected with the time sequence control chip; the front end comprises a signal receiver, the time sequence control chip further comprises a detection module, the signal receiver is connected with the detection module through a selection signal line, and the detection module receives a selection signal output by the signal receiver through the selection signal line;
The detection module is respectively connected with the first storage module and the second storage module, and when the selection signal is a first signal, the detection module controls the time sequence control chip to read the first driving mode information, so that the color depth weakening module receives the data signal and controls the gamma integration chip to output corresponding first gamma voltage; when the selection signal is a second signal, the detection module controls the time sequence control chip to read the second driving mode information, so that the data driving circuit receives the data signal and controls the gamma integration chip to output a corresponding second gamma voltage.
Compared with the scheme of improving the refresh rate of the display equipment by improving the hardware level of the display equipment, the method and the device have the advantages that on the premise of not changing the hardware of the display equipment, the step of reducing the transmission quantity of the data signals is added, so that when the transmission quantity of the data signals is increased due to the display under the condition of improving the refresh rate, the reduced transmission quantity does not exceed the supportable range of the driving hardware, and the display with high refresh rate can be realized; the application does not need to upgrade the chip hardware in the aspect of display driving, so the cost is not increased, thereby the low-configuration display driving hardware achieves the same high refresh rate display effect as the high-configuration display driving hardware, further the cost of the product can be reduced, and the market competitiveness of the product is improved. In addition, the application increases the induction gray level after the transmission quantity of the data signal is reduced, so that the display color depth of the output signal finally output to the display panel is the same as the display color depth of the data signal before the original transmission quantity is reduced, thereby avoiding the problem of reduced display effect caused by the application of improving the refresh rate of the display device.
Drawings
The accompanying drawings, which are included to provide a further understanding of embodiments of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It is evident that the figures in the following description are only some embodiments of the application, from which other figures can be obtained without inventive effort for a person skilled in the art. In the drawings:
fig. 1 is a schematic view of a display device according to a first embodiment of the present application;
fig. 2 is a flowchart of a driving method of a display device according to a first embodiment of the present application;
fig. 3 is a schematic view of a display device according to a second embodiment of the present application;
fig. 4 is a flowchart of a driving method of a display device according to a second embodiment of the present application;
fig. 5 is a schematic view of a display device according to a third embodiment of the present application;
fig. 6 is a flowchart of a driving method of a display device according to a third embodiment of the present application.
10, A display device; 100. a front end; 110. a signal receiver; 120. a selection signal line; 200. a timing control chip; 210. an input signal line; 220. an output signal line; 230. a color depth reduction module; 240. a gray scale enhancement module; 250. an analog-to-digital converter; 260. a selector; 270. a detection module; 300. a data driving circuit; 400. a display panel; 500. a gamma integrated chip; 600. a first storage module; 700. and a second memory module.
Detailed Description
It is to be understood that the terminology used herein, the specific structural and functional details disclosed are merely representative for the purpose of describing particular embodiments, but that the application may be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein.
The application is described in detail below with reference to the attached drawings and alternative embodiments.
Embodiment one:
As shown in fig. 1, fig. 1 is a schematic diagram of a display device according to a first embodiment of the present application, where the display device 10 includes a display panel 400, a timing control chip 200, a data driving circuit 300, and a front end 100, the front end 100 is connected to the timing control chip 200 through an input signal line 210, and the timing control chip 200 receives a data signal output from the front end 100 through the input signal line 210; the timing control chip 200 is connected to the data driving circuit 300 through an output signal line 220, and the data driving circuit 300 receives an output signal outputted from the timing control chip 200 through the output signal line 220; the data driving circuit 300 is connected to the display panel 400, and drives the display panel 400 by the output signal. The timing control chip 200 includes a color depth weakening module 230 and a gray scale enhancement module 240, the color depth weakening module 230 receives the data signal to reduce the transmission amount of the data signal, and the gray scale enhancement module 240 is respectively connected with the color depth weakening module 230 and the data driving circuit 300 to provide an inductive gray scale to compensate the transmission amount reduced by the color depth weakening module 230.
Specifically, the data signal is a Low-Voltage differential signal (Low-Voltage Dif-FERENTIAL SIGNALING, LVDS), and the output signal is a Mini Low-Voltage differential signal (Mini Low Voltage DIFFERENTIAL SIGNALING, mini-LVDS); the transmission amount of the data signal specifically refers to the color depth of the data signal, and of course, may also refer to other conditions such as the number of channels, and for convenience of explanation, the transmission amount in the embodiment of the present application is expressed in terms of color depth.
In the embodiment of the present application, after the LVDS signal is converted into the Mini-LVDS signal in the timing control chip 200, the color depth weakening module 230 directly reduces the color depth of the Mini-LVDS signal, compensates the induced gray level by using the gray level enhancement module 240, and finally outputs the compensated signal, regardless of the initial color depth of the Mini-LVDS signal.
Correspondingly, as shown in fig. 2, the embodiment of the present application further discloses a driving method of a display device, which is used for driving the display device 10, and specifically includes the steps of:
S1: receiving a data signal of the front end;
S2: reducing the transmission quantity of the data signal to form a first preset signal;
s3: increasing the induction gray level of the first preset signal to form a second preset signal;
s4: driving a display panel by taking the second preset signal as an output signal;
Wherein the data signal and the second preset signal display the same color depth.
In step S1, the timing control chip 200 receives the data signal transmitted from the front end 100, and the transmission amount of the data signal is not checked until step S2; in step S2, the color depth reducing module 230 reduces the display color depth of the data signal to reduce the transmission amount of the data signal, and the color depth reducing module 230 directly reduces the color depth of the data signal to form a first preset signal no matter what the display color depth is received; in step S3, increasing the induced gray level of the first preset signal by the gray level enhancing module 240 to form a second preset signal; in step S3, the timing Control chip 200 starts a grayscale enhancement technique (FRAME RATE Control, FRC) to increase the induced grayscale, and the grayscale enhancement module 240 is used to transmit a second preset signal to the data driving circuit 300, so that the data driving circuit 300 is used to drive the display panel 400.
Compared with the scheme of improving the refresh rate of the display device 10 by improving the hardware level of the display device 10, the application can realize the display with high refresh rate by increasing the step of adjusting down the transmission quantity of the data signal on the premise of not changing the hardware of the display device 10, so that when the transmission quantity of the data signal is increased due to the display performed under the condition of improving the refresh rate, the adjusted down transmission quantity is not beyond the supportable range of the driving hardware; the embodiment of the application does not need to upgrade the chip hardware in the aspect of display driving, so the cost is not increased, thereby the low-configuration display driving hardware achieves the same high refresh rate display effect as the high-configuration display driving hardware, further the cost of products can be reduced, and the market competitiveness of the products is improved. In addition, the application increases the sensing gray scale after the transmission amount of the data signal is reduced, so that the display color depth of the output signal finally output to the display panel 400 is the same as the display color depth of the data signal before the original transmission amount is reduced, thereby avoiding the problem of reduced display effect caused by the application of improving the refresh rate of the display device 10.
Taking a conventional display with a resolution of 1920×1080 as an example, the number of scan lines in the active area of the display panel 400 is 1920, and the number of scan lines in the blank area is 280, i.e. the total number of scan lines in the display panel 400 is 2200; next, the number of data lines in the active area in the display panel 400 is 1080, and the number of data lines in the blank area is 45, that is, the total number of data lines in the display panel 400 is 1125; in addition, the display color depth is 8 bits, the number of display signal channels is 2, and the clock frequency acceptable by the timing control chip 200 output mini-LVDS signals and the data driving circuit 300 is 400MHz.
When the refresh rate is 60Hz, the Mini-LVDS clock frequency t= (h×v×f× 3*M)/6 n= (2200×1125×60×3×8)/(6×2) =297 MHz output by the timing control chip 200 is used. Wherein H represents the sum of the number of scanning lines of the active area and the number of scanning lines of the blank area in the display panel 400, V represents the sum of the number of data lines of the active area and the number of data lines of the blank area in the display panel 400, F represents the refresh rate, M represents the display color depth, and N represents the number of display signal channels. Therefore, when the display with the refresh rate of 60Hz is performed, the Mini-LVDS clock frequency output by the time sequence control chip 200 does not exceed 400MHz, so that the display can realize 60Hz refresh rate application.
When the refresh rate is 75Hz, the Mini-LVDS clock frequency t= (2200×1125×75×3×8)/(6×2) = 371.25MHz output by the timing control chip 200 is adopted, and thus it can be seen that the Mini-LVDS clock frequency output by the timing control chip 200 does not exceed 400MHz when the display with the refresh rate of 75Hz is performed, so that the display can realize the refresh rate application of 75 Hz.
When the refresh rate is 90Hz, the Mini-LVDS clock frequency t= (2200×1125×90×3×8)/(6×2) =445.5 MHz output by the timing control chip 200 is adopted, and thus it is seen that the Mini-LVDS clock frequency output by the timing control chip 200 exceeds 400MHz when the display with the refresh rate of 90Hz is performed, and thus the display cannot realize the refresh rate application of 90 Hz.
After the scheme in the embodiment of the application is adopted, the display color depth is changed from 8bit to 6bit, and when the refresh rate is 90Hz, the Mini-LVDS clock frequency T= (2200×1125×90×3×6)/(6×2) = 334.125MHz output by the time sequence control chip 200 is adopted; when the refresh rate is 100Hz, the Mini-LVDS clock frequency t= (2200×1125×100×3×6)/(6×2) = 371.25MHz output by the timing control chip 200 is employed. Therefore, under the condition that the chip hardware in the aspect of display driving is not updated, the technical scheme in the embodiment of the application can enable the display which cannot realize the application with the refresh rate of 90Hz to realize the application with the refresh rates of 90Hz and 100Hz, thereby greatly improving the market competitiveness.
As a specific implementation manner, the embodiment of the application changes the Mini-LVDS signal from 8bit to 6bit for display, thereby reducing the data transmission quantity, reducing the frequency of the Mini-LVDS clock to 75% of the original frequency, realizing the frame+ technology, in addition, in order to reduce the influence on the display effect, the timing Control chip 200 starts the gray scale enhancement technology FRC (FRAME RATE Control) to increase the 2bit induction gray scale, and utilizes the 6bit+2FRC technology to replace the original 8bit to realize the 16.7M color depth as well, thereby ensuring the display effect.
Embodiment two:
As shown in fig. 3, as a display device provided in the second embodiment of the present application, the timing control chip 200 in the display device 10 includes, in addition to the color depth reducing module 230 and the gray scale enhancing module 240, an analog-to-digital converter 250 and a selector 260, where the analog-to-digital converter 250 is connected to the front end 100, and calculates an analog clock frequency corresponding to the data signal; an input end of the selector 260 is connected with the analog-to-digital converter 250, a first output end of the selector 260 is connected with the color depth reducing module 230, and a second output end of the selector 260 is connected with the data driving circuit 300; when the analog clock frequency exceeds the preset clock frequency, the selector 260 outputs the data signal to the color depth reducing module 230, the data signal is outputted to the gray scale enhancing module 240 to increase the induced gray scale after the color depth of the data signal is reduced by the color depth reducing module 230, and finally outputted to the data driving circuit 300; when the analog clock frequency does not exceed the preset clock frequency, the selector 260 directly outputs the data signal to the data driving circuit 300.
Correspondingly, as shown in fig. 4, the embodiment of the present application further discloses a driving method of a display device, which is used for driving the display device 10, and the driving method of the display device includes the steps of:
S1: receiving a data signal of the front end;
s11: calculating the corresponding analog clock frequency when the data signal is used as an output signal;
S12: comparing the analog clock frequency with a preset clock frequency;
A: when the analog clock frequency exceeds the preset clock frequency, performing the subsequent step (a 1); when the analog clock frequency does not exceed the preset clock frequency, driving a display panel (a 2) by taking the data signal as an output signal;
S2: reducing the transmission quantity of the data signal to form a first preset signal;
s3: increasing the induction gray level of the first preset signal to form a second preset signal;
s4: and driving the display panel by taking the second preset signal as an output signal.
Wherein, in step S11, an Analog clock frequency is calculated by an Analog-to-digital converter (ADC) converter 250; specifically, the analog-to-digital converter 250 calculates the analog clock frequency by the formula t= (h×v×f× 3*M)/6N; wherein T represents an analog clock frequency, H represents the sum of the number of scanning lines of an effective area and the number of scanning lines of a blank area in the display panel 400, V represents the sum of the number of data lines of the effective area and the number of data lines of the blank area in the display panel 400, F represents a refresh rate, M represents a display color depth, and N represents the number of display signal channels. Since H, V, M and N are specific parameters in the current display device 10, F may be selected according to the display conditions, and specific settings of these parameters are selected according to actual conditions, which will not be described in detail herein.
In S12 and the subsequent steps, the selector 260 selects whether to directly drive the display panel 400 with the data signal or to drive the display panel 400 after the data signal is subjected to the color depth adjustment and the compensation of the induced gray scale according to the analog clock frequency and the magnitude of the preset clock frequency. The preset clock frequency is the maximum clock frequency acceptable when the timing control chip 200 in the current display device 10 outputs a signal, and is used as a specific parameter of the timing control chip 200, and is marked along with the shipment of the timing control chip 200, and the preset clock frequencies corresponding to different types of timing control chips 200 are different, specifically selected according to the actual situation.
In the embodiment of the application, the color depth of all data signals is not reduced, but only the data signals of the part of Mini-LVDS clock frequency beyond the supporting range of the time sequence control chip 200 are subjected to color depth adjustment and then the induction gray scale is compensated; as for the data signal of the portion where the Mini-LVDS clock frequency is not out of the supporting range of the timing control chip 200, it is directly used to drive the display panel 400. By the mode, when the display is performed at a lower refresh rate, the analog clock frequency does not exceed the preset clock frequency, and at the moment, the picture display is performed through the normal color depth, and the good display effect can be obtained although the refresh rate is poor due to the higher color depth; when the display is performed at a higher refresh rate, and the analog clock frequency exceeds the preset clock frequency, the display is performed by reducing the color depth and then compensating the induced gray scale, and the display color depth is slightly different but good display effect can be obtained due to the higher refresh rate. Therefore, by adopting the technical scheme in the embodiment of the application, the display device 10 can be ensured to have good display effect all the time.
Embodiment III:
As shown in fig. 5, as a display device provided in the third embodiment of the present application, the display device 10 includes a gamma integrated chip 500 (P-gamma), a first storage module 600 and a second storage module 700 in addition to a color depth reducing module (not shown) and a gray scale enhancing module (not shown), wherein the first storage module 600 stores first driving mode information, and the second storage module 700 stores second driving mode information; one end of the gamma integrated chip 500 is connected with the timing control chip 200, and the other end is connected with the data driving circuit 300; the first memory module 600 and the second memory module 700 are respectively connected with the timing control chip 200; the front end 100 includes a signal receiver 110, the timing control chip 200 further includes a detection module 270, the signal receiver 110 is connected to the detection module 270 through a selection signal line 120, and the detection module 270 receives a selection signal output by the signal receiver 110 through the selection signal line 120.
The detection module 270 is connected to the first storage module 600 and the second storage module 700, respectively, and when the selection signal is a first signal, the detection module 270 controls the timing control chip 200 to read the first driving mode information, so that the color depth weakening module receives the data signal and controls the gamma integration chip 500 to output a corresponding first gamma voltage; when the selection signal is a second signal, the detection module 270 controls the timing control chip 200 to read the second driving mode information, so that the data driving circuit 300 receives the data signal and controls the gamma integrated chip 500 to output a corresponding second gamma voltage.
Correspondingly, as shown in fig. 6, the embodiment of the present application further discloses a driving method of a display device, which is used for driving the display device 10, and the driving method of the display device includes the steps of:
S1: receiving a data signal of the front end;
S13: receiving a selection signal;
s14: detecting a signal type of the selection signal;
b: when the selection signal is a first signal condition, driving the display panel in a first driving mode, and executing the subsequent step (b 1); when the selection signal is in a second signal condition, driving the display panel in a second driving mode, and driving the display panel (b 2) by taking the data signal as an output signal;
S2: reducing the transmission quantity of the data signal to form a first preset signal;
s3: increasing the induction gray level of the first preset signal to form a second preset signal;
s4: driving a display panel by taking the second preset signal as an output signal;
wherein the refresh rate in the first drive mode is greater than the refresh rate in the second drive mode.
In the embodiment of the present application, in order to meet the requirement of controlling the timing control chip 200 to output different Mini-LVDS signals by different front-end 100 signals, two different encoding storage spaces, namely a first storage module 600 and a second storage module 700, are first established, and the first storage module 600 and the second storage module 700 may be registers (flash) or other storage devices; the two memory spaces use the same data bus but have different addresses, and the timing control chip 200 reads the corresponding work code (code) through the different addresses. In order to ensure a better display effect, the first driving mode and the second driving mode correspond to different Gamma voltages, only the Gamma voltages required by the corresponding modes are output to the data driving circuit 300 by the Gamma integrated chip 500 by synchronously storing the Gamma integrated chip 500 code (P-Gamma code) and the timing control chip 200 code (TCON code) in the corresponding first memory module 600 and the second memory module 700, reading the coded data from the corresponding memory modules through the timing control chip 200 when in use, and then importing the coded data into the Gamma integrated chip 500 through a connection bus with the Gamma integrated chip 500.
As a specific embodiment, the first signal condition is a low level, and the second signal condition is a high level; in the first driving mode, the display mode of the output signal is 6bit+2FRC, and the refresh rate is 100Hz; in the second driving mode, the display mode of the output signal is 8 bits and the refresh rate is 75Hz.
Specifically, in the embodiment of the present application, the display device 10 can realize compatible switching between the two display modes of 8bit and 6bit+2frc, and by introducing a selection signal for controlling the data output in the timing control chip 200 by the front end 100, the selection signal adopts the second driving mode of 8bit/75Hz when the selection signal is at the high level, and adopts the first driving mode of 6bit+2frc/100Hz when the selection signal is at the low level, which can also be executed according to the actual situation.
Still further, the user may send a switching signal through the remote controller, the display interface or the button, and the signal receiver 110 sends a corresponding selection signal according to the switching signal to select the first driving mode or the second driving mode.
In addition, unlike the present timing control chip 200 which receives the front end 100 data and then outputs a signal which is processed as 8bit or 6bit, the embodiment of the present application can achieve a better display effect by correspondingly adjusting the coding of the gamma integrated chip 500 on the basis of adopting the two display modes, namely the 8bit/75Hz second drive mode and the 6bit+2FRC/100Hz first drive mode.
It should be noted that, the limitation of each step in the present solution is not to be considered as limiting the sequence of steps on the premise of not affecting the implementation of the specific solution, and the steps written in the previous step may be executed before, or may be executed after, or may even be executed simultaneously, and the solutions of different embodiments may be combined and applied under the condition of not conflicting, so long as the present solution can be implemented, all should be considered as falling within the protection scope of the present application.
In addition, the inventive concept of the present application can form a very large number of embodiments, but the application documents are limited in size and cannot be listed one by one, so that on the premise of no conflict, the above-described embodiments or technical features can be arbitrarily combined to form new embodiments, and after the embodiments or technical features are combined, the original technical effects can be enhanced.
The above description of the application in connection with specific alternative embodiments is further detailed and it is not intended that the application be limited to the specific embodiments disclosed. It will be apparent to those skilled in the art that several simple deductions or substitutions may be made without departing from the spirit of the application, and these should be considered to be within the scope of the application.
Claims (7)
1. A driving method of a display device, comprising the steps of:
Receiving a data signal of the front end;
Calculating the corresponding analog clock frequency when the data signal is used as an output signal;
Comparing the analog clock frequency with a preset clock frequency;
When the analog clock frequency exceeds the preset clock frequency, executing the subsequent steps; when the analog clock frequency does not exceed the preset clock frequency, the data signal is used as an output signal to drive a display panel;
reducing the transmission quantity of the data signal to form a first preset signal;
increasing the induction gray level of the first preset signal to form a second preset signal; and
Driving a display panel by taking the second preset signal as an output signal;
Wherein the data signal and the second preset signal show the same color depth, and in the step of reducing the transmission amount of the data signal to form a first preset signal, the transmission amount of the data signal is reduced by reducing the display color depth of the data signal; in the step of increasing the induced gray level of the first preset signal to form a second preset signal, the induced gray level of the first preset signal is increased by using a gray level enhancement technology.
2. The driving method of a display device according to claim 1, wherein in the step of calculating the corresponding analog clock frequency with the data signal as an output signal, the analog clock frequency is calculated by a formula t= (H x V x F x 3*M)/6N;
wherein T represents the analog clock frequency, H represents the sum of the number of scanning lines of an effective area and the number of scanning lines of a blank area in the display panel, V represents the sum of the number of data lines of the effective area and the number of data lines of the blank area in the display panel, F represents the refresh rate, M represents the display color depth, and N represents the number of display signal channels.
3. The driving method of a display device according to claim 1, further comprising, before the step of reducing the transmission amount of the data signal to form a first preset signal, the step of:
Receiving a selection signal;
detecting a signal type of the selection signal; and
When the selection signal is in a first signal condition, driving the display panel in a first driving mode, and executing the subsequent steps; when the selection signal is in a second signal condition, driving the display panel in a second driving mode, and driving the display panel by taking the data signal as an output signal;
wherein the refresh rate in the first drive mode is greater than the refresh rate in the second drive mode.
4. A driving method of a display device according to claim 3, wherein the first signal condition is a low level and the second signal condition is a high level;
In the first driving mode, the display mode of the output signal is 6bit+2FRC, and the refresh rate is 100Hz; in the second driving mode, the display mode of the output signal is 8 bits and the refresh rate is 75Hz.
5. A display device driven using the driving method according to any one of claims 1 to 4, wherein the display device includes a display panel, a timing control chip, a data driving circuit, and a front end connected to the timing control chip through an input signal line, the timing control chip receiving a data signal output from the front end through the input signal line; the time sequence control chip is connected with the data driving circuit through an output signal line, and the data driving circuit receives an output signal output by the time sequence control chip through the output signal line; the data driving circuit is connected with the display panel and drives the display panel through the output signal;
the time sequence control chip comprises a color depth weakening module and a gray scale enhancement module, wherein the color depth weakening module receives the data signals and reduces the transmission quantity of the data signals, and the gray scale enhancement module is respectively connected with the color depth weakening module and the data driving circuit and provides induction gray scales to compensate the transmission quantity reduced by the color depth weakening module.
6. The display device of claim 5, wherein the timing control chip further comprises:
The analog-to-digital converter is connected with the front end and used for calculating the analog clock frequency corresponding to the data signal; and
The input end of the selector is connected with the analog-to-digital converter, the first output end of the selector is connected with the color depth weakening module, and the second output end of the selector is connected with the data driving circuit;
When the analog clock frequency exceeds the preset clock frequency, the selector outputs the data signal to the color depth weakening module; when the analog clock frequency does not exceed the preset clock frequency, the selector outputs the data signal to the data driving circuit.
7. The display device of claim 5, further comprising a gamma integrated chip, a first memory module storing first drive mode information, and a second memory module storing second drive mode information; one end of the gamma integrated chip is connected with the time sequence control chip, the other end of the gamma integrated chip is connected with the data driving circuit, and the first storage module and the second storage module are respectively connected with the time sequence control chip;
The front end comprises a signal receiver, the time sequence control chip further comprises a detection module, the signal receiver is connected with the detection module through a selection signal line, and the detection module receives a selection signal output by the signal receiver through the selection signal line;
The detection module is respectively connected with the first storage module and the second storage module, and when the selection signal is a first signal, the detection module controls the time sequence control chip to read the first driving mode information, so that the color depth weakening module receives the data signal and controls the gamma integration chip to output corresponding first gamma voltage;
When the selection signal is a second signal, the detection module controls the time sequence control chip to read the second driving mode information, so that the data driving circuit receives the data signal and controls the gamma integration chip to output a corresponding second gamma voltage.
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