CN103839506B - Display device and drive circuit thereof, the driving method of display floater and display system - Google Patents
Display device and drive circuit thereof, the driving method of display floater and display system Download PDFInfo
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- CN103839506B CN103839506B CN201210473330.3A CN201210473330A CN103839506B CN 103839506 B CN103839506 B CN 103839506B CN 201210473330 A CN201210473330 A CN 201210473330A CN 103839506 B CN103839506 B CN 103839506B
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Abstract
A kind of display device and data drive circuit thereof, the driving method of display floater and display system. Display device includes time schedule controller and data drive circuit. Time schedule controller exports the first pixel data according to input pixel data, and wherein the color depth of the first pixel data is the first figure place or the second figure place less than the first figure place. Data drive circuit receives the first pixel data and notification signal, according to notification signal when the color depth of the first pixel data is the second figure place, first pixel data is mapped and produces the second pixel data, when the color depth of the first pixel data is the first figure place, directly using the first pixel data as the second pixel data, and produce at least one driving voltage according to the second pixel data, wherein the color depth of the second pixel data is the first figure place.
Description
Technical field
The invention relates to a kind of electronic installation, and in particular to the driving method of a kind of display device and data drive circuit and display floater.
Background technology
The color depth (colordepth) of the pixel data of display device input is fixing figure place traditionally, for instance 6 (bits), drives display floater again through data drive circuit. When the figure place (color depth) of pixel data is more high, then the picture color effect shown is also more careful more good.
But, user, when appreciating dynamic menu, avoids the need for the pixel data of seniority top digit. For dynamic menu, owing to picture is changing always, human eye cannot discover or not notice that the difference of picture color resolution (such as 6bits and 8bits). Compared to tableaux, for instance be see colour picture, the color-resolution of 6bit pixel data feels it is very big difference with the color-resolution of 8bit pixel data to human eye. In addition, when display device transmits/process the pixel data of seniority top digit, the data volume of required internal transmission is relatively big, also therefore along with higher power dissipation, causes that display device produces unnecessary power consumption.
Summary of the invention
The present invention provides the driving method of a kind of display device and data drive circuit thereof and display floater, has the figure place (color depth) of pixel data within dynamic adjustment/change display device, and reaches the effect of power saving.
The present invention provides a kind of display device, including time schedule controller and at least one data drive circuit. time schedule controller receives input pixel data and exports the first pixel data according to input pixel data, and wherein the color depth of the first pixel data is not fix and be the first figure place or the second figure place, and the second figure place is less than the first figure place. at least one data drive circuit is coupled to time schedule controller, receive the first pixel data and a notification signal, and according to notification signal when the color depth of the first pixel data is the second figure place, first pixel data is carried out map operation and produces one second pixel data, and when the color depth of the first pixel data is the first figure place, the first pixel data is not carried out map operation and directly using the first pixel data as the second pixel data, and also produce at least one driving voltage according to the second pixel data, wherein the color depth of the second pixel data is to be fixed as the first figure place.
The present invention provides a kind of data drive circuit, including a latch units and a map unit.Latch units in order to receive and to store one first pixel data from time schedule controller, and wherein the color depth of the first pixel data is not fix and be the first figure place or the second figure place, and the second figure place is less than the first figure place. Map unit is coupled to latch units, in order to receive the first pixel data stored by latch units, and according to a notification signal when the color depth of the first pixel data is the second figure place, first pixel data is carried out map operation and produces one second pixel data, and when the color depth of the first pixel data is the first figure place, first pixel data not being carried out map operation and the first pixel data is output as the second pixel data, wherein the color depth of the second pixel data is to be fixed as the first figure place.
The present invention provides the driving method of a kind of display floater, there is provided one first pixel data to a data drive circuit including (i) according to an input pixel data, wherein the color depth of the first pixel data is not fix and be the first figure place or the second figure place, and the second figure place is less than the first figure place; (ii) according to a notification signal when the first pixel data is the second figure place, first pixel data is carried out map operation and produces one second pixel data, and when the first pixel data is the first figure place, first pixel data not being carried out map operation and produce the second pixel data, wherein the color depth of the second pixel data is to be fixed as the first figure place; And (iii) produces at least one driving voltage according to the second pixel data.
The present invention provides a kind of display system, including an external system and a display device. external system is in order to export an input pixel data. display device includes time schedule controller and at least one data drive circuit. time schedule controller receives and according to input pixel data output one first pixel data, wherein the color depth of the first pixel data is not fix and be one first figure place or one second figure place, and the second figure place is less than the first figure place. at least one data drive circuit is coupled to time schedule controller, receive the first pixel data and a notification signal, and according to notification signal when the color depth of the first pixel data is the second figure place, first pixel data is carried out map operation and produces one second pixel data, and when the color depth of the first pixel data is the first figure place, the first pixel data is not carried out map operation and directly using the first pixel data as the second pixel data, and also produce at least one driving voltage according to the second pixel data, wherein the color depth of the second pixel data is to be fixed as the first figure place.
Display device in one embodiment of this invention, wherein in map operation, data drive circuit will have 2NFirst pixel data of rank level, is converted into and has 2MSecond pixel data of rank level, wherein M is the first figure place, and N is the second figure place.
Display device in one embodiment of this invention, wherein time schedule controller is to be received input pixel data by an external system, and time schedule controller also produces notification signal extremely at least one data drive circuit according to input pixel data.
Display device in one embodiment of this invention, wherein time schedule controller is to be received input pixel data by an external system, and at least one data drive circuit is to be received notification signal by external system.
Display device in one embodiment of this invention, wherein input pixel data is not fix and have the first figure place or the second figure place, when input pixel data has the first figure place, time schedule controller output has the first pixel data of the first figure place, and when input pixel data has the second figure place, time schedule controller output has the first pixel data of the second figure place.
Display device in one embodiment of this invention, wherein the color depth of input pixel data is to be fixed as the first figure place.
Display device in one embodiment of this invention, wherein time schedule controller decides whether not perform frame per second control according to the content of input pixel data and the first pixel data that the output color degree of depth is the first figure place, or performs the first pixel data that frame per second controls and the output color degree of depth is the second figure place.
Display device in one embodiment of this invention, wherein time schedule controller includes a Cyclical Redundancy Check unit, receives and check that input pixel data obtains an inspection result, then according to checking result output notice signal extremely at least one data drive circuit.
Display device in one embodiment of this invention, wherein data drive circuit includes a latch units, a map unit, a D/A conversion unit and an output buffer cell. Latch units in order to receive and to store the first pixel data from time schedule controller. Map unit is coupled to latch units, in order to receive the first pixel data stored by latch units, and according to notification signal when the first pixel data is the second figure place, first pixel data is carried out map operation and produces the second pixel data, and when the first pixel data is the first figure place, the first pixel data is not carried out map operation and the first pixel data is output as the second pixel data. D/A conversion unit is coupled to map unit, and the second pixel data is converted to an analog drive signal according to a set of reference voltages by D/A conversion unit. Output buffer cell is coupled to D/A conversion unit, in order to receive and gain analog driving signal, to export at least one driving voltage.
Data drive circuit in one embodiment of this invention, wherein in map operation, map unit will have 2NFirst pixel data of rank level, is converted into and has 2MSecond pixel data of rank level, wherein M is the first figure place, and N is the second figure place.
Data drive circuit in one embodiment of this invention, wherein time schedule controller produces notification signal to map unit.
Data drive circuit in one embodiment of this invention, wherein map unit is to be received notification signal by an external system.
Data drive circuit in one embodiment of this invention, wherein the color depth of input pixel data is to be fixed as the first figure place.
Data drive circuit in one embodiment of this invention, also includes a D/A conversion unit and an output buffer cell. D/A conversion unit is coupled to map unit, and the second pixel data that wherein map unit is exported by D/A conversion unit according to a set of reference voltages is converted to an analog drive signal. Output buffer cell is coupled to D/A conversion unit, in order to receive and gain analog driving signal, to export at least one driving voltage.
Driving method in one embodiment of this invention, wherein in map operation, mapping circuit will have 2NFirst pixel data of rank level, is converted into and has 2MSecond pixel data of rank level, wherein M is the first figure place, and N is the second figure place.
Driving method in one embodiment of this invention, wherein the color depth of input pixel data is not fix and be the first figure place or the second figure place, when the color depth of input pixel data is the first figure place, in step (i), first pixel data of the first figure place that to be the output color degree of depth be, and when the color depth of input pixel data is the second figure place, in step (i), the output color degree of depth is the first pixel data of the second figure place.
Driving method in one embodiment of this invention, wherein the color depth of input pixel data is to be fixed as the first figure place, and in step (i), it is based on the content of input pixel data and decides whether not perform frame per second control and the first pixel data that the output color degree of depth is the first figure place, or perform the first pixel data that frame per second controls and the output color degree of depth is the second figure place.
Based on above-mentioned, the present invention utilizes map operation to reduce the figure place of the pixel data within display device, effectively reduces the data volume of internal transmission to reach effect of power saving.
For the features described above of the present invention and advantage can be become apparent, special embodiment below, and coordinate institute's accompanying drawings to be described in detail below.
Accompanying drawing explanation
Fig. 1 is according to the block schematic diagram of a kind of display device of the first embodiment of the present invention.
Fig. 2 is the circuit box schematic diagram that time schedule controller in Fig. 1 is described according to the embodiment of the present invention.
Fig. 3 is the circuit box schematic diagram that data drive circuit in Fig. 1 is described according to the embodiment of the present invention.
Fig. 4 is the block schematic diagram that frame rate control method is described according to one embodiment of the invention.
Fig. 5 is according to the block schematic diagram of a kind of display device of the second embodiment of the present invention.
Fig. 6 is according to the block schematic diagram of a kind of display device of the third embodiment of the present invention.
Fig. 7 is according to the block schematic diagram of a kind of display device of the fourth embodiment of the present invention.
[main element label declaration]
P1: pixel data (6) P2: pixel data (8)
P_in: input pixel data P_in1: input pixel data (8)
P_in2: input pixel data (6) N1: notification signal
D1: latch data S1: drive signal
V1: driving voltage
F1, F2, F3: during picture
F1_1, F1_2, F1_3, F1_4, F2_1, F2_2, F2_3, F2_4, F3_1, F3_2, F3_3, F3_4: during sprite
100_1,100_2,100_N: data drive circuit
110: time schedule controller 150: display device
160: external system 170: display floater
310: latch units 320: map unit
330: D/A conversion unit 340: output buffer cell
410: Cyclical Redundancy Check unit 420: image processor
Detailed description of the invention
" coupling " word used in this case description in full (including claim) can refer to any direct or indirect connection means. For example, if first device described in literary composition is coupled to the second device, then should be construed as this first device and can be directly connected to this second device, or this first device can be coupled indirectly to this second device by other device or certain connection means.
The pixel data figure place of the display device internal transmission of the present invention can dynamically change and be not fixed as 6 (bits), 8 or 10. Under hereby illustrate with the pixel data of 6 or 8 for embodiment, but not so limited system.
Fig. 1 is according to the block schematic diagram of a kind of display device of the first embodiment of the present invention. Refer to Fig. 1, display device 150 includes display floater 170, time schedule controller 110 and one or more data drive circuit 100_1,100_2 ..., 100_N. Data drive circuit 100_1��100_N couples time schedule controller 110 jointly, and time schedule controller 110 is then connected with the external system 160 outside display device 150, in order to receive input pixel data P_in1. Wherein, above-mentioned external system can be such as the devices such as a host computer system (hostsystem) or system control chip.In the present embodiment, the figure place of input pixel data P_in1 is to be fixed as the first figure place (being such as 8). Time schedule controller 110 exports the first pixel data P1 to each data drive circuit 100_1��100_N according to input pixel data P_in1, wherein the color depth of the first pixel data P1 is that dynamic change is not fixed, and is such as the first figure place or the second figure place less than the first figure place. Such as, the first figure place is 8 in the present embodiment, and the second figure place is 6. On the other hand, after time schedule controller 110 receives input pixel data P_in1, time schedule controller 110 can analyze input pixel data P_in1, and according to analyzing result and decide whether the color depth of dynamic adjustment/change the first pixel data P1.
Such as, after time schedule controller 110 receives input pixel data P_in1, time schedule controller 110 may determine that whether this input pixel data P_in1 is moving picture data. If this input pixel data P_in1 is tableaux data, due to the amplitude (swing) of pixel data P1 only small (transmission power consumption is only small), then time schedule controller 110 can the output color degree of depth be that the pixel data P1 of 8 is to each data drive circuit 100_1��100_N. Therefore, the display floater 170 of display device 150 can show more careful picture color effect.
Otherwise, for dynamic menu, owing to picture is changing always, human eye cannot discover or not notice that the difference of 6 color depths and 8 color depths. Therefore, if this input pixel data P_in1 is moving picture data, then time schedule controller 110 can utilize frame rate control method (FrameRateControl, FRC) (explain after appearance) or the input pixel data P_in1 that color depth is 8 is converted to the pixel data P1 that color depth is 6 by other method, and difference output pixel data P1 and notification signal N1 to each data drive circuit 100_1��100_N, so that each data drive circuit 100_1��100_N is according to pixel data P1 and notification signal N1 driving display floater 170.
That is, content according to input pixel data P_in1, time schedule controller 110 may decide that and do not perform frame per second control and the first pixel data P1 that the output color degree of depth is the first figure place (such as 8), or determines to perform the first pixel data P1 that frame per second controls and the output color degree of depth is the second figure place (such as 6). When input pixel data P_in1 is moving picture data, time schedule controller 110 dynamically reduces the figure place (color depth) of the pixel data P1 sending data drive circuit 100_1��100_N to, and then reduces through-put power consumption.
Fig. 2 is the circuit box schematic diagram according to embodiment of the present invention time schedule controller 110, and it can be applicable to the display device in Fig. 1 embodiment but is not limited to this. Refer to Fig. 2, time schedule controller 100 includes a Cyclical Redundancy Check unit 410 and an image processor (Imageprocessor) 420. Cyclical Redundancy Check unit 410 receives and checks that input pixel data P_in (such as input pixel data P_in2 shown in input pixel data P_in1 or Fig. 5 shown in Fig. 1) obtains checking result, then according to this inspection result output notice signal N1 to data drive circuit 100_1��100_N. Such as, Cyclical Redundancy Check unit 410 receives input pixel data P_in, and compares/check a crc value of different pictures (frame) in this input pixel data P_in. If the crc value of each picture has obvious change, then Cyclical Redundancy Check unit 410 may determine that this input pixel data P_in is dynamic image, then Cyclical Redundancy Check unit 410 can output notice signal N1.
In addition, when being applied to embodiment illustrated in fig. 1, if Cyclical Redundancy Check unit 410 judges that input pixel data P_in is dynamic image, then the pixel data P_in (i.e. input pixel data P_in1 shown in Fig. 1) that color depth is 8 is converted to the pixel data P1 that color depth is 6 by the image processor 420 of time schedule controller 110 such as available frame rate control method (explaining after appearance). But, it should be noted that, in other embodiments, such as embodiment illustrated in fig. 5 (being detailed later), no matter this input pixel data P_in is dynamic image or still image, image processor 420, when input pixel data P_in is carried out image procossing, will not be changed the color depth of input pixel data P_in, and export the pixel data P1 of figure place (color depth) identical with input pixel data P_in.
Fig. 3 is the circuit box schematic diagram of the data drive circuit 100_1 according to the embodiment of the present invention, and it can be applicable to the display device in Fig. 1 embodiment but is not limited to this. Fig. 3 only illustrates the implementation detail of a data drive circuit 100_1 therein, and the embodiment of other data drive circuit 100_2��100_N is referred to the related description of data drive circuit 100_1 and analogizes it.
Refer to Fig. 3, data drive circuit 100_1 and include latch units 310, map unit 320, D/A conversion unit 330 and an output buffer cell 340. First, latch units 310 receives from time schedule controller 110 and latches and inputs to the pixel data P1 of data drive circuit 100_1 as a latch data D1, and output latch data D1 is to map unit 320. The map unit 320 being coupled to latch units 310 receives latch data D1, and decides whether latch data D1 (i.e. the first pixel data P1 stored by latch units 310) is done map operation (explaining after appearance) according to notification signal N1. Such as, in described map operation, data drive circuit 100_1 will have 2NFirst pixel data P1 of rank level is converted into has 2MSecond pixel data P2 of rank level, wherein M is this first figure place (being such as 8), and N is this second figure place (being such as 6). Wherein, notification signal N1 is provided from the time schedule controller 110 shown in Fig. 1 or Fig. 5. In other embodiments, for instance Fig. 6 or embodiment illustrated in fig. 7 (being detailed later), notification signal N1 is provided from external system 160.
With continued reference to Fig. 3, according to notification signal N1, if the color depth of pixel data P1 is the second figure place (being such as 6), then latch data D1 (i.e. the first pixel data P1 stored by latch units 310) is carried out map operation (explaining after appearance) and produces the second pixel data P2 that color depth is the first figure place (being such as 8) by map unit 320; If the color depth of pixel data P1 is the first figure place (being such as 8), then latch data D1 (i.e. the first pixel data P1 stored by latch units 310) is not carried out map operation (explaining after appearance) by map unit 320, and directly exports latch data D1 as the pixel data P2 that figure place is 8. It follows that the second pixel data P2 of numeral is converted to analog drive signal S1 according to a set of reference voltages (such as GAMMA voltage group) by the D/A conversion unit 330 being coupled to map unit 320. It is coupled to the output buffer cell 340 of D/A conversion unit 330 to receive and gain analog drives signal S1, in order to export at least one driving voltage V1 to display floater 170.
Fig. 4 is the schematic diagram that frame rate control method is described according to one embodiment of the invention. Frame per second in Fig. 1, Fig. 5, Fig. 6 and embodiment illustrated in fig. 7 controls to be referred to the explanation of Fig. 4 and analogize it. In certain embodiments, such as embodiment illustrated in fig. 1 or embodiment illustrated in fig. 6 (are detailed later), carried out frame per second shown in Fig. 4 left part by time schedule controller 110 to control, in order to by the pixel data of the pixel data corresponding conversion that color depth is the first figure place (such as 8) to be color depth be the second figure place (such as 6). The frame per second of rest of pixels data controls to analogize according to the explanation of Fig. 4. In further embodiments, for instance Fig. 5 or embodiment illustrated in fig. 7 (being detailed later), frame per second shown in Fig. 4 left part controls to be undertaken by external system 160.
Refer to Fig. 1, Fig. 3 and Fig. 4, for picture period F1, if the input pixel data P_in1 of 8 is " 00000000 ", time schedule controller 110 can take two, the end " 00 " of " 00000000 " and control parameter as frame per second, and as the first frame per second, two positions of " 00000000 " displacement to the right are controlled data. Ratio the first frame per second controls the pixel data of the big GTG of data and is chosen as the second frame per second control data. Such as, if it is " 000000 " that the first frame per second controls data, then the second frame per second controls data is " 000001 ". Controlling parameter according to frame per second, time schedule controller 110 selects to transmit the first frame per second at sprite period F1_1, F1_2, F1_3 and F1_4 respectively and controls data or the second frame per second control data as the first pixel data P1. Such as, as shown in Figure 2, controlling parameter " 00 " according to frame per second, time schedule controller 110 sequentially selects to transmit " 000000 ", " 000000 ", " 000000 " and " 000000 " as the first pixel data P1 to data drive circuit 100_1��100_N at sprite period F1_1, F1_2, F1_3 and F1_4 respectively.
Fig. 4 right part illustrates that data drive circuit (such as 100_1) carries out the example of map operation. When notification signal N1 represents that frame per second controls to be carried out, the map unit 320 of data drive circuit 100_1 can carry out map operation, so that the receive first pixel data P1 (color depth is for 6) is converted to the second pixel data P2 (color depth is 8). Such as, pixel data " 000000 " can be moved to left two at sprite period F1_1, F1_2, F1_3 and F1_4 by the map unit 320 of data drive circuit 100_1 respectively, to obtain pixel data " 00000000 ".
For picture period F2, if the input pixel data P_in1 of 8 is " 00000001 ", time schedule controller 110 can take two, the end " 01 " of " 00000000 " and control parameter as frame per second, and as the first frame per second, two positions of " 00000000 " displacement to the right are controlled data. Therefore, the second frame per second controls data is " 000001 ". As shown in Figure 2, controlling parameter " 01 " according to frame per second, time schedule controller 110 sequentially selects to transmit " 000000 ", " 000000 ", " 000000 " and " 000001 " as the first pixel data P1 to data drive circuit 100_1��100_N at sprite period F2_1, F2_2, F2_3 and F2_4 respectively. The map unit 320 of data drive circuit 100_1 can carry out map operation according to notification signal N1, so that the pixel data received at sprite period F2_1, F2_2, F2_3 and F2_4 " 000000 ", " 000000 ", " 000000 " are moved to left two respectively with " 000001 ", to obtain pixel data " 00000000 ", " 00000000 ", " 00000000 " and " 00000100 " that color depth is 8 respectively.Therefore, utilizing colour mixture in time, the display floater 170 of display device 150 can show the color/GTG between " 00000000 " and " 00000100 ", is namely equivalent to the color/GTG of " 00000001 ".
By that analogy, if the input pixel data P_in1 of 8 is " 00000010 " in picture period F3, then time schedule controller 110 selects to transmit " 000000 ", " 000000 ", " 000001 " and " 000001 " as the first pixel data P1 to data drive circuit 100_1��100_N at sprite period F3_1, F3_2, F3_3 and F3_4 respectively. Map unit 320 can carry out map operation according to notification signal N1, so that the pixel data received at sprite period F3_1, F3_2, F3_3 and F3_4 " 000000 ", " 000000 ", " 000001 " are moved to left two respectively with " 000001 ", to obtain pixel data " 00000000 ", " 00000000 ", " 00000100 " and " 00000100 " that color depth is 8 respectively. Therefore, the display floater 170 of display device 150 can show the color/GTG between " 00000000 " and " 00000100 ", is namely equivalent to the color/GTG of " 00000010 ".
In other embodiments, the first frame per second controls data and is not limited to the order shown in Fig. 4 with the second frame per second control data putting in order during four sprites. Such as, in another embodiment, if the input pixel data P_in1 of 8 is " 00000010 " in picture period F3, then time schedule controller 110 can sequentially select to transmit " 000000 ", " 000001 ", " 000000 " and " 000001 " as the first pixel data P1 to data drive circuit 100_1��100_N at sprite period F3_1, F3_2, F3_3 and F3_4 respectively.
Fig. 5 illustrates the circuit box schematic diagram of a kind of display device according to the second embodiment of the present invention. The embodiment of the display device 150 of Fig. 5 depicted all can refer to the related description of Fig. 1 and analogizes it. Implementing not existing together of profit with described in Fig. 1 first, being in that in the embodiment of Fig. 5 depicted the color depth of input pixel data P_in2 is the first figure place (such as 8) or the second figure place (such as 6). Imply that, external system 160 judges whether its handled pixel data (being used for producing input pixel data P_in2) is moving picture data in advance, and utilizes frame rate control method (such as shown in Fig. 4) that the pixel data that color depth is the first figure place (such as 8) is converted to the input pixel data P_in2 that color depth is the second figure place. After time schedule controller 110 receives input pixel data P_in2, time schedule controller 110 can check that input pixel data P_in2 obtains checking result, then according to this inspection result output notice signal N1 to data drive circuit 100_1��100_N. In the embodiment shown in fig. 5, no matter this input pixel data P_in2 is dynamic image or still image, time schedule controller 110 will not carry out frame per second control, and will the pixel data P1 output of figure place (color depth) identical with input pixel data P_in2 to data drive circuit 100_1��100_N. Each data drive circuit 100_1��100_N drives display floater 170 according to pixel data P1 and notification signal N1.
Fig. 6 illustrates the circuit box schematic diagram of a kind of display device according to the third embodiment of the present invention. The embodiment of the display device 150 of Fig. 6 depicted all can refer to the related description of Fig. 1 and analogizes it.With not existing together of first embodiment described in Fig. 1, be in that each data drive circuit 100_1��100_N in Fig. 6 depicted embodiment receives notification signal N1 from external system 160 respectively, rather than from time schedule controller 110. Refer to Fig. 6, external system 160 judges whether its handled pixel data (being used for producing input pixel data P_in1) is moving picture data in advance, and gives notice signal N1 to each data drive circuit 100_1��100_N according to judged result. In the embodiment shown in fig. 6, no matter this input pixel data P_in1 is dynamic image or still image, external system 160 will not carry out frame per second control, and exports the input pixel data P_in1 that color depth is the first figure place to time schedule controller 110. After time schedule controller 110 receives input pixel data P_in1, time schedule controller 110 can check that input pixel data P_in1 obtains checking result, frame rate control method (such as shown in Fig. 4) is judged whether to again, in order to the input pixel data P_in1 that color depth is the first figure place (such as 8) is converted to the first pixel data P1 that color depth is the second figure place (such as 6) according to this inspection result. Each data drive circuit 100_1��100_N drives display floater 170 according to pixel data P1 and notification signal N1.
Fig. 7 illustrates the circuit box schematic diagram of a kind of display device according to the fourth embodiment of the present invention. The embodiment of the display device 150 of Fig. 7 depicted all can refer to the related description of Fig. 5 and analogizes it. The present embodiment does not exist together with the second embodiment described in Fig. 5, is in that each data drive circuit 100_1��100_N in the embodiment described in Fig. 7 receives notification signal N1 from external system 160 respectively, rather than from time schedule controller 110. Refer to Fig. 7, in the present embodiment, time schedule controller 110 will not carry out frame per second control. External system 160 judges whether its handled pixel data (being used for producing input pixel data P_in2) is moving picture data in advance, and produces notification signal N1 to extremely each data drive circuit 100_1��100_N according to judged result. External system 160 also decides whether to carry out frame per second control (such as shown in Fig. 4) according to judged result and the pixel data that color depth is the first figure place (such as 8) is converted to the input pixel data P_in2 that color depth is the second figure place (such as 6). Therefore the color depth of input pixel data P_in2 can be the first figure place (such as 8) or the second figure place (such as 6). Each data drive circuit 100_1��100_N drives display floater 170 according to pixel data P1 and notification signal N1.
Concluding the various embodiments described above, notification signal can be produced by external system, or is produced by time schedule controller. It addition, frame per second controls or other adjustment mode of color depth can be undertaken by external system, or undertaken by time schedule controller. Therefore, it can the embodiment having multiple various combination.
Although it should be noted that in above-described embodiment, the color depth of the first pixel data P1 is all dynamically changed to the first figure place or the second figure place, and so in other embodiments, the first pixel data P1 can be dynamically changed to more different figure place. The first pixel data P1 corresponding to different bits number, external system or time schedule controller can be controlled according to mode similarly, make data drive circuit can in time carry out not map operation between isotopic number or do not carry out map operation, and then reach to reduce effect of power consumption in display device.
In sum, whether the display device of above-described embodiment is dynamic menu by judging the picture of display at present, and can frame per second control or other method reduce display device internal transmission amount of pixel data, again through the map operation method in data drive circuit, play dynamic menu with low level pixel data, and then reach to reduce effect of power consumption in display device.
Although the present invention is disclosed above with embodiment; so it is not limited to the present invention; any art has usually intellectual; without departing from the spirit and scope of the present invention; when doing a little change and retouching, therefore protection scope of the present invention is when being as the criterion depending on appended the defined person of right.
Claims (26)
1. a display device, including:
Time schedule controller, receives an input pixel data and exports one first pixel data according to this input pixel data, and wherein the color depth of this first pixel data is not fix and be one first figure place or one second figure place, and this second figure place is less than this first figure place; And
At least one data drive circuit, it is coupled to this time schedule controller, receive this first pixel data and a notification signal, and according to this notification signal when the color depth of this first pixel data is this second figure place, this first pixel data is carried out map operation and produces one second pixel data, and when the color depth of this first pixel data is this first figure place, this first pixel data is not carried out this map operation and directly using this first pixel data as this second pixel data, and also produce at least one driving voltage according to this second pixel data, wherein the color depth of this second pixel data is to be fixed as this first figure place.
2. display device according to claim 1, wherein in this map operation, this data drive circuit will have 2NThis first pixel data of rank level, is converted into and has 2MThis second pixel data of rank level, wherein M is this first figure place, and N is this second figure place.
3. display device according to claim 1, wherein this time schedule controller is to be received this input pixel data by an external system, and this time schedule controller also produces this notification signal to this at least one data drive circuit according to this input pixel data.
4. display device according to claim 1, wherein this time schedule controller is to be received this input pixel data by an external system, and this at least one data drive circuit is to be received this notification signal by this external system.
5. display device according to claim 1, wherein this input pixel data is not fix and have this first figure place or this second figure place, when this input pixel data has this first figure place, the output of this time schedule controller has this first pixel data of this first figure place, and when this input pixel data has this second figure place, the output of this time schedule controller has this first pixel data of this second figure place.
6. display device according to claim 1, wherein the color depth of this input pixel data is to be fixed as this first figure place.
7. display device according to claim 6, wherein this time schedule controller decides whether according to the content of this input pixel data not perform frame per second control and this first pixel data that the output color degree of depth is this first figure place, or performs this first pixel data that frame per second controls and the output color degree of depth is this second figure place.
8. display device according to claim 1, wherein this time schedule controller includes a Cyclical Redundancy Check unit, receive and check that this input pixel data obtains an inspection result, then exporting this notification signal to this at least one data drive circuit according to this inspection result.
9. display device according to claim 1, wherein this data drive circuit includes:
One latch units, in order to receive and to store this first pixel data from this time schedule controller;
One map unit, it is coupled to this latch units, in order to receive this first pixel data stored by this latch units, and according to this notification signal when the color depth of this first pixel data is this second figure place, this first pixel data is carried out this map operation and produces this second pixel data, and when the color depth of this first pixel data is this first figure place, this first pixel data is not carried out this map operation and this first pixel data is output as this second pixel data;
One D/A conversion unit, is coupled to this map unit, and this second pixel data is converted to an analog drive signal according to a set of reference voltages by this D/A conversion unit; And
One output buffer cell, is coupled to this D/A conversion unit, in order to receive and this analog drive signal of gain, to export this at least one driving voltage.
10. a data drive circuit, including:
One latch units, in order to receive and to store one first pixel data from time schedule controller, wherein the color depth of this first pixel data is not fix and be the first figure place or the second figure place, and this second figure place is less than this first figure place; And
One map unit, it is coupled to this latch units, in order to receive this first pixel data stored by this latch units, and according to a notification signal when the color depth of this first pixel data is this second figure place, this first pixel data is carried out map operation and produces one second pixel data, and when the color depth of this first pixel data is this first figure place, this first pixel data not being carried out this map operation and this first pixel data is output as this second pixel data, wherein the color depth of this second pixel data is to be fixed as this first figure place.
11. data drive circuit according to claim 10, wherein in this map operation, this map unit will have 2NThis first pixel data of rank level, is converted into and has 2MThis second pixel data of rank level, wherein M is this first figure place, and N is this second figure place.
12. data drive circuit according to claim 10, wherein this time schedule controller produces this notification signal to this map unit.
13. data drive circuit according to claim 10, wherein this map unit is to be received this notification signal by an external system.
14. data drive circuit according to claim 10, also include:
One D/A conversion unit, is coupled to this map unit, and this second pixel data that wherein this map unit is exported by this D/A conversion unit according to a set of reference voltages is converted to an analog drive signal; And
One output buffer cell, is coupled to this D/A conversion unit, in order to receive and this analog drive signal of gain, to export at least one driving voltage.
15. a driving method for display floater, including:
I. providing one first pixel data to a data drive circuit according to an input pixel data, wherein the color depth of this first pixel data is not fix and be the first figure place or the second figure place, and this second figure place is less than this first figure place;
Ii. according to a notification signal when this first pixel data is this second figure place, this first pixel data is carried out map operation and produces one second pixel data, and when this first pixel data is this first figure place, this first pixel data not being carried out this map operation and produces this second pixel data, wherein the color depth of this second pixel data is to be fixed as this first figure place; And
Iii. at least one driving voltage is produced according to this second pixel data.
16. driving method according to claim 15, wherein in this map operation, this mapping circuit will have 2NThis first pixel data of rank level, is converted into and has 2MThis second pixel data of rank level, wherein M is this first figure place, and N is this second figure place.
17. driving method according to claim 15, wherein the color depth of this input pixel data is not fix and be this first figure place or this second figure place, when the color depth of this input pixel data is this first figure place, in step i, this first pixel data of this first figure place that to be the output color degree of depth be, and when the color depth of this input pixel data is this second figure place, in step i, the output color degree of depth is this first pixel data of this second figure place.
18. driving method according to claim 15, wherein the color depth of this input pixel data is to be fixed as this first figure place, and in step i, it is based on the content of this input pixel data and decides whether not perform frame per second control and this first pixel data that the output color degree of depth is this first figure place, or perform this first pixel data that frame per second controls and the output color degree of depth is this second figure place.
19. a display system, including:
One external system, in order to export an input pixel data; And
One display device, this display device includes:
Time schedule controller, receives and exports one first pixel data according to this input pixel data, and wherein the color depth of this first pixel data is not fix and be one first figure place or one second figure place, and this second figure place is less than this first figure place; And
At least one data drive circuit, it is coupled to this time schedule controller, receive this first pixel data and a notification signal, and according to this notification signal when the color depth of this first pixel data is this second figure place, this first pixel data is carried out map operation and produces one second pixel data, and when the color depth of this first pixel data is this first figure place, this first pixel data is not carried out this map operation and directly using this first pixel data as this second pixel data, and also produce at least one driving voltage according to this second pixel data, wherein the color depth of this second pixel data is to be fixed as this first figure place.
20. display system according to claim 19, wherein in this map operation, this data drive circuit will have 2NThis first pixel data of rank level, is converted into and has 2MThis second pixel data of rank level, wherein M is this first figure place, and N is this second figure place.
21. display system according to claim 19, wherein this time schedule controller produces this notification signal to this at least one data drive circuit according to this input pixel data.
22. display system according to claim 19, wherein this external system produces this notification signal to this at least one data drive circuit according to its handled pixel data.
23. display system according to claim 19, wherein this external system decides whether according to the content of its handled pixel data not perform frame per second control and this input pixel data that the output color degree of depth is this first figure place, or performs this input pixel data that frame per second controls and the output color degree of depth is this second figure place.
24. display system according to claim 23, wherein when this input pixel data has this first figure place, the output of this time schedule controller has this first pixel data of this first figure place, and when this input pixel data has this second figure place, the output of this time schedule controller has this first pixel data of this second figure place.
25. display system according to claim 19, wherein this external system output color degree of depth is to be fixed as this input pixel data of this first figure place.
26. display system according to claim 25, wherein this time schedule controller decides whether according to the content of this input pixel data not perform frame per second control and this first pixel data that the output color degree of depth is this first figure place, or performs this first pixel data that frame per second controls and the output color degree of depth is this second figure place.
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| CN110516810B (en) * | 2019-08-29 | 2022-08-12 | 合肥本源量子计算科技有限责任公司 | Quantum program processing method and device, storage medium and electronic device |
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| CN101159862A (en) * | 2007-11-29 | 2008-04-09 | 北京中星微电子有限公司 | Frame rate control method and device |
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| TWI349259B (en) * | 2006-05-23 | 2011-09-21 | Au Optronics Corp | A panel module and power saving method thereof |
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| JPH09101771A (en) * | 1995-10-04 | 1997-04-15 | Hitachi Ltd | Picture processor |
| CN1366231A (en) * | 2001-01-15 | 2002-08-28 | 松下电器产业株式会社 | Image display apparatus |
| CN1705236A (en) * | 2004-06-01 | 2005-12-07 | 三洋电机株式会社 | Analog digital converter having a function of dynamic adjustment corresponding to the state of the system |
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