CN116288697A - Preparation method of hexagonal boron nitride layer, III-V epitaxial structure and manufacturing method - Google Patents
Preparation method of hexagonal boron nitride layer, III-V epitaxial structure and manufacturing method Download PDFInfo
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- CN116288697A CN116288697A CN202310023092.4A CN202310023092A CN116288697A CN 116288697 A CN116288697 A CN 116288697A CN 202310023092 A CN202310023092 A CN 202310023092A CN 116288697 A CN116288697 A CN 116288697A
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- 229910052582 BN Inorganic materials 0.000 title claims abstract description 62
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 title claims abstract description 62
- 238000002360 preparation method Methods 0.000 title claims abstract description 31
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 18
- 239000000758 substrate Substances 0.000 claims abstract description 142
- 230000006911 nucleation Effects 0.000 claims abstract description 82
- 238000010899 nucleation Methods 0.000 claims abstract description 82
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 58
- 238000000034 method Methods 0.000 claims abstract description 52
- 239000004065 semiconductor Substances 0.000 claims abstract description 35
- 238000000137 annealing Methods 0.000 claims abstract description 33
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 28
- 238000011282 treatment Methods 0.000 claims abstract description 28
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 24
- 229910052796 boron Inorganic materials 0.000 claims abstract description 24
- 238000005121 nitriding Methods 0.000 claims abstract description 24
- 229910002601 GaN Inorganic materials 0.000 claims description 78
- LALRXNPLTWZJIJ-UHFFFAOYSA-N triethylborane Chemical compound CCB(CC)CC LALRXNPLTWZJIJ-UHFFFAOYSA-N 0.000 claims description 20
- 239000000463 material Substances 0.000 claims description 16
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 12
- 150000004767 nitrides Chemical class 0.000 claims description 11
- 229910052594 sapphire Inorganic materials 0.000 claims description 9
- 239000010980 sapphire Substances 0.000 claims description 9
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 8
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 8
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 8
- 239000001257 hydrogen Substances 0.000 claims description 7
- 229910052739 hydrogen Inorganic materials 0.000 claims description 7
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 6
- 239000012159 carrier gas Substances 0.000 claims description 6
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 150000001875 compounds Chemical class 0.000 claims description 3
- 239000012298 atmosphere Substances 0.000 claims description 2
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 2
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 2
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 claims description 2
- 238000007740 vapor deposition Methods 0.000 claims description 2
- 230000035484 reaction time Effects 0.000 claims 1
- 230000008569 process Effects 0.000 abstract description 27
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 14
- 239000010949 copper Substances 0.000 abstract description 10
- 229910052802 copper Inorganic materials 0.000 abstract description 8
- 238000000407 epitaxy Methods 0.000 description 19
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- 230000000052 comparative effect Effects 0.000 description 11
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 11
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 8
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 8
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- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
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- 238000000231 atomic layer deposition Methods 0.000 description 2
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- 229910052984 zinc sulfide Inorganic materials 0.000 description 2
- 229910002704 AlGaN Inorganic materials 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
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- 229910052786 argon Inorganic materials 0.000 description 1
- 238000010420 art technique Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
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- 229910052733 gallium Inorganic materials 0.000 description 1
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- 238000001657 homoepitaxy Methods 0.000 description 1
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- 239000012535 impurity Substances 0.000 description 1
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- 238000001755 magnetron sputter deposition Methods 0.000 description 1
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- 229910003465 moissanite Inorganic materials 0.000 description 1
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- VOITXYVAKOUIBA-UHFFFAOYSA-N triethylaluminium Chemical compound CC[Al](CC)CC VOITXYVAKOUIBA-UHFFFAOYSA-N 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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Abstract
The invention discloses a preparation method of a hexagonal boron nitride layer, a III-V epitaxial structure and a manufacturing method. The preparation method comprises the following steps: pre-nitriding the substrate to form a nitriding layer; forming a first nucleation layer comprising hexagonal boron nitride; performing first annealing treatment; alternately contacting a nitrogen source and a boron source, and growing to obtain the hexagonal boron nitride layer. The manufacturing method comprises the following steps: growing a second nucleation layer on the surface of the hexagonal boron nitride layer; performing a second annealing treatment on the second nucleation layer; and epitaxially growing a III-V semiconductor layer. The preparation method provided by the invention can directly grow and form the hexagonal boron nitride layer on the surface of the non-copper substrate, does not need to carry out treatments such as stripping bonding and the like, improves the quality of epitaxial growth which is continuously carried out on the basis of the hexagonal boron nitride layer, and obviously reduces the complexity of the process. The manufacturing method provided by the invention does not need a stripping bonding process and a specific copper substrate, and the formed III-V epitaxial layer has low dislocation density and excellent performance.
Description
Technical Field
The invention relates to the technical field of semiconductor epitaxial growth, in particular to a preparation method of a hexagonal boron nitride layer, a III-V epitaxial structure and a manufacturing method.
Background
The III-V semiconductor material, such as GaN-based material, has the characteristics of wide band gap, high saturated electron velocity, high heat conductivity and stable chemical property, so that the material is suitable for manufacturing high-frequency, high-power, radiation-resistant and high-temperature working electronic devices. The undoped heterojunction interface made by utilizing the polarization effect of the GaN material can form high-concentration Two-dimensional electron gas (2 DEG), so that impurity scattering is avoided, the electron mobility is greatly improved, and the high-electron mobility transistor (Hight Electron Mobility Transistor; HEMT) prepared based on the Two-dimensional electron gas has the characteristics of high power density, high breakdown field intensity, high cut-off frequency and high switching speed, is very suitable for working under high-frequency high-power and high-voltage conditions, and has good application prospects in the aspects of digital communication, novel display, power electronics and the like.
Unlike the first generation of semiconductor Si materials, gaN is mainly grown by vapor phase epitaxy on a homogenous or heterogeneous substrate. The self-supporting substrate used for GaN homoepitaxy is generally prepared by HVPE (Hydride Vapor Phase Epitaxy ), and has limited size and higher price; in contrast, the Si substrate has the advantages of low price, large size, good electric conduction and thermal conduction, easy processing and the like, so that the GaN material epitaxy on the Si substrate becomes an important choice for reducing the complexity of the process and the production cost.
The quality of the GaN material prepared on the sapphire and SiC substrate based on the GaN and AlN nucleation layer method is optimal, but the dislocation density is still as high as-1E 7/cm < 2 >, and the further performance of the GaN-based device is restricted.
The most commonly used substrates for GaN heteroepitaxy today are mainly sapphire substrates, si (111) substrates and SiC substrates. Wherein the sapphire substrate is also of a hexagonal wurtzite structure. GaN is epitaxially grown on sapphire, and a two-step nucleation method is generally used, and a GaN film is epitaxially grown after a GaN nucleation layer is epitaxially grown under a low-temperature condition and then is annealed at a high temperature. On a Si (111) substrate, the currently adopted buffer layer is a high-temperature AlN buffer layer, an AlGaN/GaN superlattice layer, an SiN amorphous insert layer, a patterning treatment Si surface, and other technologies to further extend the GaN film. GaN and an AlN buffer layer are also mainly used on SiC substrates to further epitaxial GaN. There is temporarily no report on the epitaxy of GaN directly on Si (100) substrates due to the larger lattice mismatch.
However, the inherent lattice mismatch and thermal mismatch of heteroepitaxy severely affect epitaxial material crystal quality, while the advent of nucleation layer technology has enabled some materials with high crystal quality and good surface morphology to be obtained on substrates with larger lattice mismatch with GaN, nucleation layers grown using the current mainstream MOCVD approach on the market still have a certain dependence on the substrate, resulting in difficulty in obtaining high quality GaN material layers on some substrates with larger lattice mismatch (especially Si (100) etc.), dislocation densities of up to 1E7/cm in some existing scenarios 2 Further expansion of the application field of GaN epitaxial layers is limited.
In addition, due to the large lattice mismatch of the Si (100) substrate and GaN, it is not possible to obtain high quality GaN single crystal material on the Si (100) substrate by direct epitaxy, which is required by complicated delamination of the substrate and re-bonding to the Si (100) substrate in order to make GaN compatible with the conventional Si MOS process. Therefore, the process flow is increased, the yield is reduced, and the cost is high.
The conventional Si-based process adopts Si (100) substrates, so that the existing GaN-based integrated circuit is compatible with the existing mature Si-based process through a subsequent complex stripping bonding process. Therefore, the exploration of a new epitaxial method is of great significance to solve the problem of GaN large mismatch heteroepitaxy.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims to provide a preparation method of a hexagonal boron nitride layer, a III-V epitaxial structure and a manufacturing method.
In order to achieve the purpose of the invention, the technical scheme adopted by the invention comprises the following steps:
in a first aspect, the present invention provides a method for preparing a hexagonal boron nitride layer, including:
1) Pre-nitriding the substrate to form a nitriding layer on the surface of the substrate;
2) Contacting the nitride layer with a nitrogen source and a boron source, and forming a first nucleation layer containing hexagonal boron nitride on the surface of the nitride layer;
3) Performing first annealing treatment on the first nucleation layer;
4) And alternately contacting the first nucleation layer with a nitrogen source and a boron source, and growing hexagonal boron nitride to obtain the hexagonal boron nitride layer.
In a second aspect, the present invention further provides a method for manufacturing a III-V epitaxial structure, including:
forming a hexagonal boron nitride layer on a substrate by adopting the preparation method;
growing a second nucleation layer on the surface of the hexagonal boron nitride layer, wherein the second nucleation layer comprises a III-V compound;
performing a second annealing treatment on the second nucleation layer;
and epitaxially growing a III-V semiconductor layer on the surface of the second nucleation layer.
In a third aspect, the present invention further provides a III-V epitaxial structure manufactured by the above manufacturing method.
Based on the technical scheme, compared with the prior art, the invention has the beneficial effects that:
according to the preparation method of the hexagonal boron nitride layer, the hexagonal boron nitride layer can be directly grown on the surface of the non-copper substrate through pre-nitriding and forming the first nucleation layer, and particularly the hexagonal boron nitride layer can be formed on the surface of the substrate with larger lattice mismatch, such as silicon (100), and the treatments of stripping, bonding and the like of the hexagonal boron nitride layer are not needed, so that the quality of epitaxial growth which is continuously carried out on the basis of the hexagonal boron nitride layer is improved, and the process complexity is remarkably reduced.
According to the manufacturing method for forming the III-V epitaxial structure based on the hexagonal boron nitride layer, provided by the invention, a stripping bonding process and a specific copper substrate are not needed, and the formed III-V epitaxial layer has low dislocation density and excellent performance.
The above description is only an overview of the technical solutions of the present invention, and in order to enable those skilled in the art to more clearly understand the technical means of the present application, the present invention may be implemented according to the content of the specification, the following description is given of the preferred embodiments of the present invention with reference to the accompanying drawings.
Drawings
FIG. 1 is a schematic flow chart of a process for fabricating a III-V epitaxial structure according to an exemplary embodiment of the present invention;
FIG. 2 is an AFM photograph of the surface morphology of an h-BN film provided by an exemplary embodiment of the invention;
FIG. 3a is an XRD pattern of a GaN semiconductor layer according to an exemplary embodiment of the invention;
fig. 3b is an XRD pattern of a GaN semiconductor layer according to an exemplary embodiment of the invention.
Detailed Description
In view of the shortcomings in the prior art, the inventor of the present invention has long studied and practiced in a large number of ways to propose the technical scheme of the present invention. The technical scheme, the implementation process, the principle and the like are further explained as follows.
h-BN is a hexagonal structure and is consistent with wurtzite structures such as GaN, alN and the like, meanwhile, the h-BN belongs to a two-dimensional wide forbidden band insulating material, and a suspension bond is not arranged in the vertical direction, so that the trouble caused by lattice mismatch can be effectively avoided, and the dependence on a heterogeneous substrate in the GaN heteroepitaxy process is further solved. Therefore, we propose to use h-BN as a buffer layer to effectively solve the problems that the substrate such as Si (100) and the thin film such as GaN and AlN cannot be epitaxially grown or have poor epitaxial quality due to lattice mismatch.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, however, the present invention may be practiced otherwise than as described herein, and therefore the scope of the present invention is not limited to the specific embodiments disclosed below.
Moreover, relational terms such as "first" and "second", and the like, may be used solely to distinguish one from another component or method step having the same name, without necessarily requiring or implying any actual such relationship or order between such components or method steps.
The embodiment of the invention provides a preparation method of a hexagonal boron nitride layer, which comprises the following steps:
1) And pre-nitriding the substrate to form a nitriding layer on the surface of the substrate.
2) And contacting the nitride layer with a nitrogen source and a boron source, and forming a first nucleation layer containing hexagonal boron nitride on the surface of the nitride layer.
3) And performing first annealing treatment on the first nucleation layer.
4) And alternately contacting the first nucleation layer with a nitrogen source and a boron source, and growing hexagonal boron nitride to obtain the hexagonal boron nitride layer.
According to the technical scheme, the nitride layer is firstly formed, and the nitride layer is preferably an amorphous layer, so that lattice mismatch between the substrate and the hexagonal boron nitride layer is blocked, the corresponding first nucleation layer and the corresponding annealing process are matched, and the introduction setting of a nitrogen source and a boron source is alternately carried out, so that the subsequent hexagonal boron nitride layer has higher growth quality, and a high-quality growth foundation which can be matched with subsequent epitaxial growth, particularly III-V semiconductor layer epitaxial growth is formed.
While the prior art provides some technical solutions for preparing a semiconductor epitaxial layer by using hexagonal boron nitride as an epitaxial growth basis, the conventional method at present uses a CVD method to epitaxial h-BN on a Cu foil or the like, or uses a substrate required by epitaxy by transferring the h-BN on the Cu foil, which is a h-BN epitaxial method which is relatively easy to realize at present. This is because conventional use of Cu substrate epitaxy h-BN is because Cu has a certain catalytic effect on the upper layer of h-BN epitaxy, which is easier to achieve on Cu foil.
The technical scheme provided by the invention firstly uses the MOCVD method, and can realize the epitaxy on some insulating substrates of non-Cu foil substrates, especially Si (100), si (111), siC and other substrates, more importantly, the Si (100) substrate can be directly compatible with the current Si integrated circuit process, but the Cu foil can not. However, it is currently difficult to directly epitaxial a GaN film on a Si (100) substrate due to lattice mismatch between the substrate and GaN. This requires a special treatment of the substrate, such as pre-nitridation, and in addition, the requirements for the epitaxial process window exploration of MOCVD are also high. Therefore, the h-BN can be epitaxially grown on the Si substrate and the like as a GaN buffer layer to shield lattice mismatch between the substrate and GaN, so that a good GaN film is prepared, and the method is a unique advantage of the technical scheme provided by the invention.
Secondly, the substrate is treated by pre-nitriding, an amorphous nitriding layer is formed on the surface of the substrate, lattice mismatch between the substrate and the h-BN is relieved, and the h-BN crystal film can be better epitaxial. As the analysis is carried out, the GaN film which is difficult to directly extend out is arranged on the Si (100) substrate due to the lattice mismatch with the substrate, but the lattice mismatch between GaN and h-BN is smaller, and the h-BN is a two-dimensional material, so that the problem of lattice mismatch can be effectively relieved due to no dangling bond on the surface. However, this also brings about a new problem that GaN is difficult to nucleate on the h-BN surface, so in the present invention, by using a technical means, proper conditions are used to find that MOCVD is used to epitaxially grow an AlN nucleation layer on the h-BN surface, thereby solving the problem that GaN cannot be epitaxially grown without a nucleation layer. Compared with the scheme of atomic layer deposition AlN layer provided in some prior art, the method avoids the process that the substrate takes out a sample from MOCVD and puts the sample into the epitaxial AlN in the atomic layer deposition CVD, and then puts back the upper layer GaN which is continuously epitaxial by the MOCVD, simplifies the flow, saves the time and reduces the cost.
In view of the prior art, no technology is proposed that can directly epitaxial h-BN on the surface of a non-copper substrate. The epitaxial h-BN has the advantages of good uniformity and large area directly on a non-copper substrate, and can be directly epitaxial to the size of 2,4,6 and 8 inches. In addition, in some prior art, there is still a need for graphene-h-BN composite layers to be used. Because the thin film is transferred onto the substrate on the Cu foil, the process is more complicated than direct epitaxy, and the thin film is easy to damage in the transfer process, so that the thin film needs to be compounded with graphene. The technical solution provided by the embodiments of the present invention obviously does not need to be so.
Therefore, the direct epitaxy method provided by the invention reduces the process steps, improves the yield and reduces the cost.
In addition, the preparation method and the effect of the AlN nucleation layer and the h-BN layer are different, and the h-BN layer is used for shielding lattice mismatch between GaN and a substrate and further extending GaN and AlN by utilizing the characteristic of a hexagonal phase of the h-BN. Some prior art techniques aim to promote GaN nucleation and protect the underlying AlN layer. The magnetron sputtering method used in the prior art is used for preparing the AlN nucleation layer on the substrate, and the MOCVD method used in the invention is used for preparing the AlN nucleation layer on the h-BN surface, and has the characteristics of excellent crystal quality and high temperature resistance. Meanwhile, the AlN nucleation layer mainly promotes the further island growth of the GaN layer, plays a nucleation role, and is different from the lattice correction purpose played by the AlN layer in the prior art. In addition, the process procedure is reduced by directly using MOCVD epitaxy, and the whole set of epitaxy process is directly finished in MOCVD, so that negative effects caused by transfer can be reduced.
In particular, in some embodiments, step 1) may specifically comprise the steps of:
and introducing nitrogen into the reaction chamber at a first temperature and a first pressure to enable the substrate to be in contact with the nitrogen, and performing the pre-nitriding treatment.
In some embodiments, the first temperature is 900 to 1000 ℃ and the first pressure is 90 to 101 kPa.
In some embodiments, the pre-nitridation treatment is for a period of time ranging from 5 to 10 minutes.
In some embodiments, the nitride layer has a thickness of 5-10nm.
In some embodiments, the substrate comprises any one of a sapphire substrate, a silicon carbide substrate, and a silicon substrate, and in some embodiments, the substrate is further preferably a silicon (111) substrate or a silicon (100) substrate.
In some embodiments, step 2) may specifically comprise the steps of:
and simultaneously introducing a nitrogen source and a boron source into the reaction chamber at a second temperature and a second pressure to perform a nucleation reaction to generate the first nucleation layer.
In some embodiments, the second temperature is 900 to 1000 ℃ and the second pressure is 10 to 20kPa.
In some embodiments, the nucleation is carried out for a period of time ranging from 5 to 10 minutes.
In some embodiments, the first nucleation layer has a thickness of 2-5nm.
In some embodiments, the boron source is mixed with a carrier gas into the reaction chamber.
In some embodiments, the carrier gas contains hydrogen. For example, pure hydrogen, or a mixture of hydrogen and argon or other inert gas, etc., wherein the hydrogen ratio may be, for example, 30% or more, etc.
In some embodiments, the boron source is introduced at a flow rate of 10-20sccm and the nitrogen source is introduced at a flow rate of 5-15slm in step 2).
In some embodiments, in step 3), the temperature of the first annealing treatment is 1200-1250 ℃ for 10-20min.
In some embodiments, step 4) may specifically comprise the steps of:
and alternately introducing a nitrogen source and a boron source into the reaction chamber at a third temperature and a third pressure to perform growth of hexagonal boron nitride.
In some embodiments, the third temperature is 1150-1300 ℃ and the third pressure is 5-15kPa.
In some embodiments, the hexagonal boron nitride layer is grown for a time of 2 to 8 minutes.
In some embodiments, the hexagonal boron nitride layer has a thickness of 1-10nm.
In some embodiments, the boron source is introduced at a flow rate of 5-12sccm and the nitrogen source is introduced at a flow rate of 8-15slm in step 4).
In some embodiments, the boron source is introduced for a period of time ranging from 2 to 4 seconds and the nitrogen source is introduced for a period of time ranging from 5 to 8 seconds per cycle.
In some embodiments, the boron source comprises any one or a combination of triethylboron, diborane.
In some embodiments, the nitrogen source comprises ammonia gas.
The embodiment of the invention also provides a manufacturing method of the III-V epitaxial structure, which comprises the following steps:
a hexagonal boron nitride layer is formed on a substrate using the method of preparation in any of the above embodiments.
And growing a second nucleation layer on the surface of the hexagonal boron nitride layer, wherein the second nucleation layer comprises III-V compounds.
And carrying out second annealing treatment on the second nucleation layer.
And epitaxially growing a III-V semiconductor layer on the surface of the second nucleation layer.
In some embodiments, the growth process of the second nucleation layer may specifically include: and (3) enabling the III-group source and the V-group source to be in contact with the surface of the hexagonal boron nitride layer, and growing the second nucleation layer.
In some embodiments, the group III source comprises an aluminum source, further preferably trimethylaluminum, and the group V source comprises ammonia gas.
In some embodiments, the second nucleation layer is grown at a temperature of 800 to 950 ℃ for a time of 2 to 5 minutes and at a pressure of 8 to 15kPa.
In some embodiments, the second annealing treatment is performed at a temperature of 1150-1250 ℃ for a time of 10-25min.
In some embodiments, the atmosphere of the second annealing treatment is a nitrogen atmosphere.
In some embodiments, the III-V semiconductor layer comprises any one or a combination of two or more of aluminum nitride and gallium nitride.
In some embodiments, the preparation of the hexagonal boron nitride layer, the growing of the second nucleation layer, the second annealing treatment, and the epitaxially growing the III-V semiconductor layer are all performed within the same vapor deposition growth chamber.
The embodiment of the invention also provides a III-V epitaxial structure manufactured by the manufacturing method provided by any embodiment.
In some embodiments, the III-V epitaxial structure includes a substrate, a first nucleation layer, a hexagonal boron nitride layer, a second nucleation layer, and a III-V semiconductor layer, which are stacked in this order.
In some embodiments, the III-V semiconductor layer has a dislocation density of less than 9E10 8 /cm 2 . And can be generally guaranteed to be 3E10 18 /cm 2 The following is given.
As some typical application examples of the above technical solution, the preparation of the hexagonal boron nitride layer and the preparation process of the device based on the hexagonal boron nitride layer may be as follows:
as shown in fig. 1, an example is an epitaxial GaN-HEMT on a Si (100) substrate:
s1, cleaning a Si (100) substrate:
placing the substrate into an acetone solution, ultrasonically cleaning the Si substrate for 3min, then ultrasonically cleaning the Si substrate in an isopropanol solution for 5min, then ultrasonically cleaning the Si substrate in ultra-pure water for 5min, repeatedly flushing the Si substrate with ultra-pure water to remove residual acetone and the isopropanol solution, and finally drying the Si substrate by using nitrogen.
Of course, other cleaning methods different from the above may be used for cleaning the substrate, and the purpose of cleaning the surface of the substrate may be achieved.
S2, removing an oxide layer on the surface of the substrate by high-temperature hydrogen:
placing the cleaned wafer into MOCVD reaction chamber, raising temperature to about 1100 deg.C, and introducing H into the reaction chamber 2 The gas is filled for 5min, and a certain amount of SiH is filled into the reaction chamber 4 So as to prevent the substrate from generating larger ravines and remove the oxide layer on the surface of the substrate.
Of course, other reduction or etching methods different from this may be used to remove the surface oxide layer, and other related methods are already known in the art and will not be described herein.
S3, substrate pre-nitriding treatment:
the next step is to reduce the temperature of the reaction chamber to about 900-1000 ℃ and simultaneously to introduce N into the reaction chamber in advance 2 And pre-nitriding the substrate for 5min to obtain the substrate surface nitriding layer with the thickness of about 5nm-10nm.
S4, epitaxy of the h-BN low-temperature buffer nucleation layer (namely the first nucleation layer, the following is carried out):
maintaining the temperature of the reaction chamber at 900-1000deg.C, reducing the pressure of the reaction chamber to 10kpa, introducing Triethylboron (TEB) to the reaction chamber at about 15sccm, and introducing ammonia (NH) 3 ) About 10slm, with a 5min inlet time, wherein the carrier gas is H 2 Or is H-containing 2 To epitaxial the h-BN low temperature buffer layer by about 2-5nm.
S5, annealing the h-BN low-temperature buffer nucleation layer:
stopping the introduction of TEB into the reaction chamberNH 3 Increase N in the reaction chamber 2 Annealing was performed for 10min with flow and temperature rise to 1200 ℃.
S6, h-BN film epitaxy:
maintaining the temperature of the reaction chamber at 1200 ℃, pulse-feeding TEB 8sccm and NH into the reaction chamber 3 10slm, i.e. NH 3 Alternately introducing the epitaxial h-BN and TEB into the reaction chamber, wherein the independent simultaneous introduction time of each source is TEB 3s, NH 3 6s, about 5min, and a h-BN film of about 1-10nm is epitaxially grown.
S7, epitaxy of a low-temperature AlN nucleation layer (namely the second nucleation layer, the following steps are carried out):
reducing the temperature of the reaction chamber to 950 ℃, and introducing TMAL and NH into the reaction chamber 3 And (5) extending the low-temperature nucleation layer of the AlN with the thickness of 50 nm.
S8, annealing the low-temperature AlN nucleation layer:
shut down TMAL and NH 3 Introducing N into the reaction chamber 2 The reaction chamber temperature was raised to 1200 ℃ and then annealed for 15min.
S9, epitaxial growth of a semiconductor layer:
and further extending the GaN-based or AlN-based related device structure.
In the embodiment, the epitaxial growth of the semiconductor layer is performed by using the mode of epitaxial h-BN buffer layer on the Si (100) substrate and the like, and the h-BN serving as a two-dimensional material can be used for shielding the problem that GaN, alN and other device structures cannot be epitaxially grown on the Si (100) substrate and the like due to lattice mismatch, so that GaN and AlN-based devices directly extend out of the Si (100) substrate, the conventional process of Si (100) in the existing integrated circuit can be compatible, and the problems of yield reduction and cost improvement caused by processes such as flip-chip bonding and the like are avoided.
At present, the problem of larger lattice mismatch between a substrate and GaN is mainly solved by introducing a GaN or AlN nucleation layer in a sapphire substrate, a SiC substrate and a Si (111) substrate heteroepitaxial GaN, but the method still cannot completely eliminate the influence of the substrate on the quality of a GaN material, and because of larger lattice mismatch between the Si (100) substrate and the GaN, no ideal technical means for solving the problem of single crystal GaN growth on the Si (100) substrate exists at present. The invention utilizes the two-dimensional characteristic of the h-BN material, has no dangling bond in the vertical direction, can effectively avoid lattice mismatch in the GaN epitaxy process, and further prepares a high-quality GaN epitaxial layer by inserting a two-dimensional h-BN shielding substrate between the substrate and GaN to influence GaN growth.
The technical scheme of the invention is further described in detail below through a plurality of embodiments and with reference to the accompanying drawings. However, the examples are chosen to illustrate the invention only and are not intended to limit the scope of the invention.
Example 1
This example illustrates a preparation case of an epitaxial GaN-HEMT layer on a Si (100) substrate, as follows:
s1, cleaning a Si (100) substrate:
placing the substrate into an acetone solution, ultrasonically cleaning the Si substrate for 3min, then ultrasonically cleaning the Si substrate in an isopropanol solution for 5min, then ultrasonically cleaning the Si substrate in ultra-pure water for 5min, repeatedly flushing the Si substrate with ultra-pure water to remove residual acetone and the isopropanol solution, and finally drying the Si substrate by using nitrogen.
S2, removing an oxide layer on the surface of the substrate by high-temperature hydrogen:
placing the cleaned wafer into MOCVD reaction chamber, raising temperature to 1100 deg.C, and introducing H into the reaction chamber 2 The gas is supplied for 5min, the flow rate is 20slm, and a certain amount of SiH is also supplied into the reaction chamber 4 The flow is 15sccm to prevent the substrate from generating larger ravines and remove the oxide layer on the surface of the substrate.
S3, substrate pre-nitriding treatment:
continuing the previous step, while the temperature of the reaction chamber was lowered to 950 ℃ (pressure 101 kpa), N was introduced into the reaction chamber in advance 2 And (3) pre-nitriding the substrate for 5min at a flow rate of 15slm to obtain a substrate surface nitrided layer of about 7.5nm.
S4, epitaxy of h-BN low-temperature buffer nucleation layer:
maintaining the temperature of the reaction chamber at 950 ℃, reducing the pressure of the reaction chamber to 10kpa, introducing Triethylboron (TEB) 15sccm and ammonia (NH 3) 10slm into the reaction chamber for 5min, wherein the carrier gas is H 2 The h-BN low temperature buffer layer is epitaxially grown about 5nm.
S5, annealing the h-BN low-temperature buffer nucleation layer:
stopping the introduction of TEB and NH into the reaction chamber 3 Increase N in the reaction chamber 2 The flow was set to 10slm, the pressure was 10kpa, and the temperature was raised to 1200 c for annealing for 10min.
S6, h-BN film epitaxy:
maintaining the temperature of the reaction chamber at 1200 ℃, pulse-feeding TEB 8sccm and NH into the reaction chamber 3 10slm, i.e. NH 3 Alternately introducing the epitaxial h-BN and TEB into the reaction chamber, wherein the independent simultaneous introduction time of each source is TEB 3s, NH 3 6s, a total inlet time of 2min and an h-BN film of about 2nm was epitaxially grown under a pressure of 10 kpa. The surface morphology of the h-BN film is shown as figure 2, and the formed h-BN film is uniform and fine in morphology and free of defects such as obvious dislocation and grain boundary.
S7, low-temperature AlN nucleating layer epitaxy:
reducing the temperature of the reaction chamber to 950 ℃, and introducing TMAL with the flow rate of 700sccm and NH with the flow rate of 0.6slm into the reaction chamber 3 An AlN low-temperature nucleation layer with the thickness of 50nm is extended under the pressure of 10 kpa.
S8, annealing the low-temperature AlN nucleation layer:
shut down TMAL and NH 3 Introducing N into the reaction chamber 2 The flow rate was 7slm, the pressure was 10kpa, and the reaction chamber temperature was raised to 1200 c and then annealed for 15min.
S9, epitaxial growth of a semiconductor layer:
the temperature of the reaction chamber is reduced to 1070 ℃, TMGa with the flow rate of 40sccm and NH with the flow rate of 20slm are introduced into the reaction chamber 3 And further extending the GaN semiconductor layer.
As shown in FIG. 3a and FIG. 3b, the XRD rocking curves (002) and (102) of the grown GaN semiconductor layers show that GaN forms good crystals, and the grown GaN semiconductor layers of this example were tested for dislocation density, which resulted in 9E10 8 /cm 2 。
Example 2
This example continues to exemplify a preparation case of an epitaxial GaN-HEMT layer on a Si (100) substrate, which is substantially identical to example 1, except that:
in the step S3, the pre-nitriding temperature is 900 ℃, the pressure is 101KPa, the nitrogen gas inlet flow is 15slm, the time is 8min, and then a 10nm nitriding layer is formed by growth.
In step S4, the growth temperature of the h-BN low-temperature buffer nucleation layer is 950 ℃, the pressure is 10KPa, the Triethylboron (TEB) is 15sccm, and ammonia (NH) 3 ) And (3) introducing 10slm for 10min, and further growing the h-BN low-temperature buffer nucleation layer with the thickness of 5nm.
In step S5, the temperature of the first annealing is 1150 ℃, the pressure is 10KPa, and the annealing time is 10min.
In the step S6, the epitaxial growth temperature of the h-BN film is 1200 ℃, the pressure is 10KPa, and the inlet flow is as follows: TEB15sccm and NH 3 10slm, each time the source is independently co-fired for TEB 3s, NH 3 6s, the growth time is 2min, and then the h-BN film with the thickness of 2nm is prepared.
In step S7, the epitaxial growth temperature of the low-temperature AlN nucleation layer is 890 ℃, the pressure is 10KPa, and the inlet flow is as follows: TMAL with 700sccm sccm and NH with flow rate of 0.6slm 3 An AlN low-temperature nucleation layer with the thickness of 25nm is epitaxially grown.
In step S8, the temperature of the second annealing is 1200 ℃, the pressure is 10KPa, and the annealing time is 18min.
The GaN semiconductor layer grown in this example was tested for dislocation density, resulting in 3×10 18 /cm 2 。
Example 3
This example continues to exemplify a preparation case of an epitaxial GaN-HEMT layer on a Si (100) substrate, which is substantially identical to example 1, except that:
in the step S3, the pre-nitriding temperature is 1000 ℃, the pressure is 101KPa, the nitrogen gas inlet flow is 15slm, the time is 8min, and then a 10nm nitriding layer is formed by growth.
In step S4, the growth temperature of the h-BN low-temperature buffer nucleation layer is 1000 ℃, the pressure is 10KPa, the Triethylboron (TEB) is 15sccm, and ammonia (NH) 3 ) And (3) introducing 10slm for 10min, and further growing the h-BN low-temperature buffer nucleation layer with the thickness of 5nm.
In step S5, the temperature of the first annealing is 1250 ℃, the pressure is 10KPa, and the annealing time is 10min.
In the step S6, the epitaxial growth temperature of the h-BN film is 1250 ℃, the pressure is 10KPa, and the inlet flow is as follows: TEB15sccm and NH 3 10slm, each time the source is independently co-fired for TEB 3s, NH 3 6s, the growth time is 2min, and then the h-BN film with the thickness of 2nm is prepared.
In the step S7, the epitaxial growth temperature of the low-temperature AlN nucleation layer is 870 ℃, the pressure is 10KPa, and the inlet flow is as follows: TMAL of 700sccm and NH at a flow rate of 0.6slm 3 An AlN low-temperature nucleation layer with the thickness of 25nm is epitaxially grown.
In step S8, the temperature of the second annealing is 1250 ℃, the pressure is 10KPa, and the annealing time is 18min.
The GaN semiconductor layer grown in this example was tested for dislocation density, which resulted in 9×10 8 /cm 2 。
Example 4
This example continues to exemplify a preparation case of an epitaxial GaN-HEMT layer on a Si (111) substrate, which is substantially identical to example 1, except that:
the substrate is replaced by a Si (111) substrate, and the rest steps, reaction conditions and reaction raw materials are unchanged.
The GaN semiconductor layer grown in this example was tested for dislocation density, resulting in 3×10 8 /cm 2 。
Example 5
This example continues to illustrate a preparation of an epitaxial GaN-HEMT layer on a silicon carbide substrate, which is substantially identical to example 1, except that:
the substrate is replaced by a silicon carbide substrate, and the rest steps, the reaction conditions and the reaction raw materials are unchanged.
The GaN semiconductor layer grown in this example was tested for dislocation density, resulting in 1×10 18 /cm 2 。
Example 6
This example continues to illustrate a preparation case of an epitaxial GaN-HEMT layer on a sapphire substrate, which is substantially identical to example 1, except that:
the substrate is replaced by a sapphire substrate, and the rest steps, the reaction conditions and the reaction raw materials are unchanged.
The GaN semiconductor layer grown in this example was tested for dislocation density, resulting in 1×10 18 /cm 2 。
Example 7
This example continues to exemplify a preparation of an epitaxial AlN layer on a Si (111) substrate, which is substantially identical to example 1, except that:
in the step S9, the introduced gallium source is replaced by aluminum source triethylaluminum, and the rest steps and reaction conditions are unchanged.
The AlN semiconductor layer grown in this example was tested for dislocation density and found to be 9E10 8 /cm 2 。
Comparative example 1
This comparative example-a preparation case of an epitaxial GaN-HEMT layer on a Si (100) substrate was substantially the same as example 1, except that:
steps S3 to S6 are omitted, and the growth and annealing of the second nucleation layer and the epitaxial growth of the semiconductor layer are directly performed on the surface of the substrate, which is cleaned and the oxide layer removed, in steps S7 to S9, with the growth conditions and the raw materials unchanged.
In this example, since the hexagonal boron nitride was absent, there was a large mismatch between the substrate and gallium nitride, the growth quality of the gallium nitride semiconductor layer was very poor, and for the GaN semiconductor layer grown in this comparative example, polycrystalline GaN was epitaxially grown, which was significantly inferior to that of example 1.
Comparative example 2
This comparative example-a preparation case of an epitaxial GaN-HEMT layer on a Si (100) substrate was substantially the same as example 1, except that:
step S3 is omitted, and steps S4 to S9 are used to directly grow on the surface of the substrate after the oxide layer is cleaned and removed, and the same subsequent growth and annealing treatment of each layer are performed.
In this example, the GaN semiconductor layer grown in this comparative example was tested for dislocation density, which resulted in about 10, because the effect of the nitride layer was absent, and the growth quality of the boron nitride layer was very poor, and thus the film quality of each layer of the subsequent epitaxy was also poor 20 /cm 2 Significantly greater than example 1.
Comparative example 3
This comparative example-a preparation case of an epitaxial GaN-HEMT layer on a Si (100) substrate was substantially the same as example 1, except that:
in step S6, the alternately-introduced boron source and nitrogen source are replaced by simultaneously introducing the boron source and the nitrogen source, and the total amount of introduction and the total time of introduction of each source are unchanged.
In the embodiment, the alternating access is not performed, so that the quality of the boron nitride layer is poor, the surface morphology is rough, and the monocrystal gallium nitride cannot be epitaxially grown
Comparative example 4
This comparative example-a preparation case of an epitaxial GaN-HEMT layer on a Si (100) substrate was substantially the same as example 1, except that:
and step S7-S8 is omitted, gallium nitride is directly grown on the surface of the hexagonal boron nitride, and the growth conditions and raw materials of the gallium nitride layer are unchanged.
In this embodiment, since the further island growth of the GaN layer cannot be promoted without the AlN nucleation layer, a nucleation effect is achieved, and thus the growth quality of the GaN layer is greatly affected by hexagonal boron nitride. The inability to epitaxial single crystal gallium nitride is a significant disadvantage over example 1.
Based on the above embodiments and comparative examples, it is clear that, by pre-nitriding and forming the first nucleation layer, the preparation method of the hexagonal boron nitride layer provided by the embodiment of the present invention can directly grow to form a hexagonal boron nitride layer on a non-copper substrate surface, especially can form a hexagonal boron nitride layer on a substrate surface with larger lattice mismatch, such as silicon (100), and does not need to perform treatments such as peeling bonding of the hexagonal boron nitride layer, thereby improving the quality of epitaxial growth continued based on the hexagonal boron nitride layer and significantly reducing the complexity of the process.
In addition, the manufacturing method for forming the III-V epitaxial structure based on the hexagonal boron nitride layer provided by the embodiment of the invention does not need a stripping bonding process and a specific copper substrate, and the formed III-V epitaxial layer has low dislocation density and excellent performance.
It should be understood that the above embodiments are merely for illustrating the technical concept and features of the present invention, and are intended to enable those skilled in the art to understand the present invention and implement the same according to the present invention without limiting the scope of the present invention. All equivalent changes or modifications made in accordance with the spirit of the present invention should be construed to be included in the scope of the present invention.
Claims (10)
1. The preparation method of the hexagonal boron nitride layer is characterized by comprising the following steps of:
1) Pre-nitriding the substrate to form a nitriding layer on the surface of the substrate;
2) Contacting the nitride layer with a nitrogen source and a boron source, and forming a first nucleation layer containing hexagonal boron nitride on the surface of the nitride layer;
3) Performing first annealing treatment on the first nucleation layer;
4) And alternately contacting the first nucleation layer with a nitrogen source and a boron source, and growing hexagonal boron nitride to obtain the hexagonal boron nitride layer.
2. The preparation method according to claim 1, wherein step 1) specifically comprises:
introducing nitrogen into the reaction chamber at a first temperature and a first pressure to enable the substrate to be in contact with the nitrogen, and performing the pre-nitriding treatment;
preferably, the first temperature is 900-1000 ℃ and the first pressure is 90-101kPa;
preferably, the pre-nitriding treatment time is 5-10min;
preferably, the thickness of the nitride layer is 5-10nm;
and/or the substrate includes any one of a sapphire substrate, a silicon carbide substrate, and a silicon substrate, and is further preferably a silicon (111) substrate or a silicon (100) substrate.
3. The preparation method according to claim 2, wherein step 2) specifically comprises:
introducing a nitrogen source and a boron source into the reaction chamber at the second temperature and the second pressure at the same time to perform a nucleation reaction to generate the first nucleation layer;
preferably, the second temperature is 900-1000 ℃ and the second pressure is 10-20kPa;
preferably, the nucleation reaction time is 5-10min;
preferably, the thickness of the first nucleation layer is 2-5nm;
preferably, the boron source is mixed with a carrier gas into the reaction chamber;
preferably, the carrier gas contains hydrogen;
preferably, the flow rate of the boron source in the step 2) is 10-20sccm, and the flow rate of the nitrogen source is 5-15s1m;
and/or in the step 3), the temperature of the first annealing treatment is 1200-1250 ℃ and the time is 10-20min.
4. The preparation method according to claim 2, wherein step 4) specifically comprises:
alternately introducing a nitrogen source and a boron source into the reaction chamber at a third temperature and a third pressure to grow hexagonal boron nitride;
preferably, the third temperature is 1150-1300 ℃, and the third pressure is 5-15kPa;
preferably, the growth time of the hexagonal boron nitride layer is 2-8min;
preferably, the thickness of the hexagonal boron nitride layer is 1-10nm;
preferably, the flow rate of the boron source in the step 4) is 5-12sccm, and the flow rate of the nitrogen source is 8-15s1m;
preferably, the boron source is introduced for 2-4s and the nitrogen source is introduced for 5-8s in each cycle.
5. The method of claim 3 or 4, wherein the boron source comprises any one or a combination of triethylboron and diborane;
and/or, the nitrogen source comprises ammonia gas.
6. A method for fabricating a III-V epitaxial structure, comprising:
forming a hexagonal boron nitride layer on a substrate using the manufacturing method of any one of claims 1 to 5;
growing a second nucleation layer on the surface of the hexagonal boron nitride layer, wherein the second nucleation layer comprises a III-V compound;
performing a second annealing treatment on the second nucleation layer;
and epitaxially growing a III-V semiconductor layer on the surface of the second nucleation layer.
7. The method of manufacturing according to claim 6, comprising: contacting a III-group source and a V-group source with the surface of the hexagonal boron nitride layer to grow the second nucleation layer;
preferably, the group III source comprises an aluminum source, further preferably trimethylaluminum, and the group V source comprises ammonia gas;
preferably, the growth temperature of the second nucleation layer is 800-950 ℃, the growth time is 2-5min, and the pressure is 8-15kPa.
8. The method according to claim 6, wherein the second annealing treatment is performed at 1150-1250 ℃ for 10-25min;
preferably, the atmosphere of the second annealing treatment is a nitrogen atmosphere;
preferably, the material of the III-V semiconductor layer includes any one or a combination of two of aluminum nitride and gallium nitride.
9. The method of claim 6, wherein the preparing the hexagonal boron nitride layer, growing the second nucleation layer, the second annealing treatment, and epitaxially growing the III-V semiconductor layer are performed in a same vapor deposition growth chamber.
10. A group III-V epitaxial structure produced by the production method of any one of claims 6 to 9;
preferably, the III-V epitaxial structure comprises a substrate, a first nucleation layer, a hexagonal boron nitride layer, a second nucleation layer and a III-V semiconductor layer which are sequentially stacked;
preferably, the dislocation density of the III-V semiconductor layer is less than 9E10 8 /cm 2 。
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