CN113990940B - Silicon carbide epitaxial structure and method for manufacturing same - Google Patents
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 178
- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 177
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 238000000034 method Methods 0.000 title claims abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 72
- 230000006911 nucleation Effects 0.000 claims abstract description 36
- 238000010899 nucleation Methods 0.000 claims abstract description 36
- 229910002601 GaN Inorganic materials 0.000 claims description 66
- 230000007704 transition Effects 0.000 claims description 20
- 238000006243 chemical reaction Methods 0.000 claims description 18
- 229910052710 silicon Inorganic materials 0.000 claims description 14
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 11
- 239000010703 silicon Substances 0.000 claims description 11
- 230000000737 periodic effect Effects 0.000 claims description 8
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 5
- 239000001257 hydrogen Substances 0.000 claims description 5
- 229910052739 hydrogen Inorganic materials 0.000 claims description 5
- 238000002848 electrochemical method Methods 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 3
- 239000012298 atmosphere Substances 0.000 claims description 2
- SLLGVCUQYRMELA-UHFFFAOYSA-N chlorosilicon Chemical compound Cl[Si] SLLGVCUQYRMELA-UHFFFAOYSA-N 0.000 claims description 2
- 239000000463 material Substances 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 313
- 239000011241 protective layer Substances 0.000 description 21
- 239000013078 crystal Substances 0.000 description 17
- 235000012431 wafers Nutrition 0.000 description 11
- 230000007547 defect Effects 0.000 description 7
- 230000000694 effects Effects 0.000 description 6
- 230000002349 favourable effect Effects 0.000 description 6
- 238000005336 cracking Methods 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 206010041662 Splinter Diseases 0.000 description 4
- 230000005856 abnormality Effects 0.000 description 4
- 230000017525 heat dissipation Effects 0.000 description 4
- 239000012535 impurity Substances 0.000 description 3
- 229910002704 AlGaN Inorganic materials 0.000 description 2
- 241001391944 Commicarpus scandens Species 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 238000000407 epitaxy Methods 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 230000008707 rearrangement Effects 0.000 description 2
- 238000005979 thermal decomposition reaction Methods 0.000 description 2
- RGGPNXQUMRMPRA-UHFFFAOYSA-N triethylgallium Chemical compound CC[Ga](CC)CC RGGPNXQUMRMPRA-UHFFFAOYSA-N 0.000 description 2
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 2
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 2
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000003064 anti-oxidating effect Effects 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000013256 coordination polymer Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/26—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys
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- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
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- C30B28/00—Production of homogeneous polycrystalline material with defined structure
- C30B28/12—Production of homogeneous polycrystalline material with defined structure directly from the gas state
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- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
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- C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
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- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
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- H01L21/02524—Group 14 semiconducting materials
- H01L21/02529—Silicon carbide
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- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
The present disclosure provides a silicon carbide epitaxial structure and a method for manufacturing the same, which belong to the technical field of semiconductors. The silicon carbide epitaxial structure comprises a substrate and an interface treatment layer, a nucleation layer and a SiC thick layer which are sequentially laminated on the substrate, wherein the substrate comprises a plurality of GaN layers and AlN layers which alternately grow in a period, the interface treatment layer comprises a first sub-layer and a second sub-layer which are sequentially laminated, the first sub-layer is an undoped SiC layer, the second sub-layer is an Si-doped SiC layer, the nucleation layer is an SiC layer with a plurality of triangular cone-shaped bulges on the surface, and the thickness of the SiC thick layer is 80-100 microns. The silicon carbide epitaxial structure can be used for growing a thicker SiC layer and ensuring the quality of the grown SiC epitaxial structure.
Description
Technical Field
The present disclosure relates to the field of semiconductor technology, and in particular, to a silicon carbide epitaxial structure and a method for manufacturing the same.
Background
Silicon carbide (SiC) has received increasing attention due to its high thermal conductivity, high breakdown voltage, and high saturation carrier concentration, and is widely used in various power conversion devices.
In the related art, a silicon wafer is generally used as a substrate, and a SiC layer is epitaxially grown on the silicon wafer. However, the silicon wafer and SiC material have differences in lattice constants and thermal expansion coefficients, so that tensile stress is likely to occur in the SiC film, and compressive stress is likely to occur in the substrate. Stress accumulation can be rapidly increased along with the increase of film thickness, and the high-temperature growth can further aggravate the stress accumulation due to higher growth temperature during SiC epitaxial growth, and the problems of cracking and the like can also occur in severe cases. Thus, it is difficult to grow thicker SiC of tens or even hundreds of microns on a silicon wafer.
Disclosure of Invention
The embodiment of the disclosure provides a silicon carbide epitaxial structure and a manufacturing method thereof, which can grow a thicker SiC layer and ensure the quality of the grown SiC epitaxial structure. The technical scheme is as follows:
in one aspect, a silicon carbide epitaxial structure is provided, the silicon carbide epitaxial structure comprises a substrate, and an interface treatment layer, a nucleation layer and a SiC thick layer which are sequentially stacked on the substrate, the substrate comprises a plurality of GaN layers and AlN layers which alternately grow in a periodic manner, the interface treatment layer comprises a first sub-layer and a second sub-layer which are sequentially stacked, the first sub-layer is an undoped SiC layer, the second sub-layer is a Si-doped SiC layer, the nucleation layer is a SiC layer with a plurality of triangular cone-shaped protrusions on the surface, and the thickness of the SiC thick layer is 80-100um.
Optionally, the thickness of the interface treatment layer is 20-50 nm.
Optionally, the thickness ratio of the first sub-layer to the second sub-layer in the interface treatment layer is 1:1 to 1:5.
optionally, the doping concentration of Si in the second sub-layer in the interface treatment layer is 10 17 ~10 18 cm -3 。
Optionally, the spacing between the triangular pyramidal protrusions of the nucleation layer surface is 2-50 um.
Optionally, the substrate comprises n+1 GaN layers and n AlN layers which are alternately grown in sequence, wherein n is more than or equal to 20 and less than or equal to 50.
Optionally, the thickness ratio of the GaN layer and the AlN layer in the substrate is 1:1 to 1:5.
optionally, the silicon carbide epitaxial wafer further comprises a transition layer located between the nucleation layer and the SiC thick layer, the transition layer is a SiC layer subjected to high-temperature treatment, and the thickness of the transition layer is 20-80 um.
In another aspect, a method of fabricating a silicon carbide epitaxial structure is provided, the method comprising:
providing a substrate, wherein the substrate comprises a plurality of GaN layers and AlN layers which alternately grow in a periodic manner;
growing an interface treatment layer on the substrate, wherein the interface treatment layer comprises a first sub-layer and a second sub-layer which are sequentially stacked, the first sub-layer is an undoped SiC layer, and the second sub-layer is a Si-doped SiC layer;
and sequentially growing a nucleation layer and a SiC thick layer on the interface treatment layer, wherein the nucleation layer is a SiC layer with a plurality of triangular cone-shaped bulges on the surface, and the thickness of the SiC thick layer is 80-100um.
Optionally, the providing a substrate includes:
sequentially growing a buffer layer, an N-type gallium nitride layer and a superlattice layer on a silicon wafer, wherein the superlattice layer comprises a plurality of GaN layers and AlN layers which alternately grow in a periodic manner;
etching the N-type gallium nitride layer by adopting an electrochemical method, and removing the silicon wafer growing with the buffer layer to obtain the superlattice layer;
the superlattice layer is used as the substrate.
Optionally, the growing an interface treatment layer on the substrate includes:
controlling the temperature of the reaction chamber to be 800-1000 ℃ and growing the first sub-layer in the hydrogen atmosphere;
stopping introducing hydrogen into the reaction chamber, and introducing SiHCl 3 Or SiH 4 And controlling the temperature of the reaction chamber to be increased to 1000-1500 ℃, and the introducing time to be 50-200 s, and growing the second sub-layer on the first sub-layer.
The technical scheme provided by the embodiment of the disclosure has the beneficial effects that:
by providing a silicon carbide epitaxial structure whose substrate includes a plurality of GaN layers and AlN layers alternately grown in cycles, gaN having a lattice constant close to that of SiC, the crystal quality of the SiC epitaxial layer grown thereon can be ensured. The AlN has good heat conduction capability, can play a good heat dissipation effect, and is favorable for coordinating the difference of thermal expansion coefficients between GaN and SiC. Therefore, the GaN layers and the AlN layers alternately grown in a plurality of periods can simultaneously give consideration to the difference of the lattice constant and the thermal expansion coefficient, and a substrate with the same lattice constant and thermal expansion coefficient is provided for the subsequent growth of the SiC epitaxial layer. Meanwhile, the substrate can be ensured not to generate defects such as splinter and the like when the SiC epitaxial layer is grown at a subsequent high temperature. An interface treatment layer and a nucleation layer are respectively grown before the SiC thick layer is grown. The interface treatment layer comprises a first sub-layer and a second sub-layer which are sequentially stacked, wherein the first sub-layer is an undoped SiC layer and can play a role in lattice transition. The second sub-layer is an Si-doped SiC layer, and the Si doping can further improve the crystal quality of SiC. The nucleation layer is a SiC layer with a plurality of triangular cone-shaped bulges on the surface, the plurality of triangular cone-shaped bulges divide the growth of the SiC thick layer into a plurality of small areas, and the SiC thick layer transversely grows after being filled up among the bulges, so that dislocation annihilation is facilitated, and stress is reduced. Therefore, on the basis of the layers, a thicker SiC thick layer with the thickness of 80-100um can be finally grown, the problems of cracking and the like can not occur, and the quality of the grown SiC epitaxial structure is ensured.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present disclosure, and other drawings may be obtained according to these drawings without inventive effort for a person of ordinary skill in the art.
Fig. 1 is a schematic structural view of a silicon carbide epitaxial structure provided in an embodiment of the present disclosure;
FIG. 2 is a flow chart of a method of fabricating a silicon carbide epitaxial structure provided in an embodiment of the present disclosure;
fig. 3 is a flow chart of a method of fabricating another silicon carbide epitaxial structure provided by an embodiment of the present disclosure.
Detailed Description
For the purposes of clarity, technical solutions and advantages of the present disclosure, the following further details the embodiments of the present disclosure with reference to the accompanying drawings.
Fig. 1 is a schematic structural view of a silicon carbide epitaxial structure provided in an embodiment of the present disclosure, and as shown in fig. 1, the silicon carbide epitaxial structure includes a substrate 10, and an interface treatment layer 20, a nucleation layer 30, and a SiC thick layer 50 sequentially stacked on the substrate 10.
The substrate 10 includes a plurality of GaN layers 11 and AlN layers 12 alternately grown in cycles. The interface treatment layer 20 includes a first sub-layer 21 and a second sub-layer 22 stacked in this order, the first sub-layer 21 being an undoped SiC layer, and the second sub-layer 22 being a Si-doped SiC layer. The nucleation layer 30 is a SiC layer having a plurality of triangular pyramidal protrusions on the surface, and the SiC thick layer 50 has a thickness of 80-100um.
According to the silicon carbide epitaxial structure provided by the embodiment of the disclosure, the substrate comprises a plurality of GaN layers and AlN layers which are alternately grown in a periodic manner, gaN has a lattice constant close to that of SiC, and the crystal quality of the SiC epitaxial layer grown on the GaN layers can be ensured. The AlN has good heat conduction capability, can play a good heat dissipation effect, and is favorable for coordinating the difference of thermal expansion coefficients between GaN and SiC. Therefore, the GaN layers and the AlN layers alternately grown in a plurality of periods can simultaneously give consideration to the difference of the lattice constant and the thermal expansion coefficient, and a substrate with the same lattice constant and thermal expansion coefficient is provided for the subsequent growth of the SiC epitaxial layer. Meanwhile, the substrate can be ensured not to generate defects such as splinter and the like when the SiC epitaxial layer is grown at a subsequent high temperature. An interface treatment layer and a nucleation layer are respectively grown before the SiC thick layer is grown. The interface treatment layer comprises a first sub-layer and a second sub-layer which are sequentially stacked, wherein the first sub-layer is an undoped SiC layer and can play a role in lattice transition. The second sub-layer is an Si-doped SiC layer, and the Si doping can further improve the crystal quality of SiC. The nucleation layer is a SiC layer with a plurality of triangular cone-shaped bulges on the surface, the plurality of triangular cone-shaped bulges divide the growth of the SiC thick layer into a plurality of small areas, and the SiC thick layer transversely grows after being filled up among the bulges, so that dislocation annihilation is facilitated, and stress is reduced. Therefore, on the basis of the layers, a thicker SiC thick layer with the thickness of 80-100um can be finally grown, the problems of cracking and the like can not occur, and the quality of the grown SiC epitaxial structure is ensured.
And for SiC devices with the thickness of more than 60um is needed, the epitaxial structure provided by the embodiment of the disclosure can be used for growing the SiC thick layer with the thickness of 80-100um, so that the requirement of the SiC devices with the thickness of more than 10Kv can be met, and wafers are provided for large-scale preparation of the SiC high-voltage devices with low cost.
Alternatively, the substrate 10 includes n+1 GaN layers 11 and n AlN layers 12, 20.ltoreq.n.ltoreq.50 alternately grown in this order.
That is, the GaN layer 11 in the substrate 10 in contact with the interface treatment layer 20 can prevent abnormality from occurring between it and the SiC epitaxial structure due to excessively large difference in lattice constant and thermal expansion coefficient, so that the growth quality of the SiC epitaxial structure epitaxially grown thereon can be ensured.
If the number of periods in the substrate 10 is too large, the substrate 10 will have a thicker thickness, and the lattice and thermal expansion differences of AlN and GaN will be accumulated, resulting in defects and increased stress; if the number of cycles in the substrate 10 is too small, on the one hand it is prone to fracture at high temperatures and on the other hand the substrate crystal quality is poor, and it is also difficult to continue growing high quality thick layers of SiC.
Alternatively, the thickness ratio of the GaN layer 11 and the AlN layer 12 in the substrate 10 is 1:1 to 1:5.
because the difference of the thermal expansion coefficients can cause convex and concave changes of the SiC epitaxial layer during growth, and the thermal expansion coefficients of GaN and AlN are different, the warp changes caused by the thermal expansion differences can be neutralized by setting the thickness of each layer in the range, and the SiC epitaxial layer is favorable for realizing better plane growth.
If the thickness of the AlN layer 12 is larger than that of the GaN layer 11, it is difficult to effectively balance the warp change due to the temperature difference, and stress is likely to be accumulated in the film during the growth, so that the thickness of the AlN layer 12 is set to be large.
Alternatively, the thickness of the substrate 10 is 50 to 500nm.
If the thickness of the substrate 10 is too thin, it is easily broken during high temperature growth; if the thickness of the substrate 10 is too thick, the differences in lattice and stress between AlN and GaN will accumulate, affecting the quality of the subsequent SiC epitaxial layer.
Optionally, the substrate 10 further includes a protective layer 13 on the surface of the last GaN layer 11, where the protective layer 13 is a Si-doped GaN layer.
Since the protective layer 13 is doped with Si, a Si dangling bond can be formed on the surface of the last GaN layer 11, which is beneficial to subsequent bonding with the SiC epitaxial structure. Meanwhile, si is doped in the protective layer 13, which can also play an anti-oxidation role to prevent the surface of the GaN layer 110 from being oxidized, and finally affect the crystal quality of the SiC epitaxial structure grown thereon.
Alternatively, the thickness of the protective layer 13 is 5 to 10nm.
If the thickness of the protective layer 13 is too thin, the protective layer is easily affected by the adsorbed C/H/O/Si and other impurity elements, and is also easily damaged by thermal decomposition after time delay at high temperature; if the thickness of the protective layer 13 is too thick, internal stress of the film is easily introduced during subsequent high-temperature epitaxy of SiC due to the difference of thermal expansion coefficients, resulting in abnormality of the SiC thick film.
Optionally, the thickness of the interface treatment layer 20 is 20-50 nm.
If the thickness of the interface treatment layer 20 is too thick, the quality deviation of the underlying crystal is caused, and the quality of the subsequent epitaxial crystal is difficult to improve; if the thickness of the interface treatment layer 20 is too thin, lattice transition cannot be effectively completed, and the crystal quality is difficult to be improved in the subsequent epitaxial growth of the SiC thick layer.
Optionally, the thickness ratio of the first sub-layer 21 and the second sub-layer 22 in the interface treatment layer 20 is 1:1 to 1:5.
optionally, the doping concentration of Si in the second sub-layer 22 in the interface treatment layer 20 is 10 17 ~10 18 cm -3 。
If the doping concentration of Si in the second sub-layer 22 is too high, si may exist as an impurity, affecting the crystal quality; if the doping concentration of Si in the second sub-layer 22 is too small, it is difficult to improve point defects and improve crystal quality.
Alternatively, the spacing between the plurality of triangular pyramidal protrusions on the surface of nucleation layer 30 is 2 to 50um.
If the spacing between the triangular pyramidal protrusions is too small, the subsequent filling is easy and quick, and the purpose of reducing dislocation and stress is difficult to achieve; if the spacing between the triangular pyramidal projections is too large, the difference between the micro-regions becomes significant, affecting the uniformity and uniformity within the sheet.
Illustratively, the diameter of the base of each triangular-cone-shaped protrusion is 2-10 um.
Optionally, the silicon carbide epitaxial structure further comprises a transition layer 40 between the nucleation layer 30 and the thick SiC layer 50, the transition layer 40 being a high temperature treated SiC layer, the transition layer 40 having a thickness of 20-80 um.
The high-temperature treatment can lead Si and C to carry out atomic rearrangement under the help of thermal kinetic energy, and a high-quality SiC layer is obtained, thereby having better transitional effect and providing a good growth foundation for the subsequent growth of a SiC thick layer.
Embodiments of the present disclosure also provide a method for manufacturing a silicon carbide epitaxial structure, for manufacturing a silicon carbide epitaxial structure as described in fig. 1.
Fig. 2 is a flowchart of a method for manufacturing a silicon carbide epitaxial structure according to an embodiment of the present disclosure, and as shown in fig. 2, the method includes:
Wherein the substrate comprises a plurality of GaN layers and AlN layers alternately grown in cycles.
The interface treatment layer comprises a first sub-layer and a second sub-layer which are sequentially stacked, wherein the first sub-layer is an undoped SiC layer, and the second sub-layer is a Si-doped SiC layer.
And 203, sequentially growing a nucleation layer and a SiC thick layer on the interface treatment layer.
The nucleation layer is a SiC layer with a plurality of triangular cone-shaped bulges on the surface, and the thickness of the SiC thick layer is 80-100um.
According to the silicon carbide epitaxial structure grown by the embodiment of the disclosure, the substrate comprises a plurality of GaN layers and AlN layers which are alternately grown in cycles, the lattice constants of GaN and SiC are close, and the crystal quality of the SiC epitaxial layer grown on the GaN layers can be ensured. The AlN has good heat conduction capability, can play a good heat dissipation effect, and is favorable for coordinating the difference of thermal expansion coefficients between GaN and SiC. Therefore, the GaN layers and the AlN layers alternately grown in a plurality of periods can simultaneously give consideration to the difference of the lattice constant and the thermal expansion coefficient, and a substrate with the same lattice constant and thermal expansion coefficient is provided for the subsequent growth of the SiC epitaxial layer. Meanwhile, the substrate can be ensured not to generate defects such as splinter and the like when the SiC epitaxial layer is grown at a subsequent high temperature. An interface treatment layer and a nucleation layer are respectively grown before the SiC thick layer is grown. The interface treatment layer comprises a first sub-layer and a second sub-layer which are sequentially stacked, wherein the first sub-layer is an undoped SiC layer and can play a role in lattice transition. The second sub-layer is an Si-doped SiC layer, and the Si doping can further improve the crystal quality of SiC. The nucleation layer is a SiC layer with a plurality of triangular cone-shaped bulges on the surface, the plurality of triangular cone-shaped bulges divide the growth of the SiC thick layer into a plurality of small areas, and the SiC thick layer transversely grows after being filled up among the bulges, so that dislocation annihilation is facilitated, and stress is reduced. Therefore, on the basis of the layers, a thicker SiC thick layer with the thickness of 80-100um can be finally grown, the problems of cracking and the like can not occur, and the quality of the grown SiC epitaxial structure is ensured.
Embodiments of the present disclosure also provide another method of fabricating a silicon carbide epitaxial structure for fabricating a silicon carbide epitaxial structure as described in fig. 1.
Fig. 3 is a flowchart of a method for manufacturing a silicon carbide epitaxial structure according to an embodiment of the present disclosure, and as shown in fig. 3, the method includes:
Wherein the substrate comprises a plurality of GaN layers and AlN layers alternately grown in cycles.
Alternatively, the substrate comprises n+1 GaN layers and n AlN layers which are alternately grown in turn, wherein n is more than or equal to 20 and less than or equal to 50.
That is, the layer in the substrate in contact with the interface treatment layer is a GaN layer, which can prevent abnormality from occurring between it and the SiC epitaxial structure due to excessively large difference in lattice constant and thermal expansion coefficient, and thus can ensure the growth quality of the SiC epitaxial structure epitaxially grown thereon.
If the number of periods in the substrate is too large, the thickness of the substrate is thicker, and the lattice and thermal expansion differences of AlN and GaN are accumulated continuously, so that defects and stress are increased; if the number of cycles in the substrate is too small, on the one hand, it is easy to break at high temperature, and on the other hand, the substrate crystal quality is poor, and it is difficult to continue growing high quality thick layer SiC.
Alternatively, the thickness ratio of the GaN layer and the AlN layer in the substrate is 1:1 to 1:5.
because the difference of the thermal expansion coefficients can cause convex and concave changes of the SiC epitaxial layer during growth, and the thermal expansion coefficients of GaN and AlN are different, the warp changes caused by the thermal expansion differences can be neutralized by setting the thickness of each layer in the range, and the SiC epitaxial layer is favorable for realizing better plane growth.
If the thickness of the AlN layer is smaller, it is difficult to effectively balance the warp change caused by the temperature difference, and stress is likely to be accumulated in the film during the growth process, so that the thickness of the AlN layer 12 is set to be larger.
Alternatively, the thickness of the substrate is 50 to 500nm.
If the thickness of the substrate is too thin, the substrate is easy to break during high-temperature growth; if the thickness of the substrate is too thick, the differences of the lattice and stress of AlN and GaN can be accumulated continuously, and the growth quality of the subsequent SiC epitaxial layer is affected.
Optionally, the substrate further includes a protective layer on the surface of the last GaN layer, where the protective layer is a Si-doped GaN layer.
Because the protective layer is doped with Si, si dangling bonds can be formed on the surface of the last GaN layer, and the subsequent bonding with the SiC epitaxial structure is facilitated. Meanwhile, si is doped in the protective layer, so that the protective layer can play a role in preventing oxidization, the surface of the GaN layer 1 is prevented from being oxidized, and finally the crystal quality of the SiC epitaxial structure grown on the surface is influenced.
Alternatively, the thickness of the protective layer 13 is 5 to 10nm.
If the thickness of the protective layer 30 is too thin, the protective layer is easily affected by the adsorbed C/H/O/Si and other impurity elements, and is also easily damaged by thermal decomposition after time delay at high temperature; if the thickness of the protective layer 30 is too thick, internal stress is easily introduced during subsequent high temperature epitaxy of SiC due to the difference in thermal expansion coefficient, resulting in abnormality of the SiC thick film.
Illustratively, step 301 may include:
and firstly, sequentially growing a buffer layer, an N-type gallium nitride layer and a superlattice layer on a silicon wafer, wherein the superlattice layer comprises a plurality of GaN layers and AlN layers which alternately grow in a periodic manner.
Wherein the buffer layer is an undoped GaN layer or AlGaN layer, and the thickness is 15-30 nm. The N-type gallium nitride layer is a Si-doped GaN layer, and the thickness of the N-type gallium nitride layer is 200-500 nm.
Optionally, the buffer layer is an undoped GaN layer or an AlGaN layer, and the thickness is 15-30 nm. The nucleation layer may serve as a nucleus for subsequent epitaxial growth.
In the embodiment of the disclosure, the doping concentration of Si in the N-type gallium nitride layer is 5E18-5E19cm -3 。
Controlling the temperature of the reaction chamber to be 600-900 ℃ and the pressure to be 100-500 torr, and growing a nucleation layer on the silicon wafer;
the temperature of the reaction chamber is controlled to be 950-1150 ℃ and the pressure is controlled to be 100-500 torr. Introducing Ga source and NH into the reaction chamber under nitrogen atmosphere 3 And SiH 4 The growth thickness is 200-500nm, the doping concentration of Si is 5E18-5E19cm -3 N-type gallium nitride layer;
controlling the temperature of the reaction chamber to 1150-1350 ℃ and the pressure to 100-300 torr, and growing a superlattice layer on the N-type gallium nitride layer.
Etching the N-type gallium nitride layer by adopting an electrochemical method, and removing the silicon wafer with the buffer layer to obtain a superlattice layer;
and thirdly, taking the superlattice layer as a substrate.
Illustratively, step 301 may further comprise:
and growing a protective layer on the superlattice layer, wherein the protective layer is a Si-doped GaN layer, and the thickness of the protective layer is 5-10 nm.
Illustratively, the temperature and pressure within the reaction chamber are controlled to remain constant, and the Ga source and NH are turned off 3 Introducing SiH 4 And forming a protective layer on the surface of the second sub-layer.
The interface treatment layer comprises a first sub-layer and a second sub-layer which are sequentially stacked, wherein the first sub-layer is an undoped SiC layer, and the second sub-layer is a Si-doped SiC layer.
Optionally, the thickness of the interface treatment layer is 20-50 nm.
Optionally, the thickness ratio of the first sub-layer to the second sub-layer 22 in the interface treatment layer is 1:1 to 1:5.
optionally, the doping concentration of Si in the second sub-layer in the interface treatment layer is 10 17 ~10 18 cm -3 。
Illustratively, step 302 may include:
the temperature of the reaction chamber is controlled to be 1200-1400 ℃, the pressure is controlled to be 1-10 Torr, and an interface treatment layer is grown on the substrate.
The nucleation layer is a SiC layer with a plurality of triangular cone-shaped bulges on the surface.
Alternatively, the spacing between the plurality of triangular pyramidal protrusions on the surface of nucleation layer 30 is 2 to 50um.
Illustratively, the diameter of the base of each triangular-cone-shaped protrusion is 2-10 nm.
Illustratively, step 303 may include:
and controlling the temperature of the reaction chamber to be 1100-1300 ℃ and the pressure to be 1-10 Torr, and growing a nucleation layer on the interface treatment layer.
The transition layer is a SiC layer subjected to high-temperature treatment, and the thickness of the transition layer is 20-80 um.
The high-temperature treatment can lead Si and C to carry out atomic rearrangement under the help of thermal kinetic energy, and a high-quality SiC layer is obtained, thereby having better transitional effect and providing a good growth foundation for the subsequent growth of a SiC thick layer.
Illustratively, step 304 may include:
controlling the temperature of the reaction chamber to 1500-1750 ℃ and the pressure to 1-10 Torr, and growing a transition layer on the nucleation layer.
Wherein the thickness of the SiC thick layer is 80-100um.
Illustratively, the reaction chamber temperature is controlled to be 1400-1750 ℃ and the pressure is controlled to be 1-10 Torr, and a thick layer of SiC is grown on the transition layer.
It should be noted that, in the embodiment of the present disclosure, the control of temperature and pressure refers to controlling the temperature and pressure in the reaction chamber of the epitaxial growth structure, specifically, the reaction chamber of the Metal organic chemical vapor deposition (english: metal-organic Chemical Vapor Deposition, abbreviated as MOCVD) apparatus. Adopts high-purity H 2 (Hydrogen) or high purity N 2 (Nitrogen) or high purity H 2 And high purity N 2 High purity NH using the mixed gas of (2) as carrier gas 3 As nitrogen source, trimethylgallium (TMGa) and triethylgallium (TEGa) as gallium source, trimethylindium (TMIn) as indium source, silane (SiH 4) as N-type dopant, i.e., si source, trimethylaluminum (TMAL) as aluminum source, magnesium-cyclopentadienyl (CP 2 Mg) as P-type dopant, i.e., mg source.
According to the silicon carbide epitaxial structure grown by the embodiment of the disclosure, the substrate comprises a plurality of GaN layers and AlN layers which are alternately grown in cycles, the lattice constants of GaN and SiC are close, and the crystal quality of the SiC epitaxial layer grown on the GaN layers can be ensured. The AlN has good heat conduction capability, can play a good heat dissipation effect, and is favorable for coordinating the difference of thermal expansion coefficients between GaN and SiC. Therefore, the GaN layers and the AlN layers alternately grown in a plurality of periods can simultaneously give consideration to the difference of the lattice constant and the thermal expansion coefficient, and a substrate with the same lattice constant and thermal expansion coefficient is provided for the subsequent growth of the SiC epitaxial layer. Meanwhile, the substrate can be ensured not to generate defects such as splinter and the like when the SiC epitaxial layer is grown at a subsequent high temperature. An interface treatment layer and a nucleation layer are respectively grown before the SiC thick layer is grown. The interface treatment layer comprises a first sub-layer and a second sub-layer which are sequentially stacked, wherein the first sub-layer is an undoped SiC layer and can play a role in lattice transition. The second sub-layer is an Si-doped SiC layer, and the Si doping can further improve the crystal quality of SiC. The nucleation layer is a SiC layer with a plurality of triangular cone-shaped bulges on the surface, the plurality of triangular cone-shaped bulges divide the growth of the SiC thick layer into a plurality of small areas, and the SiC thick layer transversely grows after being filled up among the bulges, so that dislocation annihilation is facilitated, and stress is reduced. Therefore, on the basis of the layers, a thicker SiC thick layer with the thickness of 80-100um can be finally grown, the problems of cracking and the like can not occur, and the quality of the grown SiC epitaxial structure is ensured.
The foregoing description of the preferred embodiments of the present disclosure is provided for the purpose of illustration only, and is not intended to limit the disclosure to the particular embodiments disclosed, but on the contrary, the intention is to cover all modifications, equivalents, alternatives, and alternatives falling within the spirit and principles of the disclosure.
Claims (10)
1. The silicon carbide epitaxial structure is characterized by comprising a substrate, and an interface treatment layer, a nucleation layer and a SiC thick layer which are sequentially laminated on the substrate, wherein the substrate comprises a plurality of GaN layers and AlN layers which alternately grow in a periodic manner, the interface treatment layer comprises a first sub-layer and a second sub-layer which are sequentially laminated, the first sub-layer is an undoped SiC layer, the second sub-layer is a Si-doped SiC layer, the nucleation layer is a SiC layer with a plurality of triangular cone-shaped bulges on the surface, and the thickness of the SiC thick layer is 80-100um.
2. The silicon carbide epitaxial structure of claim 1, wherein the thickness of the interface treatment layer is 20-50 nm.
3. The silicon carbide epitaxial structure of claim 2, wherein the ratio of thicknesses of the first sub-layer and the second sub-layer in the interface treatment layer is 1:1 to 1:5.
4. the silicon carbide epitaxial structure of claim 1, wherein the Si doping concentration in the second sub-layer in the interface treatment layer is 10 17 ~10 18 cm -3 。
5. The silicon carbide epitaxial structure of claim 1, wherein the spacing between the plurality of triangular pyramidal protrusions of the nucleation layer surface is between 2 and 50um.
6. The silicon carbide epitaxial structure of claim 1, wherein the substrate comprises n+1 GaN layers and n AlN layers alternately grown in sequence, 20 n 50.
7. The silicon carbide epitaxial structure of any one of claims 1 to 6 further comprising a transition layer between the nucleation layer and the thick layer of SiC, the transition layer being a high temperature treated SiC layer, the transition layer having a thickness of 20 to 80um.
8. A method of fabricating a silicon carbide epitaxial structure, the method comprising:
providing a substrate, wherein the substrate comprises a plurality of GaN layers and AlN layers which alternately grow in a periodic manner;
growing an interface treatment layer on the substrate, wherein the interface treatment layer comprises a first sub-layer and a second sub-layer which are sequentially stacked, the first sub-layer is an undoped SiC layer, and the second sub-layer is a Si-doped SiC layer;
and sequentially growing a nucleation layer and a SiC thick layer on the interface treatment layer, wherein the nucleation layer is a SiC layer with a plurality of triangular cone-shaped bulges on the surface, and the thickness of the SiC thick layer is 80-100um.
9. The method of manufacturing according to claim 8, wherein providing a substrate comprises:
sequentially growing a buffer layer, an N-type gallium nitride layer and a superlattice layer on a silicon wafer, wherein the superlattice layer comprises a plurality of GaN layers and AlN layers which alternately grow in a periodic manner;
etching the N-type gallium nitride layer by adopting an electrochemical method, and removing the silicon wafer growing with the buffer layer to obtain the superlattice layer;
the superlattice layer is used as the substrate.
10. The method of manufacturing of claim 8, wherein growing an interface treatment layer on the substrate comprises:
controlling the temperature of the reaction chamber to be 800-1000 ℃ and growing the first sub-layer in the hydrogen atmosphere;
stopping the hydrogen supply to the reaction chamberAnd is filled with SiHCl 3 Or SiH 4 And (3) introducing the material for 50-200 s, controlling the temperature of the reaction chamber to rise to 1000-1500 ℃, and growing the second sub-layer on the first sub-layer.
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