CN116190249B - Surface treatment method of ceramic substrate - Google Patents
Surface treatment method of ceramic substrate Download PDFInfo
- Publication number
- CN116190249B CN116190249B CN202310449941.2A CN202310449941A CN116190249B CN 116190249 B CN116190249 B CN 116190249B CN 202310449941 A CN202310449941 A CN 202310449941A CN 116190249 B CN116190249 B CN 116190249B
- Authority
- CN
- China
- Prior art keywords
- ceramic substrate
- photoresist
- metal
- circuit
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000919 ceramic Substances 0.000 title claims abstract description 65
- 239000000758 substrate Substances 0.000 title claims abstract description 56
- 238000000034 method Methods 0.000 title claims abstract description 41
- 238000004381 surface treatment Methods 0.000 title abstract description 8
- 229910052751 metal Inorganic materials 0.000 claims abstract description 46
- 239000002184 metal Substances 0.000 claims abstract description 46
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 38
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims abstract description 30
- 238000005507 spraying Methods 0.000 claims abstract description 22
- 238000009713 electroplating Methods 0.000 claims abstract description 20
- 239000010931 gold Substances 0.000 claims abstract description 19
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 17
- 229910052737 gold Inorganic materials 0.000 claims abstract description 17
- 238000007747 plating Methods 0.000 claims abstract description 17
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims abstract description 14
- 229910052759 nickel Inorganic materials 0.000 claims abstract description 14
- 229910052709 silver Inorganic materials 0.000 claims abstract description 14
- 239000004332 silver Substances 0.000 claims abstract description 14
- 238000004544 sputter deposition Methods 0.000 claims abstract description 14
- 238000004519 manufacturing process Methods 0.000 claims abstract description 13
- 239000003292 glue Substances 0.000 claims abstract description 11
- 238000005530 etching Methods 0.000 claims abstract description 10
- 238000001259 photo etching Methods 0.000 claims abstract description 9
- 239000007769 metal material Substances 0.000 claims abstract description 4
- 239000010949 copper Substances 0.000 claims description 21
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 19
- 229910052802 copper Inorganic materials 0.000 claims description 19
- 238000011161 development Methods 0.000 claims description 14
- SECXISVLQFMRJM-UHFFFAOYSA-N N-Methylpyrrolidone Chemical compound CN1CCCC1=O SECXISVLQFMRJM-UHFFFAOYSA-N 0.000 claims description 8
- MCMNRKCIXSYSNV-UHFFFAOYSA-N Zirconium dioxide Chemical compound O=[Zr]=O MCMNRKCIXSYSNV-UHFFFAOYSA-N 0.000 claims description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 5
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 3
- 238000001132 ultrasonic dispersion Methods 0.000 claims description 3
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 2
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 2
- 239000007788 liquid Substances 0.000 claims description 2
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 2
- 238000000206 photolithography Methods 0.000 claims 2
- 239000004065 semiconductor Substances 0.000 abstract description 3
- 239000010410 layer Substances 0.000 abstract 1
- 239000011241 protective layer Substances 0.000 abstract 1
- 230000004888 barrier function Effects 0.000 description 5
- 238000004140 cleaning Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 238000005245 sintering Methods 0.000 description 4
- WGTYBPLFGIVFAS-UHFFFAOYSA-M tetramethylammonium hydroxide Chemical compound [OH-].C[N+](C)(C)C WGTYBPLFGIVFAS-UHFFFAOYSA-M 0.000 description 4
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000007772 electroless plating Methods 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
- GEIAQOFPUVMAGM-UHFFFAOYSA-N Oxozirconium Chemical compound [Zr]=O GEIAQOFPUVMAGM-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005238 degreasing Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- MSNOMDLPLDYDME-UHFFFAOYSA-N gold nickel Chemical compound [Ni].[Au] MSNOMDLPLDYDME-UHFFFAOYSA-N 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229910052573 porcelain Inorganic materials 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
Landscapes
- Engineering & Computer Science (AREA)
- Ceramic Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
The invention discloses a ceramic substrate surface treatment method, relates to the field of semiconductor components, and aims to solve the problem of surface protection of a metallized ceramic substrate, and has the technical scheme that the method comprises the following steps: (1) one-time graph manufacture: exposing, developing and etching the ceramic substrate film to form a metal circuit pattern; (2) spraying glue: uniformly spraying a layer of photoresist on the surfaces of the ceramic substrate and the circuit; (3) secondary graph making: photoetching and developing are carried out to expose the metal circuit and the bonding pad; (4) plating conductive metal: plating conductive metal by adopting a vacuum sputtering process to lead each metal circuit and the independent bonding pad to be mutually conducted; (5) surface plating: electroplating nickel, gold or silver on the surface of the whole ceramic substrate, (6) stripping photoresist: and removing the electroplated metal material in the line spacing by using a photoresist stripping solution to form mutually insulated lines and bonding pads. The surface treatment method of the ceramic substrate can plate a thicker protective layer of nickel, gold, silver and the like on the surface of the ceramic substrate.
Description
Technical Field
The invention relates to the field of IGBT processing, in particular to a ceramic substrate surface treatment method.
Background
On a semiconductor power device, the ceramic substrate has the advantages of excellent heat conduction, small thermal expansion coefficient, good stability and the like, and is widely applied to the technical fields of semiconductor illumination, aerospace, automobile electronics, 5G communication and the like and military electronic components. Some products with extremely high welding requirements and harsh application environments need to protect the surface of a copper layer, and the traditional circuit board surface treatment mode is chemical plating after one-time pattern etching, but the chemical plating has limited thickness and cannot be quite thick like electroplating. The conductive leads are designed to conduct and connect the electric appliance, then electroplating is carried out, and finally the conductive leads are etched, but the metal circuit layer of the ceramic substrate is very thick, so that difficulties are brought to lead etching, the circuit is more complex, and the conductive leads cannot be designed in a plurality of areas.
There is therefore a need to propose a new solution to this problem.
Disclosure of Invention
Aiming at the defects existing in the prior art, the invention aims to provide a ceramic substrate surface treatment method which can realize the requirements of electroplating gold and silver on the surface of a metal circuit of a ceramic substrate, wherein the thickness of the gold and silver is far greater than that of the traditional electroless plating, and meanwhile, the insulation requirements between circuits are met.
The technical aim of the invention is realized by the following technical scheme: a method for treating a surface of a ceramic substrate, comprising the steps of:
(1) And (3) primary graph manufacturing: carrying out film pasting, exposure, development and etching on the ceramic substrate by adopting a negative film process to obtain a metal circuit pattern;
(2) Spraying glue: uniformly spraying a layer of photoresist on the surfaces of the ceramic substrate and the circuit;
(3) And (3) secondary graph manufacturing: photoetching and developing are carried out to expose the metal circuit and the bonding pad;
(4) Plating conductive metal: plating conductive metal by adopting a vacuum sputtering process to lead each metal circuit and the independent bonding pad to be mutually conducted;
(5) Surface electroplating: electroplating one or more of nickel, gold and silver on the surface of the whole ceramic substrate;
(6) Stripping photoresist: and removing the electroplated metal material in the line spacing by using a photoresist stripping solution to form mutually insulated lines and bonding pads.
The invention is further provided with: the ceramic substrate is a DBC, DBA, AMB or DPC metallized ceramic substrate.
The invention is further provided with: the ceramic substrate is made of alumina, zirconia reinforced alumina, aluminum nitride, silicon carbide or quartz glass.
The invention is further provided with: the metal lines and the bonding pads are copper or aluminum.
The invention is further provided with: the vacuum sputtered conductive metal is copper, nickel, gold or silver.
The invention is further provided with: and (3) spraying the adhesive in the step (2) in an ultrasonic dispersion mode, wherein the ultrasonic frequency is more than 50KHz.
The invention is further provided with: the photoresist is UV photoresist with a thickness of more than 10 mu m.
The invention is further provided with: in the step (3), the exposure light source adopted by the photoetching development is UV light, and the direct photoetching is carried out by adopting a laser direct writing mode, so that the metal circuit and the bonding pad are exposed after the development.
The invention is further provided with: in the step (4), the power of the vacuum sputtering conductive metal is 5-10 KW, the thickness is 0.5-2 mu m, and a layer of conductive metal is uniformly sputtered on the surface of the whole ceramic substrate as a conductive layer so that each circuit and each independent bonding pad are mutually conducted.
The invention is further provided with: in the step (6), the photoresist stripping solution is 50% -100% NMP methyl pyrrolidone, the temperature is 80 ℃, and the spraying pressure is 0.2-1 MPa.
In summary, the invention has the following beneficial effects: the method comprises the steps of firstly carrying out pattern manufacture on a metallized ceramic substrate, etching a circuit layer, adopting a spraying, photoetching and developing process to manufacture a barrier layer on the ceramic surface with a circuit interval, then manufacturing a conductive layer for electroplating, finally removing the barrier layer on the ceramic surface, and simultaneously removing a metal layer on the barrier layer surface, thereby realizing the requirement of electroplating nickel, gold or silver on the metal circuit surface. The thickness of the nickel, gold or silver is much greater than conventional electroless plating.
Drawings
FIG. 1 is a schematic diagram of a ceramic substrate after primary patterning according to the present invention;
FIG. 2 is a schematic diagram of a ceramic substrate after the glue spraying process of the present invention;
FIG. 3 is a schematic diagram of a ceramic substrate after the fabrication of the secondary pattern according to the present invention;
FIG. 4 is a schematic diagram of the structure of a ceramic substrate of the present invention after surface sputtering and electroplating;
fig. 5 is a schematic structural diagram of the ceramic substrate after photoresist stripping.
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings and examples.
A method for treating a surface of a ceramic substrate, comprising the steps of:
(1) And (3) primary graph manufacturing: carrying out film pasting, exposure, development and etching on a ceramic substrate by adopting a negative film process to obtain a metal circuit pattern, wherein the structural state of the metal circuit pattern is shown in a figure 1;
(2) Spraying glue: uniformly spraying a layer of photoresist on the surfaces of the ceramic substrate and the circuit, wherein the structural state of the photoresist is shown in figure 2;
(3) And (3) secondary graph manufacturing: carrying out photoetching development to expose the metal circuit and the bonding pad, wherein the structural state of the metal circuit and the bonding pad is shown in figure 3;
(4) Plating conductive metal: plating conductive metal by adopting a vacuum sputtering process to lead each metal circuit and the independent bonding pad to be mutually conducted;
(5) Surface electroplating: one or more of nickel, gold and silver are electroplated on the surface of the whole ceramic substrate to form a surface electroplated layer, and the structural state of the surface electroplated layer is shown in figure 4;
(6) Stripping photoresist: the photoresist stripping solution is used to remove the electroplated metal material in the line spacing to form mutually insulated lines and pads, the structure of which is shown in fig. 5.
Including but not limited to, a metallized ceramic substrate of DBC, DBA, AMB or DPC.
Wherein the ceramic type of the ceramic substrate includes alumina (Al 2 O 3 ) Zirconium oxide (ZrO) 2 ) Zirconia reinforced alumina (ZTA), aluminum nitride (AlN), silicon nitride (Si) 3 N 4 ) Silicon carbide (SiC) or quartz glass (SiO) 2 )。
Wherein the metal lines and pads include, but are not limited to, copper (Cu), aluminum (Al).
Wherein the vacuum sputtered conductive metal includes, but is not limited to, copper (Cu), nickel (Ni), gold (Au), silver (Ag).
Wherein the surface plating includes, but is not limited to, nickel (Ni), gold (Au), silver (Ag), including partial metal line plating and plating of all metal lines.
Wherein the thickness of the metal layer of the ceramic substrate is 0.2mm-0.8mm, and the thickness of the ceramic layer is 0.2mm-2.0mm.
Wherein the glue spraying in the step (2) adopts an ultrasonic dispersion mode, and the ultrasonic frequency is more than 50KHz.
The photoresist is UV photoresist, and a barrier layer can be uniformly sprayed on the rugged circuit of the metallized ceramic substrate and the ceramic surface, and the thickness of the barrier layer is more than 10 mu m.
And (3) performing direct photoetching by adopting a laser direct writing mode by adopting UV light as an exposure light source adopted by photoetching development, and exposing the metal circuit and the bonding pad after development.
In the step (4), the power of the vacuum sputtering conductive metal is 5-10 KW, the thickness is 0.5-2 mu m, and a layer of conductive metal is uniformly sputtered on the surface of the whole ceramic substrate as a conductive layer to enable each circuit and each independent bonding pad to be mutually conducted.
Wherein in the step (6), the photoresist stripping solution is 50% -100% NMP methyl pyrrolidone, the temperature is 80 ℃, and the spraying pressure is 0.2-1 mpa.
The following examples are given as specific illustrations:
first, a metallized ceramic substrate is prepared:
(1) Cleaning copper sheets and porcelain sheets: cleaning copper sheet oxidation, ceramic sheet stains and the like;
(2) Sintering copper sheets and ceramic sheets: sintering the ceramic and the copper sheet together;
and then preparing a circuit of the ceramic substrate:
(3) And (3) primary graph manufacturing: adopting a negative film process to carry out film pasting, exposure, development and etching to obtain patterns such as a circuit, a bonding pad and the like;
and then the glue spraying process is carried out:
(4) Spraying glue: uniformly spraying a layer of photoresist on the surfaces of the substrate and the circuit;
secondly, preparing secondary patterns, carrying out vacuum sputtering copper plating and electroplating:
(5) And (3) secondary graph manufacturing: exposing and developing to expose the circuit and the bonding pad;
(6) Vacuum sputtering copper: making each circuit and the independent bonding pad mutually conducted;
(7) Surface electroplating: electroplating nickel and gold on the whole surface of the substrate;
finally, stripping the rubber to obtain a finished product:
(8) Stripping photoresist: the high-pressure photoresist stripping removes the conductive layers (nickel and gold) in the line spacing to form mutually insulated lines and pads.
Wherein the cleaning of the step (1) comprises alkaline degreasing, acid cleaning and ultrasonic pure water cleaning, and then drying; the copper sheet used was 132×184×0.4mm, and the tile used was 138×190×0.635mm.
The copper sheet and ceramic sheet sintering in the step (2) comprises copper sheet pre-oxidation, wherein the pre-oxidation oxygen concentration is 200PPM; and stacking the pre-oxidized copper sheet and the ceramic sheet together for sintering.
Step (3) one-time pattern making, firstly, pre-treating the sintered ceramic substrate, then, attaching a layer of photosensitive dry film with the dry film thickness of 38 mu m on the surface, and carrying out pattern exposure through a film mask, wherein the exposure energy is 80mj/cm 2 The method comprises the steps of carrying out a first treatment on the surface of the Developing again to obtain 1% Na solution 2 CO 3 And (3) developing at 30 ℃, and finally etching to remove the film to obtain the required circuit pattern.
And (3) the frequency of the photoresist sprayed in the step (4) is 80KHz, the photoresist used is AZ4620, and the thickness of the photoresist sprayed is 18 mu m, so that the photoresist uniformly covers the ceramic surfaces of the top, the side wall and the space of the circuit.
The secondary pattern in the step (5) is manufactured by exposure and development, and the exposure energy reaches 900mj/cm 2 The developer used is TMAH (tetramethyl ammonium hydroxide); the top and sidewalls of the metal layer are exposed after development.
And (6) sputtering a layer of copper on the whole substrate surface (including the photoresist surface) uniformly to form a conductive layer, wherein the power of the vacuum sputtering copper is 5-10 KW, the thickness is 0.5-2 mu m, and the conductive layer is used for conducting each circuit and each independent bonding pad.
And (7) electroplating nickel-gold, wherein the thickness of the nickel plating is 3-7 mu m, and the thickness of the gold plating is 2 mu m.
The photoresist stripping liquid in the step (8) is 50% -100% of NMP (methyl pyrrolidone), the temperature is 80 ℃, and the spraying pressure is 0.5Mpa; thus, a finished product can be obtained.
The invention relates to a ceramic substrate surface treatment method, which mainly adopts a primary pattern making process, a glue spraying process, a secondary pattern making process, a vacuum sputtering process and a surface electroplating process, and finally carries out a glue stripping process, so that the lines are conducted mutually through the processes of glue spraying, secondary pattern exposure and development and vacuum sputtering, a layer of photoresist is arranged between a conducting layer of a line interval and a ceramic chip, then a required metal layer is electroplated on the surface of a substrate in an electroplating manner, finally the photoresist in the line interval is removed in a photoresist stripping manner, and meanwhile, the conducting layer of the photoresist can be removed, thereby realizing insulation requirements among the lines, meeting the requirements of surface electroplating gold and silver, and avoiding the need of designing a conducting lead for conducting connection of an electric appliance and carrying out electroplating, so that the problem of etching the conducting lead is not needed.
The above description is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above examples, and all technical solutions belonging to the concept of the present invention belong to the protection scope of the present invention. It should be noted that modifications and adaptations to the present invention may occur to one skilled in the art without departing from the principles of the present invention and are intended to be within the scope of the present invention.
Claims (10)
1. A method for treating a surface of a ceramic substrate, comprising the steps of:
(1) And (3) primary graph manufacturing: carrying out film pasting, exposure, development and etching on the ceramic substrate by adopting a negative film process to obtain a metal circuit pattern;
(2) Spraying glue: uniformly spraying a layer of photoresist on the surfaces of the ceramic substrate and the circuit;
(3) And (3) secondary graph manufacturing: photoetching and developing are carried out to expose the metal circuit and the bonding pad;
(4) Plating conductive metal: plating conductive metal by adopting a vacuum sputtering process to lead each metal circuit and the independent bonding pad to be mutually conducted;
(5) Surface electroplating: electroplating one or more of nickel, gold and silver on the surface of the whole ceramic substrate;
(6) Stripping photoresist: photoresist in the line spacing and metal materials on the surface of the photoresist are removed by using photoresist stripping liquid, so that mutually insulated lines and bonding pads are formed.
2. The method of claim 1, wherein the ceramic substrate is a metallized ceramic substrate of DBC, DBA, AMB or DPC.
3. The method according to claim 1 or 2, wherein the ceramic substrate is of the ceramic type alumina, zirconia, aluminum nitride, silicon nitride or silicon carbide.
4. The method of claim 1, wherein the metal lines and pads are copper or aluminum.
5. A method of treating a surface of a ceramic substrate according to claim 1, wherein the vacuum sputtered conductive metal is copper or nickel or gold or silver.
6. The method for treating a surface of a ceramic substrate according to claim 1, wherein the spraying in the step (2) adopts an ultrasonic dispersion mode, and the ultrasonic frequency is greater than 50KHz.
7. The method according to claim 1 or 6, wherein the photoresist is a UV photoresist having a thickness of more than 10 μm.
8. The method of claim 1, wherein the exposure light source used for the photolithography development in the step (3) is UV light, and the direct photolithography is performed by a laser direct writing method, and the metal lines and the pads are exposed after the development.
9. The method according to claim 1, wherein in the step (4), the power of the vacuum sputtering conductive metal is 5-10 kw, the thickness is 0.5-2 μm, and a conductive metal layer is uniformly sputtered on the entire surface of the ceramic substrate as a conductive layer to conduct each circuit and each individual pad.
10. The method for treating the surface of a ceramic substrate according to claim 1, wherein in the step (6), the photoresist stripping solution is 50-100% of NMP (methyl pyrrolidone) and the spraying pressure is 0.2-1 MPa at 80 ℃.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310449941.2A CN116190249B (en) | 2023-04-25 | 2023-04-25 | Surface treatment method of ceramic substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310449941.2A CN116190249B (en) | 2023-04-25 | 2023-04-25 | Surface treatment method of ceramic substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN116190249A CN116190249A (en) | 2023-05-30 |
| CN116190249B true CN116190249B (en) | 2023-08-01 |
Family
ID=86452520
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310449941.2A Active CN116190249B (en) | 2023-04-25 | 2023-04-25 | Surface treatment method of ceramic substrate |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116190249B (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102045951B (en) * | 2010-11-29 | 2012-10-17 | 上海申和热磁电子有限公司 | Metal surface plated nickel/gold treatment method of ceramic metalized substrate and manufactured ceramic metalized substrate |
| CN114698256B (en) * | 2020-12-30 | 2024-08-09 | 深南电路股份有限公司 | Manufacturing method of circuit board, circuit board and electronic device |
| CN115515327A (en) * | 2022-10-24 | 2022-12-23 | 深圳创智芯联科技股份有限公司 | Electroless nickel-gold process applied to ceramic substrate |
-
2023
- 2023-04-25 CN CN202310449941.2A patent/CN116190249B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN116190249A (en) | 2023-05-30 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0089559B1 (en) | Method for forming metal coatings for metallurgy patterns on dielectric substrates | |
| KR0155877B1 (en) | Multi layer circuit board and manufacturing method of the same | |
| US6391473B2 (en) | Cu plated ceramic substrate and a method of manufacturing the same | |
| CN103346094A (en) | Etching method of microwave membrane circuit | |
| CN109195340A (en) | A method of making metallized ceramic substrate super-narrow line width, line-spacing figure | |
| KR20100129968A (en) | Method for forming electrode pattern of ceramic substrate | |
| JP2010238753A (en) | Heat radiating member, and module using the same | |
| CN116190249B (en) | Surface treatment method of ceramic substrate | |
| CN102762037A (en) | Ceramic circuit board and manufacturing method thereof | |
| KR20080097065A (en) | The manufacturing method of the thin film ceramic multi layer substrate | |
| KR20100130401A (en) | Multilayer ceramic substrate and manufacturing method thereof | |
| JP2016507902A (en) | Multi-level metal coating on the ceramic substrate | |
| CN114380614A (en) | High-etching-precision ceramic metal-clad plate, preparation method and chip packaging module | |
| JPH0575255A (en) | Hybrid substrate and circuit module on which the substrate is mounted, and manufacture thereof | |
| JPH03195083A (en) | Hybrid integrated circuit and its manufacture | |
| EP0219122B1 (en) | Metallized ceramic substrate and method of manufacturing the same | |
| KR102621334B1 (en) | Manufacturing method of ceramic heat dissipation substrate simplified masking process | |
| JP2003121466A (en) | Probe unit and its manufacturing method | |
| JPH02202073A (en) | Electronic component | |
| JP7426833B2 (en) | Manufacturing method of sheet body | |
| KR100296001B1 (en) | Multi-layer hybrid integrated circuit manufacturing method | |
| TW202434012A (en) | Circuit board and manufacturing method thereof | |
| JPS62264689A (en) | Manufacture of metal-ceramics junction unit with circuit | |
| JP2004175085A (en) | High density circuit board and its manufacturing method | |
| JP2005101415A (en) | Ceramic circuit board and method for manufacturing the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |