CN116169102A - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

Info

Publication number
CN116169102A
CN116169102A CN202211444970.1A CN202211444970A CN116169102A CN 116169102 A CN116169102 A CN 116169102A CN 202211444970 A CN202211444970 A CN 202211444970A CN 116169102 A CN116169102 A CN 116169102A
Authority
CN
China
Prior art keywords
semiconductor device
resin
lead
semiconductor
molding resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202211444970.1A
Other languages
English (en)
Inventor
坂本健
市川庆太郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of CN116169102A publication Critical patent/CN116169102A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4842—Mechanical treatment, e.g. punching, cutting, deforming, cold welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29339—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45139—Silver (Ag) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48101—Connecting bonding areas at the same height, e.g. horizontal bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48105—Connecting bonding areas at different heights
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/495—Material
    • H01L2224/49505—Connectors having different materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293—Organic, e.g. plastic
    • H01L23/295—Organic, e.g. plastic containing a filler
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334—Auxiliary members in encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H01L23/49513—Lead-frames or other flat leads characterised by the die pad having bonding material between chip and die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H01L23/49551—Cross section geometry characterised by bent parts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49548—Cross section geometry
    • H01L23/49551—Cross section geometry characterised by bent parts
    • H01L23/49555—Cross section geometry characterised by bent parts the bent parts being the outer leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49582—Metallic layers on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H01L23/49586—Insulating layers on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10254—Diamond [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1027—IV
    • H01L2924/10272—Silicon Carbide [SiC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1032—III-V
    • H01L2924/1033—Gallium nitride [GaN]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12032—Schottky diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

得到能够防止裂纹缺陷的半导体装置及其制造方法。模塑成型部(17)的第3侧面(17c)具有沿使得上下方向的中央部凸出的方向而倾斜的倾斜面(18、19)。模塑树脂(14)还具有在第3侧面(17c)的中央部设置的残留部(20)和在倾斜面(18)与残留部(20)之间设置的榫部(21)。榫部(21)相比于倾斜面(18)而沿横向凸出。残留部(20)相比于榫部(21)而沿横向凸出，具有在上下方向上垂直的断裂面。

Description

半导体装置及其制造方法
技术领域
本发明涉及半导体装置及其制造方法。
背景技术
为了应对高电压及大电流的电力控制而将通电路径设为元件的纵向这一类型的半导体元件通常被称为功率半导体元件。功率半导体元件例如存在IGBT(Insulated GateBipolar Transistor)、MOSFET(Metal Oxide Semiconductor Field EffectTransistor)、双极晶体管、二极管等。
将功率半导体元件安装于电路基板之上并通过封装树脂进行了封装的半导体装置在工业设备、汽车、铁路等广泛的领域中得到应用。近年来，伴随搭载有半导体装置的设备的高性能化，诸如额定电压和额定电流的增加、小型化这样的针对半导体装置的高性能化的要求正在提高。
作为半导体装置的封装件构造，存在模塑封装型。在模塑封装型中，在引线框之上安装半导体元件，半导体元件与引线框端子通过导线键合而接合，被环氧树脂封装。作为半导体装置的制造方法，通常是通过上模具和下模具将引线框夹住后将环氧树脂注入至型腔的传递模塑。在成型之后，通过冲头将从封装件侧面伸出的引线切断(例如，参照专利文献1)，将切断后的引线弯折，由此形成电极。
作为生产率高的成型方法，通常已知将模塑树脂依次注入至通过流道而彼此连接的多个型腔的多列模塑树脂注入工艺。由于流道的部分的树脂是无用的，因此通过树脂切割而被冲裁、去除。在树脂切割之后，具有在上下方向上垂直的断裂面的残留部残留于模塑树脂的侧面。
专利文献1：日本实开平5-5220号公报
在两端分别连结有半导体装置的两端支撑的流道处，在树脂切割时在流道的部分的树脂的两端施加剪切应力。因此，在一端处仅能施加树脂切割冲压能力的一半的载荷。因此，存在以下问题，即，从树脂切割后的残留部的根部起在模塑成型部产生裂纹。
发明内容
本发明就是为了解决上述这样的课题而提出的，其目的在于得到能够防止裂纹缺陷的半导体装置及其制造方法。
本发明涉及的半导体装置的特征在于，具有：半导体芯片；引线端子，其与所述半导体芯片连接；以及绝缘性的模塑树脂，其将所述半导体芯片和所述引线端子的一部分封装，所述模塑树脂具有模塑成型部，该模塑成型部包含彼此相对的第1及第2侧面、与所述第1及第2侧面不同的第3侧面，所述引线端子从所述第1及第2侧面凸出，所述第3侧面具有沿使得所述第3侧面的上下方向的中央部凸出的方向而倾斜的倾斜面，所述模塑树脂还具有在所述第3侧面的所述中央部设置的残留部和在所述倾斜面与所述残留部之间设置的榫部，所述榫部相比于所述倾斜面而沿横向凸出，所述残留部相比于所述榫部而沿横向凸出，具有在上下方向上垂直的断裂面。
发明的效果
在本发明中，在模塑树脂的第3侧面处，在倾斜面与残留部之间设置有榫部。由此，即使在树脂切割时冲头与榫部接触，也仅是榫部被作为哑构件(dummy)破坏，在模塑树脂的成型部不产生裂纹。另外，通过以榫部为标记而进行树脂切割，从而冲头的位置精度提高。
其结果，能够防止裂纹缺陷。
附图说明
图1是表示实施方式1涉及的半导体装置的剖视图。
图2是表示实施方式1涉及的半导体装置的侧视图。
图3是表示实施方式1涉及的半导体装置的侧视图。
图4是实施方式1涉及的半导体装置的制造方法的流程图。
图5是表示实施方式1涉及的半导体装置的制造方法的剖视图。
图6是表示实施方式1涉及的半导体装置的制造方法的俯视图。
图7是表示实施方式1涉及的半导体装置的制造方法的剖视图。
图8是表示实施方式1涉及的半导体装置的制造方法的剖视图。
图9是表示对比例涉及的半导体装置的制造方法的侧视图。
图10是表示实施方式2涉及的半导体装置的侧视图。
图11是表示实施方式2涉及的半导体装置的树脂切割的情形的侧视图。
图12是表示实施方式3涉及的半导体装置的制造方法的侧视图。
图13是表示实施方式3涉及的半导体装置的制造方法的侧视图。
图14是表示实施方式3涉及的半导体装置的制造方法的侧视图。
图15是表示实施方式3涉及的半导体装置的制造方法的侧视图。
图16是表示实施方式3涉及的半导体装置的制造方法的侧视图。
图17是表示实施方式4涉及的半导体装置的制造方法的侧视图。
图18是表示实施方式4涉及的半导体装置的制造方法的侧视图。
图19是表示实施方式4涉及的半导体装置的制造方法的侧视图。
具体实施方式
参照附图，对实施方式涉及的半导体装置及其制造方法进行说明。对相同或相应的结构要素标注相同的标号，有时省略重复说明。
实施方式1
图1是表示实施方式1涉及的半导体装置的剖视图。管芯焊盘1、2、功率端子3及IC端子4由铜或铜合金的引线框形成，彼此分离。管芯焊盘2的高度是与装置外周部的框架相同的高度。通过框体弯折加工，从而管芯焊盘1设置于比管芯焊盘2更靠下方处。引线框的厚度是与在实际使用时流过端子的电流值匹配地设定的，但为了稳定地通过冲压加工进行制造，设定为0.1mm至1mm。
在管芯焊盘1通过焊料7而接合有半导体芯片5、6的下表面电极。半导体芯片5是IGBT，但也可以是MOSFET。半导体芯片6是二极管，但也可以是肖特基势垒二极管。
半导体芯片5、6的上表面电极通过功率导线8而彼此连接。半导体芯片6的上表面电极通过功率导线9而与功率端子3连接。功率导线8、9是使用超声波接合装置而与功率端子3、半导体芯片5、6的上表面电极接合的。作为流过大电流的功率导线8、9的材质，选择导电率不如Ag这么高但廉价的Al。功率导线8、9的直径为0.1至0.5mm。
在管芯焊盘2通过Ag膏11而接合有IC(Integrated Circuit)元件10，通过烤炉而使Ag膏11固化。半导体芯片5的上表面的栅极电极通过IC导线12与IC元件10连接。IC元件10通过IC导线13与IC端子4连接。IC元件10根据从IC端子4输入的信号对半导体芯片5进行控制。作为IC导线12、13的材质，选定金、银、铜等导电率高的材质。IC导线12、13被加工为细至直径小于或等于0.05mm，通过火花而形成球体，被键合至IC元件10的小的焊盘处。
半导体芯片5、6、管芯焊盘1、2、功率端子3及IC端子4的一部分等由绝缘性的模塑树脂14进行封装。模塑树脂14是将二氧化硅(SiO2)作为填料而填充至热固性环氧树脂，使线膨胀系数接近铜的树脂。
在管芯焊盘1的下表面，作为绝缘散热材料而设置有绝缘膜15和金属箔16。金属箔16从模塑树脂14的下表面露出。不限于此，绝缘散热材料也可以是模塑树脂14。或者，也可以是填充有作为高散热填料的氮化铝(AlN)、氮化硼(BN)、二氧化硅(SiO2)的环氧树脂的0.1mm～0.3mm厚的板材。或者，还可以是将氮化铝、氮化硅(Si3N4)、二氧化硅等高散热绝缘材料组合起来的DBC(Direct bonded Copper)基板、AMB(Active Metal Brazing)基板或DBA(Direct Bonded Aluminum)。由此，能够在维持了绝缘性的状态下进一步提高散热性。
图2及图3是表示实施方式1涉及的半导体装置的侧视图。模塑树脂14具有内置有半导体芯片5、6等的模塑成型部17。模塑成型部17包含彼此相对的第1侧面17a及第2侧面17b、与第1及第2侧面不同的第3侧面17c。图2是从垂直方向观察第3侧面17c时的侧视图。为了将半导体装置与外部电连接，功率端子3和IC端子4分别从第1侧面17a及第2侧面17b凸出。
图3是从垂直方向观察第1侧面17a时的侧视图。此外，为了简化说明，在图3中省略了引线端子的图示。第3侧面17c在上下具有沿使得第3侧面17c的上下方向的中央部凸起的方向而倾斜的倾斜面18、19。模塑树脂14还具有在第3侧面17c的中央部设置的残留部20和在倾斜面18与残留部20之间设置的榫(dowel)部21。残留部20是后述的树脂切割后的切割残留。榫部21相比于倾斜面18而沿横向凸出，沿朝向残留部20而凸出的方向倾斜。残留部20相比于榫部21而进一步沿横向凸出，具有在上下方向上垂直的断裂面。该残留部20的断裂面是一条边为几μm至几百μm的四边形。
接着，对本实施方式涉及的半导体装置的制造方法进行说明。图4是实施方式1涉及的半导体装置的制造方法的流程图。图5、图7及图8是表示实施方式1涉及的半导体装置的制造方法的剖视图。图6是表示实施方式1涉及的半导体装置的制造方法的俯视图。此外，为了简化说明，在图8及图9中省略了半导体装置的内部构造的图示。
首先，作为前置工序，将半导体芯片5、6安装于管芯焊盘1、2、功率端子3及IC端子4连在一起的状态的引线框，进行导线键合(步骤S1)。接下来，预先在加热板上对引线框进行加热而使其膨胀，搭载于釜(pot)列的左右的下模具22的框体定位孔。接下来，将热固化树脂即平板状的模塑树脂14置入下模具22的釜部。使上模具23与下模具22夹紧。由此，如图5所示，在形成于上模具23与下模具22之间的多个型腔24各自配置半导体芯片5、6、功率端子3及IC端子4等。相邻的型腔24的浇口通过流道25而彼此连接。在流道25之下设置有树脂储存部26。流道25是在上模具23与下模具22之间形成的间隙，是树脂的通道。树脂储存部26是为了使模塑树脂强度提高，防止在脱模时粘附于模具而设置的。
使釜内部的冲头上升而使模塑树脂14熔融至最低熔融粘度。通过冲头而施加5～15MPa的高静水压力，将模塑树脂14从模塑模具的残料(cull)部注入至型腔24。经由流道25向多个型腔24依次供给模塑树脂14，对半导体芯片5及引线框等进行封装(步骤S2)。由此，能够在一个模塑模具中一次性对大于或等于2个引线框进行传递模塑。将这样连续地对多个半导体装置进行模塑成型的情况称为多列成型。该封装方法是不易在模塑成型部17形成孔洞、品质高且生产率高的封装方法。
接下来，在该状态下进行加热而使模塑树脂14固化。使原本夹紧的上模具23和下模具22开模，同时地，使上模具23与下模具22的起模杆和冲头凸出而使模塑成型部17从上模具23和下模具22脱模。从下模具22将包含半导体装置和残料的引线框取出。从包含半导体装置的引线框28对残料进行浇口断开(切断)而分离。
在该阶段中，如图6所示，多个半导体装置的模塑成型部17经由流道25及树脂储存部26的部分的模塑树脂27而相连。相邻的半导体装置的引线框28通过框架29而连接。此外，引线框28是通过框架29而将管芯焊盘1、2、功率端子3、IC端子4及引线30连接起来的结构。
接下来，为了使在模塑模具内未能完全固化的模塑成型部17完全地固化，在烤炉内进行烘烤而进行后固化(步骤S3)。将烤炉的加热器电源切断，使包含半导体装置的引线框28冷却至大气温度，提高模塑成型部17的弹性模量。
接下来，为了将模塑成型部17的多余部分去除，如图7及图8所示，通过冲头31从上表面侧对流道25及树脂储存部26的部分的模塑树脂27进行冲裁。通过该树脂切割，从而残留部20残留于模塑成型部17的第3侧面17c处。为了将用于防止模塑成型部17的毛刺而形成于引线框28的连杆去除，通过连杆切割模具对连杆进行冲裁(步骤S4)。
接下来，在引线框28的表面实施锡或锡铜的镀敷处理，或者电镀作为防氧化剂膜的苯并三氮唑(1,2,3-benzotriazole、BTA)等(步骤S5)。由此，能够防止引线框28的表面的劣化，以使得能够在高温高湿环境下进行长期保管。
为了将多余框架从包含半导体装置的引线框28去除，通过引线切割模具对框架29进行冲裁。通过引线成形模具使被引出至外部的功率端子3及IC端子4在封装件上表面方向上弯折(步骤S6)。进行半导体装置的电气特性和外观的测试(步骤S7)。对已完成的半导体装置进行包装而出厂(步骤S8)。
接着，与对比例进行对比而说明本实施方式的效果。图9是表示对比例涉及的半导体装置的制造方法的侧视图。在对比例中未设置榫部21。
这里，在模塑成型部17与连杆之间，没有完全被上模具23与下模具22夹住，产生飞边。另外，没有被上模具23与下模具22夹住，还产生引线框28的厚度的量的厚毛刺。在通常的树脂切割中，将这些树脂毛刺切下而去除。流道25及树脂储存部26的部分的模塑树脂27的宽度比这些树脂毛刺宽，厚度也比这些树脂毛刺厚。因此，对树脂切割装置的冲头31要求高的载荷能力。
但是，冲头31的载荷能力没有裕量，有时由于模塑模具设计的原因而使得装置载荷能力不足。另外，有时冲头31与要进行树脂切割的模塑树脂27的两端同时地接触，来自冲头31的载荷未充分施加。在这些情况下，有可能从树脂切割后的切割残留即残留部20的根部起朝向模塑成型部17而产生裂纹32，半导体装置破损。另外，也有可能产生无法完全地将残留部20与模塑成型部17之间切断的问题。此外，如果为了防止由冲裁处理造成的裂纹32而使流道25变长，则在模塑成型部17的侧面残留的残留部20变长，因而超出产品尺寸规格。因此，需要在靠近模塑成型部17的位置处进行冲裁处理而使残留部20变短。
与此相对，在本实施方式中，在模塑树脂14的第3侧面17c处，在倾斜面18与残留部20之间设置有榫部21。由此，即使在树脂切割时冲头31与榫部21接触，也仅是榫部21被作为哑构件破坏，在模塑树脂14的模塑成型部17不产生裂纹32。另外，通过以榫部21为标记而进行树脂切割，从而冲头31的位置精度提高。其结果，能够防止裂纹缺陷。
另外，榫部21沿朝向残留部20而凸出的方向倾斜。因此，即使冲头31与榫部21接触，也会沿榫部21的斜面滑动而落下，由此能够进行冲头31的定位。
实施方式2
图10是表示实施方式2涉及的半导体装置的侧视图。在实施方式1中榫部21是倾斜的，但在本实施方式中，榫部21具有在上下方向上垂直的平面。图11是表示实施方式2涉及的半导体装置的树脂切割的情形的侧视图。在树脂封装之后，通过冲头31对流道25的部分的模塑树脂14进行冲裁。即使在该树脂切割时冲头31与榫部21接触，也仅是榫部21被作为哑构件破坏，在模塑树脂14的模塑成型部17不产生裂纹。另外，通过以榫部21为标记而进行树脂切割，从而冲头31的位置精度提高。其结果，能够防止裂纹缺陷。
实施方式3
图12至图16是表示实施方式3涉及的半导体装置的制造方法的侧视图。在树脂封装的阶段中，管芯焊盘1、2、功率端子3、IC端子4及引线30是经由框架29而连接起来的1个引线框，彼此未分离。功率端子3、IC端子4及引线30被冲头31冲裁而从框架29切断。
此时，如图12所示，从模塑树脂14的下表面侧通过冲头31对引线30进行冲裁。由此，如图13所示，引线30具有断裂面，该断裂面在上侧具有回卷面(return surface)。另外，切断后的引线30不用于与外部之间的电连接，因此，与功率端子3及IC端子4相比从模塑树脂14算起的凸出量小。引线30设置于设置有功率端子3及IC端子4的第1侧面17a、第2侧面17b、设置有残留部20及榫部21的第3侧面、与第3侧面相对的第4侧面的至少一者。
另外，关于树脂切割，也如图14及图15所示，从模塑树脂14的下表面侧通过冲头31对流道25的部分的模塑树脂14进行冲裁。在这种情况下，将榫部21设置于残留部20的下侧。由此，能够防止裂纹缺陷。此外，也可以如图16所示，使用具有在上下方向上垂直的平面的榫部21。
如图1所示，作为绝缘散热材料的绝缘膜15和金属箔16设置于安装有半导体芯片5、6的管芯焊盘1、2的下表面，从模塑树脂14的下表面露出。半导体装置安装于散热器之上，由半导体芯片5、6产生的热经由绝缘散热材料而散热至散热器。在本实施方式中，框架29的断裂面在上侧具有回卷面，因此，能够确保框架29的前端与散热器之间的距离。其结果，能够实现高绝缘化。
实施方式4
图17至图19是表示实施方式4涉及的半导体装置的制造方法的侧视图。如图17所示，对管芯焊盘1、2、功率端子3及IC端子4进行支撑的框架29配置于相邻的2个型腔24之间。在模塑树脂14中高度地填充有填料，因此，如果在流道25或树脂储存部26配置有框架29，则填料卡挂于窄的缝隙处，有可能产生模塑树脂14的填充缓慢或由填充的不足引起的产品不合格。因此，在本实施方式中，将框架29置入在下模具22设置的凹部33而配置于流道25及树脂储存部26之外。由此，在树脂流动时不存在障碍，因此能够使树脂的流动性稳定。
在树脂封装之后，如图18所示，从模塑树脂14的下表面侧通过冲头31对流道25的部分的模塑树脂14及框架29进行冲裁。通过将榫部21设置于残留部20的下侧，能够防止裂纹缺陷。此外，也可以如图19所示，使用具有在上下方向上垂直的平面的榫部21。
此外，半导体芯片5、6不限于由硅形成，也可以由与硅相比带隙大的宽带隙半导体形成。宽带隙半导体例如是碳化硅、氮化镓类材料或金刚石。由这样的宽带隙半导体形成的半导体芯片由于耐压性及容许电流密度高，因此能够小型化。通过使用该小型化的半导体芯片，从而组装有该半导体芯片的半导体装置也能够小型化、高集成化。另外，由于半导体芯片的耐热性高，因此能够使散热器的散热鳍片小型化，能够使水冷部空冷化，因而能够使半导体装置进一步小型化。另外，由于半导体芯片的电力损耗低且高效，因此能够使半导体装置高效化。
标号的说明
1管芯焊盘，3功率端子(引线端子)，4IC端子(引线端子)，5、6半导体芯片，14模塑树脂，15绝缘膜(绝缘散热材料)，16金属箔(绝缘散热材料)，17模塑成型部，17a第1侧面，17b第2侧面，17c第3侧面，18、19倾斜面，20残留部，21榫部，22下模具，23上模具，24型腔，25流道，29框架，30引线，31冲头。

Claims (8)

1.一种半导体装置，其特征在于，具有：
半导体芯片；
引线端子，其与所述半导体芯片连接；以及
绝缘性的模塑树脂，其将所述半导体芯片和所述引线端子的一部分封装，
所述模塑树脂具有模塑成型部，该模塑成型部包含彼此相对的第1及第2侧面、与所述第1及第2侧面不同的第3侧面，
所述引线端子从所述第1及第2侧面凸出，
所述第3侧面具有沿使得所述第3侧面的上下方向的中央部凸出的方向而倾斜的倾斜面，
所述模塑树脂还具有在所述第3侧面的所述中央部设置的残留部和在所述倾斜面与所述残留部之间设置的榫部，
所述榫部相比于所述倾斜面而沿横向凸出，
所述残留部相比于所述榫部而沿横向凸出，具有在上下方向上垂直的断裂面。
2.根据权利要求1所述的半导体装置，其特征在于，
所述榫部沿朝向所述残留部而凸出的方向倾斜。
3.根据权利要求1所述的半导体装置，其特征在于，
所述榫部具有在上下方向上垂直的平面。
4.根据权利要求1至3中任一项所述的半导体装置，其特征在于，
还具有引线，该引线从所述模塑成型部的至少1个侧面凸出，与所述引线端子相比从所述模塑成型部算起的凸出量小，
所述引线具有在上侧具有回卷面的断裂面。
5.根据权利要求4所述的半导体装置，其特征在于，还具有：
管芯焊盘，在该管芯焊盘的上表面安装有所述半导体芯片；以及
绝缘散热材料，其设置于所述管芯焊盘的下表面。
6.根据权利要求1至5中任一项所述的半导体装置，其特征在于，
所述半导体芯片由宽带隙半导体形成。
7.一种半导体装置的制造方法，其是制造所述权利要求1至6中任一项所述的半导体装置的方法，
该半导体装置的制造方法的特征在于，具有以下工序：
在通过流道而彼此连接的模具的多个型腔各自处配置所述半导体芯片和所述引线端子；
经由所述流道向所述多个型腔依次供给所述模塑树脂，将所述半导体芯片及所述引线端子封装；以及
通过冲头对所述流道的部分的所述模塑树脂进行冲裁，使所述残留部残留。
8.根据权利要求7所述的半导体装置的制造方法，其特征在于，
将配置于相邻的所述型腔之间且对所述引线端子进行支撑的框架配置于所述流道之外。
CN202211444970.1A 2021-11-25 2022-11-18 半导体装置及其制造方法 Pending CN116169102A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2021191511A JP2023077978A (ja) 2021-11-25 2021-11-25 半導体装置及びその製造方法
JP2021-191511 2021-11-25

Publications (1)

Publication Number Publication Date
CN116169102A true CN116169102A (zh) 2023-05-26

Family

ID=86227509

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202211444970.1A Pending CN116169102A (zh) 2021-11-25 2022-11-18 半导体装置及其制造方法

Country Status (4)

Country Link
US (1) US20230163037A1 (zh)
JP (1) JP2023077978A (zh)
CN (1) CN116169102A (zh)
DE (1) DE102022119856A1 (zh)

Also Published As

Publication number Publication date
US20230163037A1 (en) 2023-05-25
DE102022119856A1 (de) 2023-05-25
JP2023077978A (ja) 2023-06-06

Similar Documents

Publication Publication Date Title
US7781262B2 (en) Method for producing semiconductor device and semiconductor device
US20070132112A1 (en) Semiconductor device and mold for resin-molding semiconductor device
CN108604578B (zh) 电力用半导体装置及其制造方法
JP2982126B2 (ja) 半導体装置およびその製造方法
CN111492473A (zh) 半导体封装体及其制造方法
US20230123782A1 (en) Method of manufacture for a cascode semiconductor device
US9553068B2 (en) Integrated circuit (“IC”) assembly includes an IC die with a top metallization layer and a conductive epoxy layer applied to the top metallization layer
JP4463146B2 (ja) 半導体装置の製造方法
US20040203194A1 (en) Method of resin-sealing a semiconductor device, resin-sealed semiconductor device, and forming die for resin-sealing the semiconductor device
CN111433910B (zh) 半导体装置以及半导体装置的制造方法
KR101490751B1 (ko) 반도체장치 및 그 제조방법
CN116169102A (zh) 半导体装置及其制造方法
US11362023B2 (en) Package lead design with grooves for improved dambar separation
US11302569B2 (en) Method for manufacturing semiconductor device and semiconductor device
US11145578B2 (en) Semiconductor package with top or bottom side cooling and method for manufacturing the semiconductor package
US20210175141A1 (en) Semiconductor device and method for manufacturing semiconductor device
US11837516B2 (en) Semiconductor device
WO2022259395A1 (ja) 半導体製造装置および半導体装置の製造方法
US20220199478A1 (en) Semiconductor Packages and Methods for Manufacturing Thereof
US20230245942A1 (en) Semiconductor device package with integral heat slug
CN218996706U (zh) 一种铜带键合的环氧塑封车用功率模块封装结构
US20230050112A1 (en) Semiconductor device manufacturing method
JP2525245B2 (ja) 半導体装置
CN115335987A (zh) 半导体装置及半导体装置的制造方法
JP2022062802A (ja) 半導体部品

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination