CN116107383A - Maximum power point tracking circuit applied to piezoelectric energy collection interface - Google Patents
Maximum power point tracking circuit applied to piezoelectric energy collection interface Download PDFInfo
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Abstract
The invention discloses a maximum power point tracking circuit applied to a piezoelectric energy acquisition interface, and relates to the microelectronic technology. The piezoelectric energy collection interface module is electrically connected with the piezoelectric sheet model; collecting energy output time of the piezoelectric energy collection interface module, and converting the energy output time into a voltage signal through the time-voltage conversion module; sampling a first voltage signal in a current period and a second voltage signal in a previous period relative to the current period by the two-stage sample-and-hold module; inputting the two voltage signals into a comparator for comparison to obtain an adjustment signal; the adjustment signals are operated and processed through a climbing algorithm, and a control signal array is output to the DAC conversion module; the DAC conversion module converts the control signal array into a pre-bias voltage. The invention ensures that the pre-bias voltage is always at an optimal value, and can realize the maximization of the output power of the pre-bias structure piezoelectric energy acquisition circuit.
Description
Technical Field
The invention relates to the microelectronic technology, in particular to a maximum power point tracking circuit applied to a piezoelectric energy collection interface.
Background
The structure of the classical piezoelectric energy collection interface circuit is as follows: full bridge rectifier structure (FBR), synchronous switching inductance (SSHI), synchronous charge extraction (SECE), synchronous switching capacitance (SSHC), and the like. For these circuit configurations, maximum power point tracking is typically achieved using the open circuit voltage scaling factor method (FOCV) and disturbance observer method (P & O). Some recent studies have shown that the use of a pre-bias technique can increase the output power of the piezoelectric energy harvesting circuit by increasing the damping force (damping force). However, the optimization problem of the pre-bias voltage is not mentioned in the related studies, but the maximum voltage that can be borne by the CMOS technology is simply considered to be the limit of the optimal voltage, so as to ensure that the difference between the voltages at two ends of the piezoelectric sheet is the maximum when the energy output is performed. Theoretical analysis proves that under the condition of considering the power loss generated in the energy collection process, the conduction loss, the capacitor precharge loss, the inductance parasitic resistance loss and the like are inversely related to the pre-bias voltage, the pre-bias voltage has an optimal value, and the optimal value is possibly smaller than the maximum voltage which can be achieved by the process.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides the maximum power point tracking circuit applied to the piezoelectric energy acquisition interface, which optimizes the pre-bias voltage in the piezoelectric interface circuit with the pre-bias voltage structure so as to ensure that the piezoelectric interface circuit can always output the maximum power under different vibration conditions.
The invention relates to a maximum power point tracking circuit applied to a piezoelectric energy collection interface, which comprises a piezoelectric energy collection interface module, a time-voltage conversion module and a two-stage sampling protection moduleHolding module and comparator U 0 And a DAC conversion module; the piezoelectric energy acquisition interface module is electrically connected with the piezoelectric patch model PZT;
collecting the energy output time T of the piezoelectric energy collection interface module har The energy is output for time T through the time-voltage conversion module har Converted into a voltage signal V har ；
Sampling a first voltage signal in a current period and a second voltage signal in a previous period relative to the current period by the two-stage sample-and-hold module; two voltage signals are input to the comparator U 0 To obtain the adjusting signal V PM ；
Adjusting signal V by climbing algorithm PM Performing operation processing and outputting a control signal array to the DAC conversion module; the DAC conversion module converts the control signal array into a pre-bias voltage V init 。
The piezoelectric energy collection interface module comprises a switch S A Switch II S B Three S of switch C Four S of switch D Five S of switch X Six S of switch Y Seven S of switch N Eight S of switch P And an inductance L; one end of the inductor L is connected with a switch S in parallel A Three S of switch C And switch five S X The other end of the inductor L is connected with a switch II S in parallel B Four S of switch D And switch six S Y The method comprises the steps of carrying out a first treatment on the surface of the The switch is S A And switch two S B One end far away from the inductor L is connected with an energy storage device Bat, and the three switches S C And switch four S D One end far away from the inductor L is grounded; the switch is five S X Through switch seven S N Grounding, the switch is six S Y By switching eight S P Grounding, the switch is five S X And switch seven S N Is connected with one end of the piezoelectric sheet model PZT, the switch is six S Y And switch eight S P Is connected with the other end of the piezoelectric patch model PZT.
The switch is S A And switch four S D The switch states of the two switches are consistent B And switch three S C The switch states of (a) are consistent.
The time-voltage conversion module comprises a field effect transistor M 1 Second M of field effect transistor 2 Fixed current source I bias S of control switch har And capacitor II C har The method comprises the steps of carrying out a first treatment on the surface of the The field effect transistor is M 1 And field effect transistor two M 2 Is connected with the source electrode of the power supply and is used as a power supply input end; the field effect transistor is M 1 Grid electrode of (C) and drain electrode thereof and Field Effect Transistor (FET) II M 2 The grid electrodes of the field effect transistor are connected with each other and M is 1 Grid electrode of (C) and drain electrode thereof and Field Effect Transistor (FET) II M 2 The connection end of the grid electrode of (C) and a fixed current source I bias Connecting; the field effect transistor II M 2 Through a control switch S connected in series har And capacitor II C har Grounding, the control switch is one S har And capacitor II C har As voltage signal V har Is provided.
The voltage signal V har Through a control switch S harB And (5) grounding.
The two-stage sample hold module comprises an operational amplifier U 1 Two U of operational amplifier 2 Time sequence control switch unit S SH Two S of time sequence control switch unit SHR Three C of capacitor SH And capacitance four C SHR The method comprises the steps of carrying out a first treatment on the surface of the The operational amplifier is U 1 Is connected with the voltage signal V har Is connected with the output end of the operational amplifier U 1 An inverting input terminal of the operational amplifier is connected with an output terminal thereof, and the operational amplifier is U 1 The output end of (a) passes through a time sequence control switch unit S SH And capacitor tri-C SH Is connected with one end of the capacitor tri-C SH The other end of the first electrode is grounded; the time sequence control switch unit is S SH And capacitor tri-C SH Two U of the connection terminal and operational amplifier of (a) 2 Is connected with the non-inverting input end of the operational amplifier II U 2 Is not connected with the comparator U 0 Is connected with one input end of the operational amplifier two U 2 The inverting input end of the operational amplifier is connected with the output end of the operational amplifier II U 2 The output end of (a) passes through a time sequence control switch unit II S SHR And capacitor four C SHR Is connected with one end of the capacitor C SHR The other end of the time sequence control switch unit is grounded, and the time sequence control switch unit is two S SHR And capacitor four C SHR Is connected with the comparator U 0 Is connected to the other input terminal of the circuit.
The time sequence control switch unit is S SH Comprises three U of operational amplifier 3 Three S of control switch SH3 Four S of control switch SH4 And control switch five S SHB The method comprises the steps of carrying out a first treatment on the surface of the The control switch is three S SH3 One end of (a) and an operational amplifier (U) 1 The output end of the control switch is connected with three S SH3 The other end of (a) is respectively connected with four S of the control switch SH4 And control switch five S SHB One end of the control switch is connected with four S SH4 Three U of the other end of (a) and the operational amplifier 3 Is connected with the non-inverting input end of the control switch, the control switch is four S SH4 Sum op amp three U 3 Three C of the connecting terminal and the capacitor SH Connecting; three U of the operational amplifier 3 The inverting output end of the (B) is connected with the input end of the (C) and the (D) is three U 3 Five S of output terminal and control switch SHB Is connected with the other end of the connecting rod.
The time sequence control switch unit is S SH And a time sequence control switch unit two S SHR Is identical in circuit configuration.
The DAC conversion module comprises a reset switch RST and a reference capacitor C 0 Four U of operational amplifier 4 And charge distribution units S having the same number as the data in the control signal array Q The method comprises the steps of carrying out a first treatment on the surface of the The charge distribution unit S Q The device consists of a capacitor and a change-over switch which are connected in series; all of the charge distribution units S Q Is divided into two groups with the same number and is respectively connected in parallel with the reference capacitor C 0 Is provided; four U of the operational amplifier 4 Is not connected with the reference capacitor C 0 Is connected with one end of the reference capacitor C 0 The other end of the reset switch RST is connected with one end of the reset switch RST, and the other end of the reset switch RST is used as a reference voltage V REF The reference voltage V REF The input end of the switch is connected with one switch end of all the switches, and the other switch end of the switch is grounded; four U of the operational amplifier 4 Is connected to its output as a pre-bias voltage V init Is provided.
Advantageous effects
The invention has the advantages that:
1. the maximum power point tracking algorithm proves that the output power is positively correlated with the time duration of the energy output through theoretical calculation, and finds the maximum power point through the steps of power detection, sampling comparison, hill climbing method adjustment of the pre-bias voltage and the like, so that the pre-bias voltage is always at an optimal value, and the maximization of the output power of the pre-bias structure piezoelectric energy acquisition circuit can be realized. Unlike the piezoelectric energy harvesting circuit of the existing pre-bias voltage structure, the optimal power point is not the maximum voltage that can be achieved by the CMOS process, but a dynamic voltage value that is adaptively adjusted according to the actual vibration situation and the circuit structure.
2. The power detection circuit realizes accurate power sampling and comparison through the time-voltage conversion module and the two-stage sampling and holding module and accurate time sequence control, ensures the accuracy of self-adaptive adjustment of the pre-bias voltage, and ensures that the pre-bias voltage changes in a reasonable small range in a fluctuation way.
Drawings
FIG. 1 is a schematic diagram of a maximum power point tracking circuit frame according to the present invention;
FIG. 2 is a schematic circuit diagram of a piezoelectric energy harvesting interface module according to the present invention;
FIG. 3 is a key waveform diagram of the piezoelectric energy harvesting interface module of the present invention during operation;
FIG. 4 is a schematic diagram of a specific circuit structure of the time-voltage conversion module, the two-stage sample-and-hold module, and the comparator according to the present invention;
FIG. 5 is a state flow chart of a hill climbing algorithm of the present invention;
fig. 6 is a schematic circuit diagram of a DAC conversion module according to the present invention;
FIG. 7 is a schematic diagram of the pre-bias voltage adaptive adjustment waveform of the present invention.
Detailed Description
The invention is further described below in connection with the examples, which are not to be construed as limiting the invention in any way, but rather as falling within the scope of the claims.
Referring to fig. 1, the maximum power point tracking circuit applied to a piezoelectric energy collection interface of the present invention includes a piezoelectric energy collection interface module, a time-voltage conversion module, a two-stage sample-and-hold module, a comparator U0 and a DAC conversion module.
The circuit structure of the piezoelectric energy acquisition interface module adopted by the invention and key waveforms in the working process are shown in fig. 2 and 3. The invention adopts a capacitor C PZ Resistance R PZ And a current source I PZ A piezoelectric patch model PZT is constructed. Wherein, the energy storage device Bat can adopt a battery. The piezoelectric energy collection interface module of the invention comprises a switch S A Switch II S B Three S of switch C Four S of switch D Five S of switch X Six S of switch Y Seven S of switch N Eight S of switch P And an inductance L. Switch S A And switch four S D Switch two S B And switch three S C The switch states of (a) are consistent.
The specific connection structure of the piezoelectric energy collection interface module and the piezoelectric patch model PZT is as follows. One end of the inductor L is connected with a switch S in parallel A Three S of switch C And switch five S X The other end of the inductor L is connected with a switch II S in parallel B Four S of switch D And switch six S Y . Switch S A And switch two S B One end far away from the inductor L is connected with the input end of the energy storage device Bat, and the switch is three S C And switch four S D One end far from the inductor L is grounded. Capacitor C PZ Resistance R PZ And a current source I PZ Parallel connection, five switches S X Through switch seven S N Grounding, switch six S Y By switching eight S P Grounding, switch five S X And switch seven S N And a capacitor C PZ One end of the switch is connected with six S Y And switch eight S P And a capacitor C PZ Is connected with the other end of the connecting rod.
The piezoelectric energy acquisition interface module can realize the functions of an AC-DC circuit and a DC-DC circuit in a traditional architecture, realizes the conversion of an alternating piezoelectric signal into a direct current signal by using a single inductor, and outputs stable DC voltage with maximum power. Switch eight S P And switch seven S N The existence of the voltage regulator avoids the occurrence of negative voltage in the circuit, is beneficial to the design of a driving circuit of a switching tube and solves the problem of substrate leakage. All switches are detected to realize accurate time sequence control, so that the power loss is further reduced, and the output power is improved.
Taking a positive half period of circuit operation as an example, the working process of the piezoelectric energy collection interface module mainly comprises the following stages:
first, energy accumulation: in the circuit only switch eight S P Conduction, the energy collected by the piezoelectric patch model PZT is used for conducting the electric capacity C in the form of alternating current PZ Charging, positive terminal voltage V of piezoelectric plate model PZT pzp From pre-bias voltage V init Starting to increase;
second, voltage flipping: when the current source I PZ V at zero crossing of current pzp Peak to V init +2V PZ,OC Five switch S X And switch six S Y Conducting, using inductance L and capacitance C PZ Form a resonant circuit, and the capacitor is C PZ The voltage at both ends is inverted. When V is detected pzp Zero crossing, switch eight S is turned off P Seven S of switch are conducted N . When the negative terminal voltage V of the piezoelectric patch model PZT is detected pzn The voltage reaches the pre-bias voltage V init When the overturning process is stopped, the overturning time is T bf ；
Third, energy output: at the end of the flipping process, inductor current I L Is not 0, i.e. part of the energy is still stored in the inductor L, using two switches S B And switch three S C Conduction transfers the remaining portion of the energy into the battery. When inductor current I is detected L Zero crossing, switch two S is turned off B And switch three S C Ending the energy output process, wherein the energy output time is T har 。
The working mechanism of the negative half period of the piezoelectric energy collection interface module is the same as that of the positive half period, and seven S are switched in the energy accumulation stage N The switch is still utilized for five S in the turning process X And switch six S Y Conduction and turnover front half-section switch seven S N The second half is a switch eight S P Conduction and switch-S in energy output process A And switch four S is conductive.
In the energy output stage, two ends of the inductor L are respectively connected with a battery and the ground, and the voltage difference is the battery voltage V bat Thus inductor current I L The slope of the decay is fixed as:
。
since the energy output time is T har The inductor current at the end of the inversion is therefore:
this portion of the total output of energy temporarily present on the inductor L charges the battery, the energy output in the half cycle being:
thus, the output power is equal to T 2 har Proportional to the ratio. Detecting the magnitude of the output power may be by detecting T har To realize the method. Thus, the energy output time T of the piezoelectric energy collection interface module is collected har The energy output time T is converted by the time-voltage conversion module har Converted into a voltage signal V har . Meanwhile, in order to ensure that the maximum power output is always ensured, the sampled power information is compared with the power acquired in the last sampling period, so as to obtain the control pre-bias voltage V init Is set to the adjustment signal V PM 。
Specifically, a first voltage signal in the current period and a second voltage signal in the previous period relative to the current period are sampled by a two-stage sampling and holding module; two voltage signals are input to the comparator U 0 To obtain the adjusting signal V PM . Finally, adjusting the signal V by a hill climbing algorithm PM Performing operation processing and outputting a control signal array to the DAC conversion module; the DAC conversion module converts the control signal array into a pre-bias voltage V init 。
As shown in FIG. 4, the time-voltage conversion module of the present invention comprises a FET-M 1 Second M of field effect transistor 2 Fixed current source I bias S of control switch har And capacitor II C har . Field effect transistor M 1 And field effect transistor two M 2 Is connected as a power supply input terminal. Field effect transistor M 1 Grid electrode of (C) and drain electrode thereof and Field Effect Transistor (FET) II M 2 The grid electrodes of the (C) are connected with each other, and the connection end is connected with a fixed current source I bias And (5) connection. Second field effect transistor M 2 Through a control switch S connected in series har And capacitor II C har Grounding, control switch S har And capacitor II C har As voltage signal V har Is provided. Voltage signal V har Through a control switch S harB And (5) grounding.
The time-voltage conversion module is implemented by using a fixed current source I bias Double-capacitor C har Charging, the charging time is defined by the energy output time T har To control, thus, the capacitance C har Voltage V of (2) har And T is har Proportional to the ratio.
The two-stage sample-hold module comprises an operational amplifier U 1 Two U of operational amplifier 2 Time sequence control switch unit S SH Two S of time sequence control switch unit SHR Three C of capacitor SH And capacitance four C SHR . Time sequence control switch unit S SH And a time sequence control switch unit two S SHR Is identical in circuit configuration. Operational amplifier U 1 Is connected with the voltage signal V har Is the input of (2)The output end is connected with an operational amplifier U 1 The inverting input terminal of (a) is connected with the output terminal thereof, and the operational amplifier is U 1 The output end of (a) passes through a time sequence control switch unit S SH And capacitor tri-C SH One end of (C) is connected with the capacitor SH The other end of which is grounded. Time sequence control switch unit S SH And capacitor tri-C SH Two U of the connection terminal and operational amplifier of (a) 2 Is connected with the non-inverting input end of the operational amplifier two U 2 Is not connected with the comparator U 0 Is connected with one input end of the operational amplifier two U 2 The inverting input end of (a) is connected with the output end of (b) and the two U's of the operational amplifier 2 The output end of (a) passes through a time sequence control switch unit II S SHR And capacitor four C SHR One end of (C) is connected with the capacitor SHR Is grounded at the other end of the time sequence control switch unit two S SHR And capacitor four C SHR Is connected with the comparator U 0 Is connected to the other input terminal of the circuit.
Time sequence control switch unit S SH Comprises three U of operational amplifier 3 Three S of control switch SH3 Four S of control switch SH4 And control switch five S SHB . Control switch three S SH3 One end of (a) and an operational amplifier (U) 1 Is connected with the output end of the control switch S SH3 The other end of (a) is respectively connected with four S of the control switch SH4 And control switch five S SHB One end of the control switch is connected with four S SH4 Three U of the other end of (a) and the operational amplifier 3 Is connected with the non-inverting input end of the control switch S SH4 Sum op amp three U 3 Three C of the connecting terminal and the capacitor SH And (5) connection. Three U of operational amplifier 3 The inverting output end of the (C) is connected with the input end of the (C) and the three U of the operational amplifier 3 Five S of output terminal and control switch SHB Is connected with the other end of the connecting rod.
In the two-stage sampling and holding module, the switch unit is controlled through time sequence S SH And a time sequence control switch unit two S SHR Can ensure the sampling voltage V SH And V SHR Representing the output power levels of the current period and the previous period, respectively. In order to ensure the accuracy of the sampled voltage,it is desirable to minimize the loss of capacitive charge so that the timing control switch unit has a S SH And a time sequence control switch unit two S SHR By means of an anti-leakage switch. The voltage sampling result is compared to generate an adjusting signal V PM If V PM And=1, the output power of the current period is larger than the output power of the previous period, and the output power of the current period is smaller than the previous period. In order to ensure sufficiently high tracking accuracy while reducing power consumption, power sampling is performed every 3 vibration cycles.
The mountain climbing algorithm adopts an algorithm in the prior art, and the specific algorithm flow is shown in fig. 5. If V is PM =1, then the pre-bias voltage V is continuously adjusted in the same direction (increasing or decreasing) init The method comprises the steps of carrying out a first treatment on the surface of the If V is PM =0, then the pre-bias voltage V is adjusted in the opposite direction init Accuracy of adjustment V init Determined by the accuracy of the DAC.
In view of the low power consumption requirements of the energy harvesting circuit, the present invention employs a 6-bit DAC architecture as shown in fig. 6. This structure allows charge redistribution by capacitance, and can reduce power consumption compared to a resistive or current steering DAC.
Specifically, the DAC conversion module includes a reset switch RST and a reference capacitor C 0 Four U of operational amplifier 4 6 charge distribution units S Q . Wherein the charge distribution unit S Q Consists of a capacitor and a change-over switch which are connected in series. All charge distribution units S Q Divided into two groups of equal number, three in each group, two groups of charge distribution units S Q Respectively connected in parallel with a reference capacitor C 0 Is provided. Each group of charge distribution units S Q The capacitance of the capacitor is multiplied, wherein the smallest capacitance is equal to the reference capacitance C 0 Is a capacitive capacity of (a).
Four U of operational amplifier 4 Is not connected with the reference capacitor C 0 Is connected with one end of a reference capacitor C 0 The other end of the reset switch RST is connected with one end of the reset switch RST, and the other end of the reset switch RST is used as a reference voltage V REF Is the input terminal of reference voltage V REF The input end of the switch is connected with one switch end of all the switches, and the other switch end of the switch is grounded; four U of operational amplifier 4 Is connected to its output as a pre-bias voltage V init Is provided.
When the reset switch RST is turned on, the output of the DAC conversion module is set to a pre-bias voltage V init Zero setting is performed, and then the output of the DAC conversion module is controlled by the control signal array SW [5:0 ]]Is controlled according to the adjusting signal V PM And performing dynamic self-adaptive adjustment.
Pre-bias voltage V init A schematic of the key signal waveforms for the tuning process is shown in fig. 7. Pre-bias voltage V before entering steady state init Sampling the comparison result V to be smaller than the optimal voltage PM Always 1, pre-bias voltage V init And continues to increase. When entering the steady state phase, the pre-bias voltage Vinit always fluctuates around the optimal voltage.
While only the preferred embodiments of the present invention have been described above, it should be noted that modifications and improvements can be made by those skilled in the art without departing from the structure of the present invention, and these do not affect the effect of the implementation of the present invention and the utility of the patent.
Claims (9)
1. A maximum power point tracking circuit applied to a piezoelectric energy collection interface is characterized by comprising a piezoelectric energy collection interface module, a time-voltage conversion module, a two-stage sampling and holding module and a comparator U 0 And a DAC conversion module; the piezoelectric energy acquisition interface module is electrically connected with the piezoelectric patch model PZT;
collecting the energy output time T of the piezoelectric energy collection interface module har The energy is output for time T through the time-voltage conversion module har Converted into a voltage signal V har ；
Sampling a first voltage signal in a current period and a second voltage signal in a previous period relative to the current period by the two-stage sample-and-hold module; two voltage signals are input to the comparator U 0 To obtain the adjusting signal V PM ；
Adjusting signal V by climbing algorithm PM Performing operation processing and outputting a control signal array to the DAC conversion module; the DAC conversion module converts the control signal array into a pre-bias voltage V init 。
2. The maximum power point tracking circuit for a piezoelectric energy harvesting interface of claim 1, wherein said piezoelectric energy harvesting interface module comprises a switch-S A Switch II S B Three S of switch C Four S of switch D Five S of switch X Six S of switch Y Seven S of switch N Eight S of switch P And an inductance L; one end of the inductor L is connected with a switch S in parallel A Three S of switch C And switch five S X The other end of the inductor L is connected with a switch II S in parallel B Four S of switch D And switch six S Y The method comprises the steps of carrying out a first treatment on the surface of the The switch is S A And switch two S B One end far away from the inductor L is connected with an energy storage device Bat, and the three switches S C And switch four S D One end far away from the inductor L is grounded; the switch is five S X Through switch seven S N Grounding, the switch is six S Y By switching eight S P Grounding, the switch is five S X And switch seven S N Is connected with one end of the piezoelectric sheet model PZT, the switch is six S Y And switch eight S P Is connected with the other end of the piezoelectric patch model PZT.
3. The maximum power point tracking circuit for a piezoelectric energy harvesting interface as defined by claim 2, wherein said switch-S A And switch four S D The switch states of the two switches are consistent B And switch three S C The switch states of (a) are consistent.
4. A maximum power point tracking circuit for a piezoelectric energy harvesting interface as defined by claim 1, wherein said time-to-electricityThe voltage conversion module comprises a field effect transistor M 1 Second M of field effect transistor 2 Fixed current source I bias S of control switch har And capacitor II C har The method comprises the steps of carrying out a first treatment on the surface of the The field effect transistor is M 1 And field effect transistor two M 2 Is connected with the source electrode of the power supply and is used as a power supply input end; the field effect transistor is M 1 Grid electrode of (C) and drain electrode thereof and Field Effect Transistor (FET) II M 2 The grid electrodes of the field effect transistor are connected with each other and M is 1 Grid electrode of (C) and drain electrode thereof and Field Effect Transistor (FET) II M 2 The connection end of the grid electrode of (C) and a fixed current source I bias Connecting; the field effect transistor II M 2 Through a control switch S connected in series har And capacitor II C har Grounding, the control switch is one S har And capacitor II C har As voltage signal V har Is provided.
5. The maximum power point tracking circuit for a piezoelectric energy harvesting interface as defined by claim 4, wherein said voltage signal V har Through a control switch S harB And (5) grounding.
6. The maximum power point tracking circuit for a piezoelectric energy harvesting interface as defined by claim 4, wherein said two-stage sample-and-hold module comprises an operational amplifier-U 1 Two U of operational amplifier 2 Time sequence control switch unit S SH Two S of time sequence control switch unit SHR Three C of capacitor SH And capacitance four C SHR The method comprises the steps of carrying out a first treatment on the surface of the The operational amplifier is U 1 Is connected with the voltage signal V har Is connected with the output end of the operational amplifier U 1 An inverting input terminal of the operational amplifier is connected with an output terminal thereof, and the operational amplifier is U 1 The output end of (a) passes through a time sequence control switch unit S SH And capacitor tri-C SH Is connected with one end of the capacitor tri-C SH The other end of the first electrode is grounded; the time sequence control switch unit is S SH And capacitor tri-C SH Two U of the connection terminal and operational amplifier of (a) 2 Is of (3)Phase input ends are connected, and the operational amplifier is two U' s 2 Is not connected with the comparator U 0 Is connected with one input end of the operational amplifier two U 2 The inverting input end of the operational amplifier is connected with the output end of the operational amplifier II U 2 The output end of (a) passes through a time sequence control switch unit II S SHR And capacitor four C SHR Is connected with one end of the capacitor C SHR The other end of the time sequence control switch unit is grounded, and the time sequence control switch unit is two S SHR And capacitor four C SHR Is connected with the comparator U 0 Is connected to the other input terminal of the circuit.
7. The maximum power point tracking circuit for a piezoelectric energy collection interface according to claim 6, wherein said timing control switch unit comprises an S SH Comprises three U of operational amplifier 3 Three S of control switch SH3 Four S of control switch SH4 And control switch five S SHB The method comprises the steps of carrying out a first treatment on the surface of the The control switch is three S SH3 One end of (a) and an operational amplifier (U) 1 The output end of the control switch is connected with three S SH3 The other end of (a) is respectively connected with four S of the control switch SH4 And control switch five S SHB One end of the control switch is connected with four S SH4 Three U of the other end of (a) and the operational amplifier 3 Is connected with the non-inverting input end of the control switch, the control switch is four S SH4 Sum op amp three U 3 Three C of the connecting terminal and the capacitor SH Connecting; three U of the operational amplifier 3 The inverting output end of the (B) is connected with the input end of the (C) and the (D) is three U 3 Five S of output terminal and control switch SHB Is connected with the other end of the connecting rod.
8. A maximum power point tracking circuit for a piezoelectric energy collection interface according to claim 6 or 7, wherein said timing control switch unit comprises an S SH And a time sequence control switch unit two S SHR Is identical in circuit configuration.
9. A method according to claim 1 for piezoelectric energy harvestingThe maximum power point tracking circuit of the interface is characterized in that the DAC conversion module comprises a reset switch RST and a reference capacitor C 0 Four U of operational amplifier 4 And charge distribution units S having the same number as the data in the control signal array Q The method comprises the steps of carrying out a first treatment on the surface of the The charge distribution unit S Q The device consists of a capacitor and a change-over switch which are connected in series; all of the charge distribution units S Q Is divided into two groups with the same number and is respectively connected in parallel with the reference capacitor C 0 Is provided; four U of the operational amplifier 4 Is not connected with the reference capacitor C 0 Is connected with one end of the reference capacitor C 0 The other end of the reset switch RST is connected with one end of the reset switch RST, and the other end of the reset switch RST is used as a reference voltage V REF The reference voltage V REF The input end of the switch is connected with one switch end of all the switches, and the other switch end of the switch is grounded; four U of the operational amplifier 4 Is connected to its output as a pre-bias voltage V init Is provided.
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