CN116054796A - Anti-leakage switch - Google Patents
Anti-leakage switch Download PDFInfo
- Publication number
- CN116054796A CN116054796A CN202310012278.XA CN202310012278A CN116054796A CN 116054796 A CN116054796 A CN 116054796A CN 202310012278 A CN202310012278 A CN 202310012278A CN 116054796 A CN116054796 A CN 116054796A
- Authority
- CN
- China
- Prior art keywords
- transistor
- port
- switch
- terminal
- operational amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/16—Modifications for eliminating interference voltages or currents
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/567—Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
Landscapes
- Electronic Switches (AREA)
Abstract
The invention provides an anti-creeping switch, comprising: a two-transistor analog switch configured to have an input terminal and an output terminal, the output terminal of which is connected to the sampling capacitance; and an operational amplifier configured to be connected as a voltage follower between the two-transistor body terminal and the output terminal of the two-transistor analog switch such that a voltage difference between the two-transistor body terminal and the output terminal of the two-transistor analog switch is zero.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to an anti-creeping switch.
Background
Analog switches may be used to transmit analog signals or to sample analog signals, and are the most basic and important element for analog signal processing. Fig. 1 shows a typical analog switch sample-and-hold circuit comprising a MOSFET transistor and a sampling capacitor for use as an analog switch. However, as can be seen from fig. 1, the analog switch is not an ideal device. Since the analog switch has several leakage paths, the voltage held in the sampling capacitor may rise or fall. In an off-state analog switch, the leakage current includes PN junction reverse bias current, sub-threshold leakage current, and gate leakage current (corresponding to a, b, c in FIG. 1). The magnitude and relative contribution of leakage current is strongly dependent on the manufacturing process. In analog circuits with very low operating speeds (about 1-1 kHz), such as ultra-low power consumption temperature sensors and biosensors, the leakage current effects of analog switches are very pronounced. This relatively long clock period causes voltage errors that are more severe than kT/C thermal noise, and this phenomenon is more severe when the operating temperature is very high.
In the prior art, one of the approaches to solve this problem is to use a larger signal storage capacitor, but the larger signal storage capacitor requires a higher driving power from the front-end circuit, which results in more power requirements. At the same time, larger capacitance also increases the silicon area severely. Another method is to measure the magnitude of the leakage current and cancel the leakage current by injecting a current. However, employing this approach requires a complex circuit design, while the effectiveness of counteracting the current is limited by the device matching.
As shown in fig. 2, in the sampling phase (when the switch is opened) vin=vout, in the holding phase (when the switch is opened), assuming that the reverse on-resistance of the drain-to-body parasitic diode is r, i_leakage-p= (VDD-v_out)/r, i_leakage-n= (v_out-VSS)/r, and v_out=vdd-VSS/2 if i_leakage-p=i_leakage-n, so if v_out+.vdd-VSS/2, i_leakage-p+.i_leakage-n is necessarily caused, and therefore, a part of the current is drawn from the capacitor, and therefore, the voltage value of Vout is caused to approach (VDD-VSS)/2, resulting in the output voltage deviating from the originally intended voltage.
Disclosure of Invention
The invention aims to provide an anti-leakage switch, which solves the problem that the voltage output by an analog switch deviates from an accurate actual value due to the leakage current of the existing analog switch.
In order to solve the above technical problems, the present invention provides an anti-leakage switch, including:
a two-transistor analog switch configured to have an input terminal and an output terminal, the output terminal of which is connected to the sampling capacitance; and
an operational amplifier configured to be connected as a voltage follower between the two-transistor body terminal and the output terminal of the two-transistor analog switch such that a voltage difference between the two-transistor body terminal and the output terminal of the two-transistor analog switch is zero.
Optionally, in the anti-leakage switch, the two-transistor analog switch includes:
a first transistor configured to have a gate as a first control signal terminal, a first terminal in a source-drain electrode thereof connected to an input terminal of the double-transistor analog switch, a second terminal in the source-drain electrode thereof connected to an output terminal of the double-transistor analog switch, and a substrate thereof connected to a first single-pole double-throw switch;
a first single pole double throw switch configured with a first port connected to a first power supply, a second port connected to an operational amplifier, and a third port connected to a substrate of the first transistor, wherein the first single pole double throw switch is connected in conduction between the first port and the third port, or between the second port and the third port.
Optionally, in the anti-leakage switch, the two-transistor analog switch further includes:
a second transistor configured to have its gate as a second control signal terminal, its first terminal in the source-drain connected to the input terminal of the double-transistor analog switch, its second terminal in the source-drain connected to the output terminal of the double-transistor analog switch, and its substrate connected to the second single-pole double-throw switch;
a second single pole double throw switch configured with a first port connected to a second power supply, a second port connected to the operational amplifier, and a third port connected to the substrate of the second transistor, wherein the second single pole double throw switch is connected in conduction between the first port and the third port, or between the second port and the third port.
Optionally, in the anti-leakage switch, a positive input end of the operational amplifier is connected to an output end of the operational amplifier, a negative input end of the operational amplifier is connected to an output end of the double-transistor analog switch, and an output end of the operational amplifier is connected to a second port of the first single-pole double-throw switch and a second port of the second single-pole double-throw switch.
Optionally, in the anti-creeping switch,
a first parasitic diode is arranged between the source electrode of the first transistor and the substrate, a second parasitic diode is arranged between the drain electrode of the first transistor and the substrate, and the directions of the first parasitic diode and the second parasitic diode are opposite;
a third parasitic diode is arranged between the source electrode of the second transistor and the substrate, a fourth parasitic diode is arranged between the drain electrode of the second transistor and the substrate, and the directions of the third parasitic diode and the fourth parasitic diode are opposite.
Optionally, in the anti-leakage switch, the first transistor is PMOS, and the second transistor is NMOS.
Optionally, in the anti-creeping switch,
when the input logic of the first control signal end is 0 and the input logic of the second control signal end is 1, clkb=0, clk=1, the first transistor is turned on, and the second transistor is turned on;
the first single-pole double-throw switch is connected and conducted between a first port and a third port, and the potential of the body end of the first transistor is equal to the first power supply VDD;
the second single-pole double-throw switch is connected and conducted between the first port and the third port, and the potential of the body end of the second transistor is equal to the second power supply VSS;
the input potential of the two-transistor analog switch is equal to the output potential of the two-transistor analog switch, vin=vout.
Optionally, in the anti-creeping switch,
when the input logic of the first control signal end is 1 and the input logic of the second control signal end is 0, clkb=1, clk=0, the first transistor is turned off, and the second transistor is turned off;
the first single-pole double-throw switch is connected and conducted between the second port and the third port, and the potential of the body end of the first transistor is equal to that of the output end of the operational amplifier;
the second single-pole double-throw switch is connected and conducted between the second port and the third port, and the potential of the body end of the second transistor is equal to that of the output end of the operational amplifier;
the potential of the output end of the operational amplifier is equal to the potential of the negative input end of the operational amplifier.
Optionally, in the anti-creeping switch,
the output end potential Vout of the double-transistor analog switch is connected with the first transistor body end through the operational amplifier, the voltage difference between two ends of the second parasitic diode is 0, the output end potential Vout of the double-transistor analog switch is connected with the second transistor body end through the operational amplifier, the voltage difference between two ends of the fourth parasitic diode is 0, the current I_leakage-p flowing through the second parasitic diode and the current I_leakage-n flowing through the fourth parasitic diode are equal to 0, and the accuracy of Vout is ensured.
In the anti-leakage switch provided by the invention, the operational amplifier is used as a voltage follower to be connected between the double-transistor body end and the output end of the double-transistor analog switch, so that the voltage difference between the double-transistor body end and the output end of the double-transistor analog switch is zero, namely no current flows between the double-transistor body end and the output end of the double-transistor analog switch, and the accuracy of Vout is ensured.
Drawings
FIG. 1 is a schematic diagram of a prior art analog switch;
FIG. 2 is a schematic diagram of the principle of inaccuracy of output voltage caused by leakage of a conventional analog switch;
fig. 3 is a schematic diagram of an anti-leakage switch according to an embodiment of the present invention.
Detailed Description
The invention is further elucidated below in connection with the embodiments with reference to the drawings.
It should be noted that the components in the figures may be shown exaggerated for illustrative purposes and are not necessarily to scale. In the drawings, identical or functionally identical components are provided with the same reference numerals.
In the present invention, unless specifically indicated otherwise, "disposed on …", "disposed over …" and "disposed over …" do not preclude the presence of an intermediate therebetween. Furthermore, "disposed on or above" … merely indicates the relative positional relationship between the two components, but may also be converted to "disposed under or below" …, and vice versa, under certain circumstances, such as after reversing the product direction.
In the present invention, the embodiments are merely intended to illustrate the scheme of the present invention, and should not be construed as limiting.
In the present invention, the adjectives "a" and "an" do not exclude a scenario of a plurality of elements, unless specifically indicated.
It should also be noted herein that in embodiments of the present invention, only a portion of the components or assemblies may be shown for clarity and simplicity, but those of ordinary skill in the art will appreciate that the components or assemblies may be added as needed for a particular scenario under the teachings of the present invention. In addition, features of different embodiments of the invention may be combined with each other, unless otherwise specified. For example, a feature of the second embodiment may be substituted for a corresponding feature of the first embodiment, or may have the same or similar function, and the resulting embodiment would fall within the disclosure or scope of the disclosure.
It should also be noted herein that, within the scope of the present invention, the terms "identical", "equal" and the like do not mean that the two values are absolutely equal, but rather allow for some reasonable error, that is, the terms also encompass "substantially identical", "substantially equal". By analogy, in the present invention, the term "perpendicular", "parallel" and the like in the table direction also covers the meaning of "substantially perpendicular", "substantially parallel".
The numbers of the steps of the respective methods of the present invention are not limited to the order of execution of the steps of the methods. The method steps may be performed in a different order unless otherwise indicated.
The anti-leakage switch provided by the invention is further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention.
The invention aims to provide an anti-leakage switch, which solves the problem that the voltage output by an analog switch deviates from an accurate actual value due to the leakage current of the existing analog switch.
To achieve the above object, the present invention provides an anti-leakage switch comprising: a two-transistor analog switch configured to have an input terminal and an output terminal, the output terminal of which is connected to the sampling capacitance; and an operational amplifier configured to be connected as a voltage follower between the two-transistor body terminal and the output terminal of the two-transistor analog switch such that a voltage difference between the two-transistor body terminal and the output terminal of the two-transistor analog switch is zero.
Fig. 3 provides an embodiment of the present invention, and the anti-leakage switch provided by the present invention includes: a two-transistor analog switch configured to have an input terminal and an output terminal, the output terminal of which is connected to the sampling capacitance; and an operational amplifier configured to be connected as a voltage follower between the two-transistor body terminal and the output terminal of the two-transistor analog switch such that a voltage difference between the two-transistor body terminal and the output terminal of the two-transistor analog switch is zero.
As shown in fig. 3, in the anti-leakage switch, the two-transistor analog switch includes: a first transistor Mp configured with its gate as a first control signal terminal CLKB, its source-drain first terminal connected to the input terminal Vin of the double-transistor analog switch, its source-drain second terminal connected to the output terminal Vout of the double-transistor analog switch, and its substrate connected to the first single-pole double-throw switch K1; a first single pole double throw switch K1 configured with a first port connected to the first power supply VDD and a second port connected to the operational amplifier A 0 The third port of which is connected to the substrate of the first transistor Mp, wherein the first single pole double throw switch is connected in conduction between the first port and the third port, or between the second port and the third port.
Specifically, in the anti-leakage switch, the two-transistor analog switch further includes: second transistor M N Is configured with a gate as a second control signal terminal CLK, a first terminal in the source/drain connected to the input terminal Vin of the two-transistor analog switch, and a second terminal in the source/drain connected to the two-transistor analog switchThe substrate of the output end Vout of the switch is connected with a second single-pole double-throw switch K2; a second single pole double throw switch K2 configured with a first port connected to the second power source VSS and a second port connected to the operational amplifier A 0 A third port connected to the second transistor M N Wherein the second single pole double throw switch is connected in conduction between the first port and the third port or between the second port and the third port.
Further, in the anti-leakage switch, the operational amplifier a 0 The positive input end of the operational amplifier is connected to the output end of the operational amplifier, the negative input end of the operational amplifier is connected to the output end of the double-transistor analog switch, and the output end of the operational amplifier is connected to the second port of the first single-pole double-throw switch and the second port of the second single-pole double-throw switch.
Further, in the anti-leakage switch, a first parasitic diode is arranged between a source electrode of the first transistor and the substrate, a second parasitic diode is arranged between a drain electrode of the first transistor and the substrate, and the directions of the first parasitic diode and the second parasitic diode are opposite; a third parasitic diode is arranged between the source electrode of the second transistor and the substrate, a fourth parasitic diode is arranged between the drain electrode of the second transistor and the substrate, and the directions of the third parasitic diode and the fourth parasitic diode are opposite. In the anti-leakage switch, the first transistor is a PMOS, and the second transistor is an NMOS.
Specifically, in the anti-leakage switch, when the input logic of the first control signal terminal is 0 and the input logic of the second control signal terminal is 1, clkb=0 and clk=1, the first transistor is turned on, and the second transistor is turned on; the first single-pole double-throw switch is connected and conducted between a first port and a third port, and the potential of the body end of the first transistor is equal to the first power supply VDD; the second single-pole double-throw switch is connected and conducted between the first port and the third port, and the potential of the body end of the second transistor is equal to the second power supply VSS; the input potential of the two-transistor analog switch is equal to the output potential of the two-transistor analog switch, vin=vout.
Further, in the anti-leakage switch, when the input logic of the first control signal terminal is 1 and the input logic of the second control signal terminal is 0, clkb=1, clk=0, the first transistor is turned off, and the second transistor is turned off; the first single-pole double-throw switch is connected and conducted between the second port and the third port, and the potential of the body end of the first transistor is equal to that of the output end of the operational amplifier; the second single-pole double-throw switch is connected and conducted between the second port and the third port, and the potential of the body end of the second transistor is equal to that of the output end of the operational amplifier; the potential of the output end of the operational amplifier is equal to the potential of the negative input end of the operational amplifier.
In addition, in the anti-leakage switch, the output end potential Vout of the double-transistor analog switch is connected with the first transistor body end through the operational amplifier, the voltage difference between the two ends of the second parasitic diode is 0, the output end potential Vout of the double-transistor analog switch is connected with the second transistor body end through the operational amplifier, and the voltage difference between the two ends of the fourth parasitic diode is 0, so that the current I_leakage-p flowing through the second parasitic diode and the current I_leakage-n flowing through the fourth parasitic diode are equal to 0, and the accuracy of Vout is ensured.
In the anti-leakage switch provided by the invention, the operational amplifier is used as a voltage follower to be connected between the double-transistor body end and the output end of the double-transistor analog switch, so that the voltage difference between the double-transistor body end and the output end of the double-transistor analog switch is zero, namely no current flows between the double-transistor body end and the output end of the double-transistor analog switch, and the accuracy of Vout is ensured.
In summary, the above embodiments describe the different configurations of the anti-leakage switch in detail, and of course, the present invention includes but is not limited to the configurations listed in the above embodiments, and any configuration that is changed based on the configurations provided in the above embodiments falls within the scope of protection of the present invention. One skilled in the art can recognize that the above embodiments are illustrative.
In the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other. For the system disclosed in the embodiment, the description is relatively simple because of corresponding to the method disclosed in the embodiment, and the relevant points refer to the description of the method section.
The above description is only illustrative of the preferred embodiments of the present invention and is not intended to limit the scope of the present invention, and any alterations and modifications made by those skilled in the art based on the above disclosure shall fall within the scope of the appended claims.
Claims (9)
1. An anti-leakage switch, comprising:
a two-transistor analog switch configured to have an input terminal and an output terminal, the output terminal of which is connected to the sampling capacitance; and
an operational amplifier configured to be connected as a voltage follower between the two-transistor body terminal and the output terminal of the two-transistor analog switch such that a voltage difference between the two-transistor body terminal and the output terminal of the two-transistor analog switch is zero.
2. The anti-leakage switch of claim 1, wherein the two-transistor analog switch comprises:
a first transistor configured to have a gate as a first control signal terminal, a first terminal in a source-drain electrode thereof connected to an input terminal of the double-transistor analog switch, a second terminal in the source-drain electrode thereof connected to an output terminal of the double-transistor analog switch, and a substrate thereof connected to a first single-pole double-throw switch;
a first single pole double throw switch configured with a first port connected to a first power supply, a second port connected to an operational amplifier, and a third port connected to a substrate of the first transistor, wherein the first single pole double throw switch is connected in conduction between the first port and the third port, or between the second port and the third port.
3. The anti-leakage switch of claim 2, wherein the two-transistor analog switch further comprises:
a second transistor configured to have its gate as a second control signal terminal, its first terminal in the source-drain connected to the input terminal of the double-transistor analog switch, its second terminal in the source-drain connected to the output terminal of the double-transistor analog switch, and its substrate connected to the second single-pole double-throw switch;
a second single pole double throw switch configured with a first port connected to a second power supply, a second port connected to the operational amplifier, and a third port connected to the substrate of the second transistor, wherein the second single pole double throw switch is connected in conduction between the first port and the third port, or between the second port and the third port.
4. The anti-leakage switch of claim 3, wherein the positive input of the operational amplifier is connected to the output of the operational amplifier, the negative input of the operational amplifier is connected to the output of the two-transistor analog switch, and the output of the operational amplifier is connected to the second port of the first single-pole double-throw switch and the second port of the second single-pole double-throw switch.
5. The anti-leakage switch according to claim 4, wherein,
a first parasitic diode is arranged between the source electrode of the first transistor and the substrate, a second parasitic diode is arranged between the drain electrode of the first transistor and the substrate, and the directions of the first parasitic diode and the second parasitic diode are opposite;
a third parasitic diode is arranged between the source electrode of the second transistor and the substrate, a fourth parasitic diode is arranged between the drain electrode of the second transistor and the substrate, and the directions of the third parasitic diode and the fourth parasitic diode are opposite.
6. The anti-leakage switch of claim 5, wherein the first transistor is PMOS and the second transistor is NMOS.
7. The anti-leakage switch according to claim 6, wherein,
when the input logic of the first control signal end is 0 and the input logic of the second control signal end is 1, clkb=0, clk=1, the first transistor is turned on, and the second transistor is turned on;
the first single-pole double-throw switch is connected and conducted between a first port and a third port, and the potential of the body end of the first transistor is equal to the first power supply VDD;
the second single-pole double-throw switch is connected and conducted between the first port and the third port, and the potential of the body end of the second transistor is equal to the second power supply VSS;
the input potential of the two-transistor analog switch is equal to the output potential of the two-transistor analog switch, vin=vout.
8. The anti-leakage switch according to claim 6, wherein,
when the input logic of the first control signal end is 1 and the input logic of the second control signal end is 0, clkb=1, clk=0, the first transistor is turned off, and the second transistor is turned off;
the first single-pole double-throw switch is connected and conducted between the second port and the third port, and the potential of the body end of the first transistor is equal to that of the output end of the operational amplifier;
the second single-pole double-throw switch is connected and conducted between the second port and the third port, and the potential of the body end of the second transistor is equal to that of the output end of the operational amplifier;
the potential of the output end of the operational amplifier is equal to the potential of the negative input end of the operational amplifier.
9. The anti-leakage switch according to claim 6, wherein,
the output end potential Vout of the double-transistor analog switch is connected with the first transistor body end through the operational amplifier, the voltage difference between two ends of the second parasitic diode is 0, the output end potential Vout of the double-transistor analog switch is connected with the second transistor body end through the operational amplifier, the voltage difference between two ends of the fourth parasitic diode is 0, the current I_leakage-p flowing through the second parasitic diode and the current I_leakage-n flowing through the fourth parasitic diode are equal to 0, and the accuracy of Vout is ensured.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310012278.XA CN116054796A (en) | 2023-01-05 | 2023-01-05 | Anti-leakage switch |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202310012278.XA CN116054796A (en) | 2023-01-05 | 2023-01-05 | Anti-leakage switch |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116054796A true CN116054796A (en) | 2023-05-02 |
Family
ID=86116001
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202310012278.XA Pending CN116054796A (en) | 2023-01-05 | 2023-01-05 | Anti-leakage switch |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116054796A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117498288A (en) * | 2023-11-16 | 2024-02-02 | 安徽曦合微电子有限公司 | Voltage stabilizing circuit and chip |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060091933A1 (en) * | 2004-10-28 | 2006-05-04 | Denso Corporation | Analog switch having a minimized external flow of leakage current and switched capacitor filter incorporating the analog switch |
| CN106027010A (en) * | 2016-05-10 | 2016-10-12 | 天津大学 | Low-current-leakage analog switch applied to low-speed sample-and-hold circuit |
| CN106656132A (en) * | 2016-12-31 | 2017-05-10 | 唯捷创芯(天津)电子技术股份有限公司 | Extremely low current leakage analog switch, chip and communication terminal |
-
2023
- 2023-01-05 CN CN202310012278.XA patent/CN116054796A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060091933A1 (en) * | 2004-10-28 | 2006-05-04 | Denso Corporation | Analog switch having a minimized external flow of leakage current and switched capacitor filter incorporating the analog switch |
| CN106027010A (en) * | 2016-05-10 | 2016-10-12 | 天津大学 | Low-current-leakage analog switch applied to low-speed sample-and-hold circuit |
| CN106656132A (en) * | 2016-12-31 | 2017-05-10 | 唯捷创芯(天津)电子技术股份有限公司 | Extremely low current leakage analog switch, chip and communication terminal |
Non-Patent Citations (1)
| Title |
|---|
| JIN JYH SU 等: "A Low-Leakage Body-Guarded Analog Switch in 0.35-μm BiCMOS and Its Applications in Low-Speed Switched-Capacitor Circuits", 《IEEE TRANSACTIONS ON CIRCUITS AND SYSTEM II:EXPRESS BRIEFS》, pages 947 - 949 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117498288A (en) * | 2023-11-16 | 2024-02-02 | 安徽曦合微电子有限公司 | Voltage stabilizing circuit and chip |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107370487B (en) | Grid voltage bootstrap switch circuit based on NMOS pipe | |
| US9576679B2 (en) | Multi-stage sample and hold circuit | |
| US7385440B2 (en) | Bootstrapped switch for sampling inputs with a signal range greater than supply voltage | |
| CN110149111B (en) | Bootstrap switch circuit and control method thereof | |
| US8004340B2 (en) | System and method for a semiconductor switch | |
| US7385427B2 (en) | Sample-and-hold circuits having reduced channel conductance variation and methods of operation thereof | |
| US20080315246A1 (en) | Transistor switch circuit and sample-and-hold circuit | |
| CN112953503B (en) | High-linearity grid voltage bootstrap switch circuit | |
| CN116054796A (en) | Anti-leakage switch | |
| TWI514755B (en) | Low switching error, small capacitors, auto-zero offset buffer amplifier | |
| US7332941B2 (en) | Analog switch circuit and sample-and-hold circuit including the same | |
| CN106656132B (en) | Extremely low electric leakage analog switch, chip and communication terminal | |
| CN111245413A (en) | High-speed high-linearity grid voltage bootstrap switch circuit | |
| CN101001085A (en) | Signal sampling hold circuit | |
| JP5404235B2 (en) | Amplitude conversion circuit | |
| JP5765274B2 (en) | Analog switch | |
| US20150145564A1 (en) | Electronic Switching Device with Reduction of Leakage Currents and Corresponding Control Method | |
| CN102354246B (en) | Active clamping circuit | |
| US7612605B2 (en) | Bootstrap voltage generating circuits | |
| US10916321B2 (en) | Circuit with capacitors and corresponding method | |
| CN111835298B (en) | Differential follower control circuit | |
| CN220325608U (en) | Grid voltage bootstrapping switch circuit, sampling module and electronic device | |
| CN116886094B (en) | Bootstrap switch sampling circuit | |
| JP2001111412A (en) | Input signal level conversion circuit and liquid crystal display device | |
| CN115865091A (en) | Grid voltage bootstrap switch circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |