CN115985939A

CN115985939A - Silicon carbide diode with terminal groove structure and preparation method thereof

Info

Publication number: CN115985939A
Application number: CN202211737278.8A
Authority: CN
Inventors: 王正; 杨程; 王毅
Original assignee: Yangzhou Yangjie Electronic Co Ltd
Current assignee: Yangzhou Yangjie Electronic Co Ltd
Priority date: 2022-12-31
Filing date: 2022-12-31
Publication date: 2023-04-18

Abstract

A silicon carbide diode with a terminal groove structure and a preparation method thereof relate to a silicon carbide diode device. The silicon carbide epitaxial layer is formed by sequentially connecting back thickening metal, back ohmic contact metal, a silicon carbide substrate and a silicon carbide epitaxial layer from bottom to top; the silicon carbide epitaxial layer is provided with P-type diffusion regions and P-type voltage division rings which are alternately arranged; a front contact metal and a front thickening metal which are sequentially arranged from bottom to top are arranged on one side of the silicon carbide epitaxial layer; the other side of the silicon carbide epitaxial layer is provided with field oxygen extending into the position below the front contact metal; and a passivation layer extending to the upper part of the front thickened metal is arranged above the field oxygen. Specifically, the passivation layer includes an inorganic passivation layer and an organic passivation layer sequentially disposed from bottom to top. Specifically, the conductivity types of the silicon carbide substrate and the silicon carbide epitaxial layer are both N-type. Specifically, the pitches of the plurality of P-type diffusion regions are the same. The invention greatly enhances the reverse voltage resistance of the device.

Description

Silicon carbide diode with terminal groove structure and preparation method thereof

Technical Field

The invention relates to a silicon carbide diode device, in particular to a silicon carbide diode with a terminal groove structure.

Background

The silicon carbide as a third generation wide bandgap semiconductor material has the obvious advantages of wide bandgap, high critical breakdown field strength, high thermal conductivity and carrier saturation rate and the like. The advantages enable the silicon carbide to become an ideal material for manufacturing high-power, high-frequency, high-temperature-resistant and anti-radiation devices, and have wide development prospects in the fields of high-voltage-resistant grade application such as new energy power generation, high-speed rail traction equipment and hybrid electric vehicles.

The silicon carbide diode is a device suitable for a high-power environment and is mainly applied to the field of 650V to 1700V products at present, but in the actual manufacturing of the device, the actual withstand voltage of the device is far smaller than the designed voltage value, because the device is subjected to early breakdown due to the local electric field concentration caused by the curvature existing at the edge of the PN junction in the reverse direction, and the performance is influenced. In order to make the withstand voltage actually applied to the device approach the theoretical voltage value, a termination structure is usually adopted to solve the electric field concentration caused by the curvature effect. Among them, the more commonly used termination structures include Field Plate (FP), junction Termination Extension (JTE) and Field Limiting Ring (FLR). The field limiting ring technology is the most commonly used structure in the industry at present, because the P-type injection ring can be synchronously completed with the ion injection of the P region of the active region of the device, the compatibility is realized, and the process cost is reduced. And the highly doped P-type ring structure does not need to consider the problem of implantation activation rate. However, the disadvantage is that the field limiting ring structure often includes tens to tens of P-type rings, which occupies a large chip area, especially for high-voltage devices.

Disclosure of Invention

The invention provides a silicon carbide diode with a terminal groove structure and a preparation method thereof, aiming at the problems, wherein the reverse voltage endurance capability of the device is further improved, and the voltage endurance capability of the planar field limiting ring structure is the same as that of the planar field limiting ring structure.

The technical scheme of the invention is as follows: a silicon carbide diode with a terminal groove structure and a preparation method thereof comprise a back thickening metal, a back ohmic contact metal, a silicon carbide substrate and a silicon carbide epitaxial layer which are sequentially connected from bottom to top;

the silicon carbide epitaxial layer is provided with P-type diffusion regions and P-type voltage division rings which are alternately arranged;

a front contact metal and a front thickening metal which are sequentially arranged from bottom to top are arranged on one side of the silicon carbide epitaxial layer;

the other side of the silicon carbide epitaxial layer is provided with field oxygen extending into the position below the front contact metal;

and a passivation layer extending to the upper part of the front thickened metal is arranged above the field oxygen.

Specifically, the passivation layer comprises an inorganic passivation layer and an organic passivation layer which are arranged in sequence from bottom to top.

Specifically, the conductivity types of the silicon carbide substrate and the silicon carbide epitaxial layer are both N-type.

Specifically, the pitches of a plurality of P-type diffusion regions are the same.

Specifically, the interval of P type partial pressure ring is 0.5um to 2um.

A preparation method of a silicon carbide diode with a terminal groove structure comprises the following steps:

s100, growing a silicon carbide epitaxial layer on a silicon carbide substrate;

s200, forming a terminal groove structure on the silicon carbide epitaxial layer through an etching process after forming a graphical mask oxide layer through medium film deposition, photoetching and etching;

s300, forming a patterned mask oxide layer on the silicon carbide epitaxial layer through dielectric film deposition, photoetching and etching, and then forming a P-type diffusion region and a P-type voltage division ring through Al ion implantation and high-temperature activation annealing;

s400, forming field oxygen above the P-type diffusion region and the P-type voltage division ring at the main junction through deposition;

s500, forming front contact metal on the P-type diffusion region through metal deposition, lapping the tail end of the front contact metal above field oxygen, and performing annealing treatment after deposition to form Schottky contact metal;

s600, depositing front thickened metal on the front contact metal to be used as an electrode to be led out;

s700, manufacturing an inorganic passivation layer above the front thickened metal and the field oxide, wherein the inorganic passivation layer climbs towards the front thickened metal from the end part of the field oxide and stops at the middle position close to the front thickened metal;

s800, preparing an organic passivation layer above the inorganic passivation layer;

s900, forming an ohmic metal electrode on the back surface of the silicon carbide substrate in an ohmic contact mode;

and S1000, depositing back thickening metal on the back ohmic contact metal.

Specifically, in step S200, the depth of the terminal trench structure is 0.3um to 1um.

Specifically, in step S500, al ions are implanted, the implantation energy is in the range of 30-500keV, and the implantation dose is in the range of 1E12-1E16 cm ^-2 The implantation temperature is 400-600 ℃, the high-temperature activation annealing temperature is 1600-1900 ℃ after the implantation is finished, and the depth of the formed P-type junction is 0.6-1.0um.

According to the invention, after the groove is etched at the terminal of the silicon carbide diode, the electric field concentration caused by the curvature of the P-type diffusion region at the main junction is effectively reduced, and the probability of reverse breakdown of the device in advance is reduced. And after etching, the conduction loss of the device is reduced by the smaller thickness of the silicon carbide epitaxial layer, so that the device can keep lower conduction loss under the condition of meeting higher reverse withstand voltage. According to practical verification, when the same number of P-type voltage division rings are adopted, compared with a planar structure, the reverse breakdown voltage of the device is improved by 24%, and the reverse voltage resistance of the device is enhanced to a great extent.

Drawings

Figure 1 is a schematic diagram of the structure of step S100 of the present invention,

figure 2 is a schematic diagram of the structure of step S200 of the present invention,

figure 3 is a schematic diagram of the structure of step S300 of the present invention,

figure 4 is a schematic diagram of the structure of step S400 of the present invention,

figure 5 is a schematic diagram of the structure of step S500 of the present invention,

figure 6 is a schematic structural diagram of step S600 of the present invention,

figure 7 is a schematic structural diagram of step S700 of the present invention,

figure 8 is a schematic structural diagram of step S900 of the present invention,

figure 9 is a schematic diagram of the structure of step S1000 according to the present invention,

in the figure, 1 is a silicon carbide substrate, 2 is an epitaxial layer, 3 is an etched groove region, 4 is a P-type diffusion region, 5 is a P-type voltage division ring, 6 is field oxygen, 7 is a front metal contact electrode, 8 is front thickened metal, 9 is an inorganic passivation layer, 10 is an organic passivation layer, 11 is an ohmic contact electrode, and 12 is back thickened metal.

Detailed Description

Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention and are not to be construed as limiting the present invention.

In the description of the present invention, it should be understood that the terms "upper", "lower", "left", "right", "vertical", "horizontal", and the like indicate orientations or positional relationships based on orientations or positional relationships shown in the drawings, which are merely for convenience of description and simplification of description, but do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention. In the description of the present invention, "a plurality" means two or more unless otherwise specified.

In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.

A silicon carbide diode with a terminal groove structure and a preparation method thereof comprise a back thickening metal 12, a back ohmic contact metal 11, a silicon carbide substrate 1 and a silicon carbide epitaxial layer 2 which are sequentially connected from bottom to top;

the silicon carbide epitaxial layer 2 is provided with P-type diffusion regions 4 and P-type voltage division rings 5 which are alternately arranged;

a front contact metal 7 and a front thickening metal 8 which are sequentially arranged from bottom to top are arranged on one side of the silicon carbide epitaxial layer 2;

the other side of the silicon carbide epitaxial layer 2 is provided with a field oxide 6 extending into the lower part of the front contact metal 7;

and a passivation layer extending to the upper part of the front thickened metal 8 is arranged above the field oxide 6.

Further defined, the passivation layer comprises an inorganic passivation layer 9 and an organic passivation layer 10 sequentially arranged from bottom to top.

Further, the conductivity types of the silicon carbide substrate 1 and the silicon carbide epitaxial layer 2 are both N type.

Further, the P-type diffusion regions 4 are spaced at the same interval.

Further define, the interval of P type partial pressure ring 5 is 0.5um to 2um. Referring to fig. 3, the P-type grading ring 5 is a lower 6 hatched regions on the right side of the silicon carbide epitaxial layer 2, and four hatched regions on the left side are P-type diffusion regions 4.

The preparation process of the invention improves the reverse voltage-resisting capability of the common planar field limiting ring structure, further improves the electric field concentration caused by the curvature of the P-type diffusion region at the main junction, reduces the conduction loss of the device by etching the epitaxial layer, keeps the lower conduction loss when the device meets higher reverse voltage resistance, and further improves the comprehensive performance of the silicon carbide diode.

s100, growing a silicon carbide epitaxial layer 2 on a silicon carbide substrate 1; as shown with reference to FIG. 1;

s200, forming a graphical mask oxide layer on the silicon carbide epitaxial layer 2 through dielectric film deposition, photoetching and etching, and forming a terminal groove structure 3 through an etching process; as shown with reference to FIG. 2;

s300, after a patterned mask oxide layer is formed on the silicon carbide epitaxial layer 2 through dielectric film deposition, photoetching and etching, forming a P-type diffusion region 4 and a P-type voltage division ring 5 through Al ion implantation and high-temperature activation annealing; as shown with reference to FIG. 3;

s400, forming field oxide 6 above the P-type diffusion region 4 and the P-type voltage division ring 5 at the main junction through deposition; as shown with reference to FIG. 4;

s500, forming front contact metal 7 on the P-type diffusion region 4 through metal deposition, wherein the tail end of the front contact metal 7 is lapped above the field oxide 6, and annealing treatment is carried out after deposition to form Schottky contact metal; as shown with reference to FIG. 5;

s600, depositing front thickening metal 8 on the front contact metal 7 to be used as an electrode to be led out; as shown with reference to FIG. 6;

s700, manufacturing an inorganic passivation layer 9 above the front thickened metal 8 and the field oxide 6, wherein the inorganic passivation layer 9 climbs from the end part of the field oxide 6 to the front thickened metal 8 and stops at the position close to the middle part of the front thickened metal 8; referring to fig. 7, the passivation layer 9 is mostly in contact with the field oxide 6, and is a little in contact with the front-side thickened metal 8;

s800, preparing an organic passivation layer 10 above the inorganic passivation layer 9;

s900, forming an ohmic metal electrode 11 on the back surface of the silicon carbide substrate 1 by ohmic contact, as shown in fig. 8;

s1000, a back-side thickened metal 12 is deposited on the back-side ohmic contact metal 11, as shown in fig. 9.

Further, the depth of the terminal trench structure 3 in step S200 is 0.3um to 1um.

Further limiting, in step S500, the ion implantation is Al ion, the implantation energy is in the range of 30-500keV, and the implantation dosage is in the range of 1E12-1E16 cm ^-2 The implantation temperature is 400-600 ℃, the high-temperature activation annealing temperature is 1600-1900 ℃ after the implantation is finished, and the depth of the formed P-type junction is 0.6-1.0um.

The disclosure of the present application also includes the following points:

(1) The drawings of the embodiments disclosed herein only relate to the structures related to the embodiments disclosed herein, and other structures can refer to general designs;

(2) In case of conflict, the embodiments and features of the embodiments disclosed in this application can be combined with each other to arrive at new embodiments;

the above embodiments are only embodiments disclosed in the present disclosure, but the scope of the disclosure is not limited thereto, and the scope of the disclosure should be determined by the scope of the claims.

Claims

1. A silicon carbide diode with a terminal groove structure and a preparation method thereof are characterized by comprising a back thickening metal (12), a back ohmic contact metal (11), a silicon carbide substrate (1) and a silicon carbide epitaxial layer (2) which are sequentially connected from bottom to top;

the silicon carbide epitaxial layer (2) is provided with P-type diffusion regions (4) and P-type voltage division rings (5) which are alternately arranged;

a front contact metal (7) and a front thickening metal (8) which are sequentially arranged from bottom to top are arranged on one side of the silicon carbide epitaxial layer (2);

the other side of the silicon carbide epitaxial layer (2) is provided with field oxygen (6) extending into the lower part of the front contact metal (7);

and a passivation layer extending to the upper part of the front thickened metal (8) is arranged above the field oxide (6).

2. A silicon carbide diode with a termination trench structure and a method for fabricating the same according to claim 1, wherein the passivation layer comprises an inorganic passivation layer (9) and an organic passivation layer (10) sequentially arranged from bottom to top.

3. A silicon carbide diode with a termination trench structure and a method for manufacturing the same according to claim 1, wherein the conductivity types of the silicon carbide substrate (1) and the silicon carbide epitaxial layer (2) are both N-type.

4. A silicon carbide diode with a termination trench structure and a method for manufacturing the same according to claim 1, wherein the P-type diffusion regions (4) have the same pitch.

5. The silicon carbide diode with the termination trench structure and the manufacturing method thereof according to claim 1, wherein the pitch of the P-type voltage division rings (5) is 0.5um to 2um.

6. A preparation method of a silicon carbide diode with a terminal groove structure is characterized by comprising the following steps:

s100, growing a silicon carbide epitaxial layer (2) on a silicon carbide substrate (1);

s200, forming a graphical mask oxide layer on the silicon carbide epitaxial layer (2) through medium film deposition, photoetching and etching, and then forming a terminal groove structure (3) through an etching process;

s300, after a patterned mask oxide layer is formed on the silicon carbide epitaxial layer (2) through dielectric film deposition, photoetching and etching, a P-type diffusion region (4) and a P-type voltage division ring (5) are formed through Al ion implantation and high-temperature activation annealing;

s400, forming field oxygen (6) above the P-type diffusion region (4) and the P-type voltage division ring (5) at the main junction through deposition;

s500, forming front contact metal (7) on the P-type diffusion region (4) through metal deposition, wherein the tail end of the front contact metal (7) is lapped above field oxide (6), and annealing treatment is carried out after deposition to form Schottky contact metal;

s600, depositing front thickened metal (8) on the front contact metal (7) and leading out as an electrode;

s700, manufacturing an inorganic passivation layer (9) above the front thickened metal (8) and the field oxide (6), wherein the inorganic passivation layer (9) climbs from the end part of the field oxide (6) to the front thickened metal (8) and stops at the middle position close to the front thickened metal (8);

s800, preparing an organic passivation layer (10) above the inorganic passivation layer (9);

s900, forming an ohmic metal electrode (11) on the back surface of the silicon carbide substrate (1) in an ohmic contact mode;

s1000, depositing back surface thickening metal (12) on the back surface ohmic contact metal (11).

7. The method for preparing a silicon carbide diode with a termination trench structure according to claim 1, wherein the depth of the termination trench structure (3) in step S200 is 0.3um to 1um.

8. The method of claim 1, wherein in step S500, the ions are implanted as Al ions with an implantation energy ranging from 30 keV to 500keV and an implantation dose ranging from 1E12 cm to 1E16 cm ^-2 The implantation temperature is 400-600 ℃, the high-temperature activation annealing temperature is 1600-1900 ℃ after the implantation is finished, and the depth of the formed P-type junction is 0.6-1.0um.