CN115985221B - Source driver, bandwidth adjusting method and display panel - Google Patents
Source driver, bandwidth adjusting method and display panel Download PDFInfo
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- CN115985221B CN115985221B CN202310273501.6A CN202310273501A CN115985221B CN 115985221 B CN115985221 B CN 115985221B CN 202310273501 A CN202310273501 A CN 202310273501A CN 115985221 B CN115985221 B CN 115985221B
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- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract
The utility model relates to a source driver, bandwidth adjustment method and display panel, the source driver includes parameter control circuit, clock recovery circuit and the locking detector of electric connection in proper order, parameter control circuit is used for carrying out the temperature detection to system environment temperature, and generate bandwidth control signal according to the size of system environment temperature, clock recovery circuit is used for receiving external data signal, the external data signal is analyzed in order to generate clock signal and training pattern data signal and send to locking detector, the locking detector is used for judging whether the frequency of training pattern data signal is unanimous with the frequency of clock signal, if yes, then produce corresponding feedback adjustment signal and send to clock recovery circuit, clock recovery circuit still is used for receiving the bandwidth control signal that parameter control circuit sent according to feedback adjustment signal, adjust self bandwidth according to bandwidth control signal, the whole working property of above-mentioned source driver has been improved.
Description
Technical Field
The present disclosure relates to the field of display, and in particular, to a source driver, a bandwidth adjustment method, and a display panel.
Background
In conventional display panel driving, it is common that a source driver receives timing control (Timing Controller, TCON) data transmitted from a timing controller, parses the data through an internal clock recovery circuit, and outputs a driving voltage to a TFT display panel.
The clock recovery (Clock Data Recovery, CDR) circuit has different characteristics at different temperatures due to the influence of the system environment temperature, and when the temperature is too high or too low, the CDR circuit cannot accurately analyze the display data.
However, the conventional source driver needs to be matched with specific timing control data to adjust parameters of the CDR circuit, such as bandwidth, i.e. to match with specific input data format.
Disclosure of Invention
In view of this, the present application provides a source driver, a bandwidth adjustment method, and a display panel, which can adjust bandwidth parameters of a CDR circuit according to a system environment temperature without being limited by an input data format, so that the CDR circuit can correctly analyze display data.
A source driver comprises a parameter control circuit, a clock recovery circuit and a lock detector which are electrically connected in sequence.
The parameter control circuit is used for detecting the temperature of the system environment according to the feedback adjustment signal and generating a bandwidth control signal according to the temperature of the system environment.
The clock recovery circuit is used for receiving the external data signal, analyzing the external data signal to generate a clock signal and a training pattern data signal and sending the clock signal and the training pattern data signal to the lock detector.
The lock detector is used for judging whether the frequency of the training pattern data signal is consistent with the frequency of the clock signal, if so, generating a corresponding feedback adjustment signal and sending the feedback adjustment signal to the clock recovery circuit.
The clock recovery circuit is also used for receiving the bandwidth control signal sent by the parameter control circuit according to the feedback adjustment signal and adjusting the bandwidth of the clock recovery circuit according to the bandwidth control signal.
In one embodiment, the bandwidth control signal includes any one of a first bandwidth control signal, a second bandwidth control signal, and a third bandwidth control signal.
When the system environment temperature is greater than a first preset temperature threshold and less than a second preset temperature threshold, the parameter control circuit is used for generating a first bandwidth control signal, and the clock recovery circuit is also used for keeping the current bandwidth unchanged according to the first bandwidth control signal.
When the system environment temperature is greater than or equal to a second preset temperature threshold, the parameter control circuit is used for generating a second bandwidth control signal, and the clock recovery circuit is also used for adjusting the bandwidth parameter of the clock recovery circuit according to the second bandwidth control signal so as to improve the current bandwidth.
When the system environment temperature is smaller than or equal to the first preset temperature threshold, the parameter control circuit is used for generating a third bandwidth control signal, and the clock recovery circuit is also used for adjusting the bandwidth parameter of the clock recovery circuit according to the third bandwidth control signal so as to reduce the current bandwidth.
In one embodiment, the parameter control circuit includes a bandgap voltage unit and a comparing unit electrically connected, and an output end of the comparing unit is electrically connected to the clock recovery circuit.
The band gap voltage unit is used for detecting the ambient temperature of the system, generating a corresponding negative temperature coefficient voltage signal and sending the negative temperature coefficient voltage signal to the comparison unit.
The bandgap voltage unit is further configured to generate a first constant voltage signal and a second constant voltage signal, where the first constant voltage signal is less than the second constant voltage signal.
The comparing unit is used for comparing the first constant voltage signal and the second constant voltage signal with the negative temperature coefficient voltage signal respectively, and generating a first bandwidth control signal when the negative temperature coefficient voltage signal is larger than the first constant voltage signal and smaller than the second constant voltage signal.
The comparing unit is further used for generating a second bandwidth control signal when the negative temperature coefficient voltage signal is smaller than or equal to the first constant voltage signal.
The comparing unit is further configured to generate a third bandwidth control signal when the negative temperature coefficient voltage signal is greater than or equal to the second constant voltage signal.
In one embodiment, the parameter control circuit includes a bandgap voltage unit and a comparing unit electrically connected, and an output end of the comparing unit is electrically connected to the clock recovery circuit.
The band gap voltage unit is used for detecting the system environment temperature, generating a corresponding positive temperature coefficient voltage signal and sending the positive temperature coefficient voltage signal to the comparison unit.
The bandgap voltage unit is further configured to generate a first constant voltage signal and a second constant voltage signal, where the first constant voltage signal is less than the second constant voltage signal.
The comparison unit is used for comparing the first constant voltage signal and the second constant voltage signal with the positive temperature coefficient voltage signal respectively, and generating a first bandwidth control signal when the positive temperature coefficient voltage signal is larger than the first constant voltage signal and smaller than the second constant voltage signal.
The comparison unit is further used for generating a second bandwidth control signal when the positive temperature coefficient voltage signal is greater than or equal to the second constant voltage signal.
The comparison unit is further used for generating a third bandwidth control signal when the positive temperature coefficient voltage signal is smaller than or equal to the first constant voltage signal.
In one embodiment, the comparing unit comprises a first comparator for comparing magnitudes of the first constant voltage signal and the negative temperature coefficient voltage signal and a second comparator for comparing magnitudes of the negative temperature coefficient voltage signal and the second constant voltage signal.
In one embodiment, the comparing unit includes a third comparator for comparing magnitudes of the first constant voltage signal and the positive temperature coefficient voltage signal and a fourth comparator for comparing magnitudes of the positive temperature coefficient voltage signal and the second constant voltage signal.
In one embodiment, the clock recovery circuit includes a charge pump unit.
When the system environment temperature is greater than the first preset temperature threshold and less than the second preset temperature threshold, the charge pump unit is used for keeping the self current unchanged according to the first bandwidth control signal.
When the system environment temperature is greater than or equal to a second preset temperature threshold, the charge pump unit is used for increasing the self current according to the second bandwidth control signal.
When the system environment temperature is less than or equal to the first preset temperature threshold, the charge pump unit is used for reducing the self current according to the third bandwidth control signal.
In one embodiment, the clock recovery circuit includes a low pass filter unit.
When the system environment temperature is greater than a first preset temperature threshold and less than a second preset temperature threshold, the low-pass filtering unit is used for keeping the parameters of the low-pass filtering unit unchanged according to the first bandwidth control signal.
When the system environment temperature is greater than or equal to a second preset temperature threshold, the low-pass filtering unit is used for increasing the resistance value or reducing the capacitance value of the low-pass filtering unit according to the second bandwidth control signal.
When the system environment temperature is smaller than or equal to a first preset temperature threshold, the low-pass filtering unit is used for reducing the resistance value or increasing the capacitance value of the low-pass filtering unit according to the third bandwidth control signal.
In addition, a bandwidth adjusting method is provided, which is applied to a source driver, wherein the source driver comprises a parameter control circuit, a clock recovery circuit and a lock detector which are electrically connected in sequence, and the bandwidth adjusting method comprises the following steps:
the method comprises the steps of receiving an external data signal, analyzing the external data signal to generate a clock signal and a training pattern data signal, and sending the clock signal and the training pattern data signal to a lock detector, so that the lock detector judges whether the frequency of the training pattern data signal is consistent with the frequency of the clock signal or not, and generating a feedback adjustment signal when the frequency of the training pattern data signal is consistent with the frequency of the clock signal.
And receiving a feedback adjustment signal sent by the lock detector.
And receiving the bandwidth control signal sent by the parameter control circuit according to the feedback adjustment signal.
And adjusting the bandwidth of the self according to the bandwidth control signal.
In addition, a display panel is also provided, and the display panel comprises the source driver.
The source driver comprises a parameter control circuit, a clock recovery circuit and a lock detector which are electrically connected in sequence, wherein the parameter control circuit is used for detecting the temperature of the system environment and generating a bandwidth control signal according to the temperature of the system environment, the clock recovery circuit is used for receiving an external data signal, analyzing the external data signal to generate a clock signal and a training pattern data signal and sending the clock signal to the lock detector, the lock detector is used for judging whether the frequency of the training pattern data signal is consistent with the frequency of the clock signal, if so, a corresponding feedback adjustment signal is generated and sent to the clock recovery circuit, the clock recovery circuit is also used for receiving the bandwidth control signal sent by the parameter control circuit according to the feedback adjustment signal, the bandwidth of the clock recovery circuit is adjusted according to the bandwidth control signal, and the bandwidth parameter of the clock recovery circuit is adjusted according to the system environment temperature, so that the influence on the bandwidth characteristics of the clock recovery circuit when the temperature is too high or too low is reduced, the clock recovery circuit can correctly interpret subsequent display data, and thus the bandwidth adjustment of the clock recovery circuit is not dependent on the input of the whole data of the time sequence, and the performance of the source driver is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments will be briefly introduced below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic block diagram of a source driver according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a negative temperature coefficient voltage signal according to an embodiment of the present disclosure along with a change in a system environment temperature;
FIG. 3 is a schematic diagram showing a variation of a positive temperature coefficient voltage signal according to an embodiment of the present disclosure along with a system environment temperature;
FIG. 4 is a schematic block diagram of a clock recovery circuit according to an embodiment of the present disclosure;
fig. 5 is a schematic diagram of a bandwidth adjustment method of a source driver according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. Based on the examples in the present application. The various embodiments described below and their technical features can be combined with each other without conflict.
As shown in fig. 1, a source driver 100 includes a parameter control circuit 110, a clock recovery circuit 120 and a lock detector 130 electrically connected in sequence.
The parameter control circuit 110 is configured to detect a system environment temperature, and generate a bandwidth control signal according to the system environment temperature.
The clock recovery circuit 120 is configured to receive the external data signal, parse the external data signal to generate a clock signal and a training pattern data signal, and send the clock signal and the training pattern data signal to the lock detector 130.
The lock detector 130 is configured to determine whether the frequency of the training pattern data signal is consistent with the frequency of the clock signal, and if so, generate a corresponding feedback adjustment signal and send the feedback adjustment signal to the clock recovery circuit 120.
The clock recovery circuit 120 is further configured to receive the bandwidth control signal sent by the parameter control circuit 110 according to the feedback adjustment signal, and adjust its bandwidth according to the bandwidth control signal.
In one embodiment, the source driver 100 is provided with an equalizer, and after the source driver 100 is started, the equalizer receives an external data signal input from an external device (typically, a timing controller TCON) and transmits the external data signal to the clock recovery circuit 120.
The clock recovery circuit 120 further analyzes the external data signal in combination with the bandwidth control signal after receiving the external data signal to generate a clock signal and a training pattern data signal.
The clock recovery circuit 120, i.e., CDR circuit, includes original signal data and control signal data (e.g., clock signal data) for indicating an active data period and an inactive data period in the original data signal, wherein the active data period includes corresponding display data (e.g., RGB data), and the inactive data period includes corresponding training pattern data. Generally, an inactive data transmission period is set after a vertical blanking period (vertical blanking) (before the active data frame transmission period), so the clock recovery circuit 120 can parse the external data signal to generate a clock signal and a training pattern data signal.
The lock detector 130 is configured to receive the clock signal and the training pattern data signal sent by the clock recovery circuit 120, and determine whether the frequency of the training pattern data signal is consistent with the frequency of the clock signal.
In one embodiment, when the lock detector 130 determines that the frequency of the training pattern data signal does not coincide with the frequency of the clock signal, the lock detector 130 continues to wait for the next training data and the next clock signal sent by the clock recovery circuit 120 until it determines that the frequency of the training pattern data signal coincides with the frequency of the clock signal.
The lock detector 130 determines whether the frequency of the training pattern data signal is consistent with the frequency of the clock signal, which is usually during the invalid data transmission period of the source driver 100.
In one embodiment, the source driver 100 further includes a driving circuit electrically connected to the lock detector 130, and the lock detector 130 is further configured to send the display data corresponding to the next display data to the driving circuit, so that the driving circuit can drive the TFT display panel to display the image correctly.
The lock detector 130 is configured to determine whether the frequency of the training pattern data signal is consistent with the frequency of the clock signal, if so, generate a corresponding feedback adjustment signal and send the feedback adjustment signal to the clock recovery circuit 120, and the clock recovery circuit 120 is further configured to receive the bandwidth control signal sent by the parameter control circuit 110, and adjust the bandwidth of the clock recovery circuit 120 by setting the parameter control circuit 110, so that the bandwidth parameter of the clock recovery circuit 120 can be adjusted according to the system environment temperature, the influence on the bandwidth characteristic of the clock recovery circuit 120 when the temperature is too high or too low is reduced, and further the clock recovery circuit 120 can correctly interpret the subsequent display data, so that the bandwidth adjustment of the clock recovery circuit 120 is no longer dependent on the data format of the input time sequence control data, and the overall working performance of the source driver 100 is improved.
In one embodiment, the bandwidth control signal includes any one of a first bandwidth control signal, a second bandwidth control signal, and a third bandwidth control signal.
When the system environment temperature is greater than the first preset temperature threshold and less than the second preset temperature threshold, the parameter control circuit 110 is configured to generate a first bandwidth control signal, and the clock recovery circuit 120 is further configured to keep the current bandwidth unchanged according to the first bandwidth control signal.
When the system environment temperature is greater than or equal to the second preset temperature threshold, the parameter control circuit 110 is configured to generate a second bandwidth control signal, and the clock recovery circuit 120 is further configured to adjust its bandwidth parameter according to the second bandwidth control signal to increase the current bandwidth.
When the system environment temperature is less than or equal to the first preset temperature threshold, the parameter control circuit 110 is configured to generate a third bandwidth control signal, and the clock recovery circuit 120 is further configured to adjust its bandwidth parameter according to the third bandwidth control signal to reduce the current bandwidth.
When the system environment temperature is greater than or equal to the second preset temperature threshold, the system environment temperature has a larger influence on the clock recovery circuit 120, and at this time, due to the excessively high temperature, the characteristics of each switching tube included in the clock recovery circuit 120 are slower, the corresponding bandwidth becomes smaller, and the clock recovery circuit 120 adjusts its bandwidth parameter according to the second bandwidth control signal to improve the current bandwidth, thereby reducing the influence of the system environment temperature on the bandwidth of the clock recovery circuit 120.
When the system environment temperature is less than or equal to the first preset temperature threshold, the parameter control circuit 110 is configured to generate a third bandwidth control signal and send the third bandwidth control signal to the clock recovery circuit 120, and the clock recovery circuit 120 is further configured to adjust its bandwidth parameter according to the third bandwidth control signal to reduce the current bandwidth.
When the system environment temperature is less than or equal to the first preset temperature threshold, the system environment temperature has a larger influence on the clock recovery circuit 120, and at this time, due to the lower temperature, the characteristics of each switching tube included in the clock recovery circuit 120 are faster, the corresponding bandwidth is slightly larger, and the clock recovery circuit 120 adjusts its bandwidth parameter according to the third bandwidth control signal to reduce the current bandwidth, thereby reducing the influence of the system environment temperature on the bandwidth of the clock recovery circuit 120.
In this embodiment, the influence of the system environment temperature on the clock recovery circuit 120 is divided into three phases by setting the first preset temperature threshold and the second preset temperature threshold respectively, so that the influence of the system environment temperature on the clock recovery circuit 120 is reduced based on the adjustment of the bandwidth parameters of the clock recovery circuit 120 by the parameter control circuit 110, and the correct analysis capability of the clock recovery circuit 120 is improved as a whole.
In one embodiment, as shown in fig. 1, the parameter control circuit 110 includes a bandgap voltage unit 112 and a comparison unit 114 electrically connected, and an output terminal of the comparison unit 114 is electrically connected to a clock recovery circuit 120.
The bandgap voltage unit 112 is configured to detect a system environment temperature, generate a corresponding negative temperature coefficient voltage signal, and send the negative temperature coefficient voltage signal to the comparison unit 114.
The bandgap voltage unit 112 is further configured to generate a first constant voltage signal and a second constant voltage signal, where the first constant voltage signal is smaller than the second constant voltage signal.
The comparing unit 114 is configured to compare the first constant voltage signal and the second constant voltage signal with the negative temperature coefficient voltage signal, respectively, and generate a first bandwidth control signal when the negative temperature coefficient voltage signal is greater than the first constant voltage signal and less than the second constant voltage signal.
The comparing unit 114 is further configured to generate a second bandwidth control signal when the negative temperature coefficient voltage signal is less than or equal to the first constant voltage signal.
The comparing unit 114 is further configured to generate a third bandwidth control signal when the negative temperature coefficient voltage signal is greater than or equal to the second constant voltage signal.
The voltage of the negative temperature coefficient voltage signal is linearly reduced along with the increase of the temperature of the system environment, when the temperature of the system environment increases to a first preset temperature threshold value, the negative temperature coefficient voltage signal is reduced to a second constant voltage signal, when the temperature of the system environment increases to a second preset temperature threshold value, the negative temperature coefficient voltage signal is reduced to a first constant voltage signal, in other words, the first constant voltage signal and the second constant voltage signal are respectively compared with the negative temperature coefficient voltage signal through the comparison unit 114, so that the change of the temperature of the system environment can be accurately judged.
As shown in FIG. 2, FIG. 2 is a negative temperature coefficient voltage signal V A Along with the change of the system ambient temperature T, the abscissa in fig. 2 is the system ambient temperature T, the ordinate is the voltage, and the curve V in fig. 2 A Representing the voltage signal variation of negative temperature coefficient, curve V 1 Curve V for a first constant voltage signal 2 Is a second constant voltage signal, T 1 For the first preset temperature threshold, T 2 Is a second preset temperature threshold.
In this embodiment, by matching the bandgap voltage unit 112 and the comparing unit 114, a corresponding bandwidth control signal can be accurately generated according to a change of a system environment temperature, after the clock recovery circuit 120 receives a feedback adjustment signal sent by the lock detector 310, the clock recovery circuit 120 starts to receive the bandwidth control signal sent by the parameter control circuit 110 according to the feedback adjustment signal, so that the clock recovery circuit 120 can adjust a bandwidth parameter according to the corresponding bandwidth control signal.
In one embodiment, the parameter control circuit 110 includes a bandgap voltage unit 112 and a comparison unit 114 electrically connected, and an output terminal of the comparison unit 114 is electrically connected to the clock recovery circuit 120.
The bandgap voltage unit 112 is configured to detect a system environment temperature, generate a corresponding positive temperature coefficient voltage signal, and send the positive temperature coefficient voltage signal to the comparison unit 114.
The bandgap voltage unit 112 is further configured to generate a first constant voltage signal and a second constant voltage signal, where the first constant voltage signal is smaller than the second constant voltage signal, the first constant voltage signal corresponds to a first preset temperature threshold, and the second constant voltage signal corresponds to a second preset temperature threshold.
The comparing unit 114 is configured to compare the first constant voltage signal and the second constant voltage signal with the positive temperature coefficient voltage signal, respectively, and generate a first bandwidth control signal when the positive temperature coefficient voltage signal is greater than the first constant voltage signal and less than the second constant voltage signal.
The comparing unit 114 is further configured to generate a second bandwidth control signal when the positive temperature coefficient voltage signal is greater than or equal to the second constant voltage signal.
The comparing unit 114 is further configured to generate a third bandwidth control signal when the positive temperature coefficient voltage signal is less than or equal to the first constant voltage signal.
The positive temperature coefficient voltage signal increases linearly with the increase of the temperature of the system environment, when the temperature of the system environment increases to a first preset temperature threshold, the positive temperature coefficient voltage signal increases to a first constant voltage signal, and when the temperature of the system environment increases to a second preset temperature threshold, the positive temperature coefficient voltage signal increases to a second constant voltage signal, in other words, the comparison unit 114 compares the first constant voltage signal and the second constant voltage signal with the positive temperature coefficient voltage signal, respectively, so that the change of the temperature of the system environment can be accurately determined.
As shown in FIG. 3, FIG. 3 shows a positive temperature coefficient voltage signal V B Along with the change of the system ambient temperature T, the abscissa in FIG. 3 is the system ambient temperature T, and the ordinate is the positive temperature coefficient voltage signal V B ，V 1 Is a first constant voltage signal, V 2 Is a second constant voltage signal, T 1 For the first preset temperature threshold, T 2 Is a second preset temperature threshold.
In this embodiment, by matching the bandgap voltage unit 112 and the comparing unit 114, a corresponding bandwidth control signal can be accurately generated according to a change of a system environment temperature, after the clock recovery circuit 120 receives a feedback adjustment signal sent by the lock detector 310, the clock recovery circuit 120 starts to receive the bandwidth control signal sent by the parameter control circuit 110 according to the feedback adjustment signal, so that the clock recovery circuit 120 can adjust a bandwidth parameter according to the corresponding bandwidth control signal.
In one embodiment, the comparison unit 114 includes a first comparator for comparing magnitudes of the first constant voltage signal and the negative temperature coefficient voltage signal and a second comparator for comparing magnitudes of the negative temperature coefficient voltage signal and the second constant voltage signal.
In one embodiment, the comparing unit 114 includes a third comparator for comparing magnitudes of the first constant voltage signal and the positive temperature coefficient voltage signal and a fourth comparator for comparing magnitudes of the positive temperature coefficient voltage signal and the second constant voltage signal.
In one embodiment, as shown in FIG. 4, the clock recovery circuit 120 includes a charge pump unit 140.
When the system environment temperature is greater than the first preset temperature threshold and less than the second preset temperature threshold, the charge pump unit 140 is configured to keep the self current unchanged according to the first bandwidth control signal.
When the system environment temperature is greater than or equal to the second preset temperature threshold, the charge pump unit 140 is configured to increase the self current according to the second bandwidth control signal.
When the system environment temperature is less than or equal to the first preset temperature threshold, the charge pump unit 140 is configured to reduce the self current according to the third bandwidth control signal.
In this embodiment, when the system environment temperature is greater than or equal to the second preset temperature threshold or when the system environment temperature is less than or equal to the first preset temperature threshold, the charge pump unit 140 correspondingly adjusts the current of itself, so that the overall bandwidth of the clock recovery circuit 120 correspondingly changes, thereby enabling the clock recovery circuit 120 to adjust the bandwidth parameter according to the corresponding bandwidth control signal, reducing the influence on the bandwidth characteristic of the clock recovery circuit 120 when the temperature is too high or too low, enabling the clock recovery circuit 120 to further correctly interpret the subsequent display data, and thus enabling the bandwidth adjustment of the clock recovery circuit 120 to be independent of the data format of the input time sequence control data, and improving the overall working performance of the source driver 100.
In one embodiment, as shown in FIG. 4, the clock recovery circuit 120 includes a low pass filter unit 150.
When the system environment temperature is greater than the first preset temperature threshold and less than the second preset temperature threshold, the low-pass filtering unit 150 is configured to keep its own parameters unchanged according to the first bandwidth control signal.
When the system environment temperature is greater than or equal to the second preset temperature threshold, the low-pass filtering unit 150 is configured to increase the resistance value or decrease the capacitance value according to the second bandwidth control signal.
When the system environment temperature is less than or equal to the first preset temperature threshold, the low-pass filtering unit 150 is configured to reduce the resistance value or increase the capacitance value of the self according to the third bandwidth control signal.
In this embodiment, when the system environment temperature is greater than or equal to the second preset temperature threshold or when the system environment temperature is less than or equal to the first preset temperature threshold, the low-pass filtering unit 150 correspondingly adjusts the capacitance value or the resistance value of itself, so that the overall bandwidth of the clock recovery circuit 120 correspondingly changes, thereby enabling the clock recovery circuit 120 to adjust the bandwidth parameter according to the corresponding bandwidth control signal, reducing the influence on the bandwidth characteristic of the clock recovery circuit 120 when the temperature is too high or too low, enabling the clock recovery circuit 120 to further correctly interpret the subsequent display data, so that the bandwidth adjustment of the clock recovery circuit 120 is no longer dependent on the data format of the input timing control data, and improving the overall working performance of the source driver 100.
In one embodiment, as shown in fig. 4, the source driver 100 may further include both the charge pump unit 140 and the low-pass filter unit 150.
When the system environment temperature is greater than the first preset temperature threshold and less than the second preset temperature threshold, the low-pass filtering unit 150 and the charge pump unit 140 are configured to keep their parameters unchanged according to the first bandwidth control signal.
When the system environment temperature is greater than or equal to the second preset temperature threshold, the low-pass filtering unit 150 is configured to increase the resistance value or decrease the capacitance value of itself according to the second bandwidth control signal, and the charge pump unit 140 is configured to increase the self current according to the second bandwidth control signal.
When the system environment temperature is less than or equal to the first preset temperature threshold, the low-pass filtering unit 150 is configured to reduce the resistance value or increase the capacitance value of itself according to the third bandwidth control signal, and the charge pump unit 140 is configured to reduce the self current according to the third bandwidth control signal.
In this embodiment, by adjusting the charge pump unit 140 and the low-pass filter unit 150 at the same time, the adjustment speed is further increased, so that the overall bandwidth of the clock recovery circuit 120 is correspondingly changed in time, so that the clock recovery circuit 120 can adjust the bandwidth parameter in time according to the corresponding bandwidth control signal, the influence on the bandwidth characteristic of the clock recovery circuit 120 when the temperature is too high or too low is reduced, the clock recovery circuit 120 can further correctly interpret the subsequent display data, and thus the bandwidth adjustment of the clock recovery circuit 120 is no longer dependent on the data format of the input time sequence control data, and the overall working performance of the source driver 100 is further improved.
In addition, as shown in fig. 5, a bandwidth adjustment method is further provided and applied to the source driver 100, wherein the source driver 100 includes a parameter control circuit 110, a clock recovery circuit 120 and a lock detector 130 electrically connected in sequence, and the bandwidth adjustment method includes:
step S210, receiving the external data signal, analyzing the external data signal to generate a clock signal and a training pattern data signal, and sending the clock signal and the training pattern data signal to the lock detector, so that the lock detector judges whether the frequency of the training pattern data signal is consistent with the frequency of the clock signal, and generates a feedback adjustment signal when the frequency of the training pattern data signal is consistent with the frequency of the clock signal.
Step S220, receiving a feedback adjustment signal sent by the lock detector.
Step S230, receiving the bandwidth control signal sent by the parameter control circuit according to the feedback adjustment signal.
Step S240, the self bandwidth is adjusted according to the bandwidth control signal.
In one embodiment, the bandwidth control signal includes any one of a first bandwidth control signal, a second bandwidth control signal, and a third bandwidth control signal.
When the system environment temperature is greater than the first preset temperature threshold and less than the second preset temperature threshold, the parameter control circuit 110 generates a first bandwidth control signal, and the clock recovery circuit 120 receives the first bandwidth control signal sent by the parameter control circuit 110 after receiving the feedback adjustment signal sent by the lock detector 130, and keeps the current bandwidth unchanged according to the first bandwidth control signal.
When the system environment temperature is greater than or equal to the second preset temperature threshold, the parameter control circuit generates a second bandwidth control signal and sends the second bandwidth control signal to the clock recovery circuit, the clock recovery circuit 120 receives the second bandwidth control signal sent by the parameter control circuit 110 after receiving the feedback adjustment signal sent by the lock detector 130, and the clock recovery circuit 120 adjusts its bandwidth parameter according to the second bandwidth control signal to increase the current bandwidth.
When the system environment temperature is less than or equal to the first preset temperature threshold, the parameter control circuit generates a third bandwidth control signal, the clock recovery circuit 120 starts to receive the third bandwidth control signal sent by the parameter control circuit 110 after receiving the feedback adjustment signal sent by the lock detector 130, and the clock recovery circuit 120 adjusts its bandwidth parameter according to the third bandwidth control signal to reduce the current bandwidth.
In addition, a display panel is provided, and the display panel includes the source driver 100.
That is, the foregoing embodiments are merely examples of the present application, and are not intended to limit the scope of the patent application, and all equivalent structures or equivalent processes using the descriptions and the contents of the present application, such as the combination of technical features of the embodiments, or direct or indirect application to other related technical fields, are included in the scope of the patent protection of the present application.
In addition, the present application may use the same or different reference numerals for structural elements having the same or similar characteristics. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more features. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
In this application, the term "for example" is used to mean "serving as an example, instance, or illustration. Any embodiment described herein as "for example" is not necessarily to be construed as preferred or advantageous over other embodiments. The previous description is provided to enable any person skilled in the art to make or use the present application. In the above description, various details are set forth for purposes of explanation.
It will be apparent to one of ordinary skill in the art that the present application may be practiced without these specific details. In other instances, well-known structures and processes have not been shown in detail to avoid unnecessarily obscuring the description of the present application. Thus, the present application is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.
Claims (10)
1. The source driver is characterized by comprising a parameter control circuit, a clock recovery circuit and a lock detector which are electrically connected in sequence;
the parameter control circuit is used for detecting the temperature of the system environment and generating a bandwidth control signal according to the temperature of the system environment;
the clock recovery circuit is used for receiving an external data signal, analyzing the external data signal to generate a clock signal and a training pattern data signal and sending the clock signal and the training pattern data signal to the lock detector;
the lock detector is used for judging whether the frequency of the training pattern data signal is consistent with the frequency of the clock signal, if so, generating a corresponding feedback adjustment signal and sending the feedback adjustment signal to the clock recovery circuit;
the clock recovery circuit is also used for receiving the bandwidth control signal sent by the parameter control circuit according to the feedback adjustment signal and adjusting the bandwidth of the clock recovery circuit according to the bandwidth control signal.
2. The source driver of claim 1, wherein the bandwidth control signal comprises any one of a first bandwidth control signal, a second bandwidth control signal, and a third bandwidth control signal;
when the system environment temperature is greater than a first preset temperature threshold and less than a second preset temperature threshold, the parameter control circuit is used for generating the first bandwidth control signal, and the clock recovery circuit is also used for keeping the current bandwidth unchanged according to the first bandwidth control signal;
when the system environment temperature is greater than or equal to the second preset temperature threshold, the parameter control circuit is used for generating the second bandwidth control signal, and the clock recovery circuit is also used for adjusting the bandwidth parameter of the clock recovery circuit according to the second bandwidth control signal so as to improve the current bandwidth;
when the system environment temperature is smaller than or equal to the first preset temperature threshold, the parameter control circuit is used for generating the third bandwidth control signal, and the clock recovery circuit is also used for adjusting the bandwidth parameter of the clock recovery circuit according to the third bandwidth control signal so as to reduce the current bandwidth.
3. The source driver according to claim 2, wherein the parameter control circuit comprises a bandgap voltage unit and a comparison unit electrically connected, an output end of the comparison unit being electrically connected to the clock recovery circuit;
the band gap voltage unit is used for detecting the environmental temperature of the system, generating a corresponding negative temperature coefficient voltage signal and sending the negative temperature coefficient voltage signal to the comparison unit;
the band gap voltage unit is further used for generating a first constant voltage signal and a second constant voltage signal, and the first constant voltage signal is smaller than the second constant voltage signal;
the comparing unit is used for comparing the first constant voltage signal and the second constant voltage signal with the negative temperature coefficient voltage signal respectively, and generating the first bandwidth control signal when the negative temperature coefficient voltage signal is larger than the first constant voltage signal and smaller than the second constant voltage signal;
the comparing unit is further configured to generate the second bandwidth control signal when the negative temperature coefficient voltage signal is less than or equal to the first constant voltage signal;
the comparing unit is further configured to generate the third bandwidth control signal when the negative temperature coefficient voltage signal is greater than or equal to the second constant voltage signal.
4. The source driver according to claim 2, wherein the parameter control circuit comprises a bandgap voltage unit and a comparison unit electrically connected, an output end of the comparison unit being electrically connected to the clock recovery circuit;
the band gap voltage unit is used for detecting the environmental temperature of the system, generating a corresponding positive temperature coefficient voltage signal and sending the positive temperature coefficient voltage signal to the comparison unit;
the band gap voltage unit is further used for generating a first constant voltage signal and a second constant voltage signal, and the first constant voltage signal is smaller than the second constant voltage signal;
the comparison unit is used for comparing the first constant voltage signal and the second constant voltage signal with the positive temperature coefficient voltage signal respectively, and generating the first bandwidth control signal when the positive temperature coefficient voltage signal is larger than the first constant voltage signal and smaller than the second constant voltage signal;
the comparing unit is further configured to generate the second bandwidth control signal when the ptc voltage signal is greater than or equal to the second constant voltage signal;
the comparing unit is further configured to generate the third bandwidth control signal when the ptc voltage signal is less than or equal to the first constant voltage signal.
5. A source driver according to claim 3, wherein the comparing unit comprises a first comparator for comparing magnitudes of the first constant voltage signal and the negative temperature coefficient voltage signal and a second comparator for comparing magnitudes of the negative temperature coefficient voltage signal and the second constant voltage signal.
6. The source driver according to claim 4, wherein the comparing unit includes a third comparator for comparing magnitudes of the first constant voltage signal and the positive temperature coefficient voltage signal and a fourth comparator for comparing magnitudes of the positive temperature coefficient voltage signal and the second constant voltage signal.
7. The source driver of claim 2, wherein the clock recovery circuit comprises a charge pump unit;
when the system environment temperature is greater than a first preset temperature threshold and less than a second preset temperature threshold, the charge pump unit is used for keeping the self current unchanged according to the first bandwidth control signal;
when the system environment temperature is greater than or equal to the second preset temperature threshold, the charge pump unit is used for increasing the self current according to the second bandwidth control signal;
and when the system environment temperature is less than or equal to the first preset temperature threshold, the charge pump unit is used for reducing the self current according to the third bandwidth control signal.
8. The source driver according to claim 2, wherein the clock recovery circuit includes a low-pass filter unit;
when the system environment temperature is greater than the first preset temperature threshold and less than the second preset temperature threshold, the low-pass filtering unit is used for keeping the parameters of the low-pass filtering unit unchanged according to the first bandwidth control signal;
when the system environment temperature is greater than or equal to the second preset temperature threshold, the low-pass filtering unit is used for increasing the resistance value or reducing the capacitance value of the low-pass filtering unit according to the second bandwidth control signal;
when the system environment temperature is smaller than or equal to the first preset temperature threshold, the low-pass filtering unit is used for reducing the resistance value or increasing the capacitance value of the low-pass filtering unit according to the third bandwidth control signal.
9. The bandwidth adjusting method is characterized by being applied to a source driver, wherein the source driver comprises a parameter control circuit, a clock recovery circuit and a lock detector which are electrically connected in sequence, and the bandwidth adjusting method comprises the following steps:
receiving an external data signal, analyzing the external data signal to generate a clock signal and a training pattern data signal, and sending the clock signal and the training pattern data signal to the lock detector, so that the lock detector judges whether the frequency of the training pattern data signal is consistent with the frequency of the clock signal or not and generates a feedback adjustment signal when the frequency of the training pattern data signal is consistent with the frequency of the clock signal;
receiving a feedback adjustment signal sent by the lock detector;
receiving a bandwidth control signal sent by the parameter control circuit according to the feedback adjustment signal, wherein the bandwidth control signal is generated by the parameter control circuit through detecting the temperature of the system environment temperature and according to the magnitude of the system environment temperature;
and adjusting the bandwidth of the self according to the bandwidth control signal.
10. A display panel comprising the source driver of any one of claims 1 to 8.
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| JP3990167B2 (en) * | 2002-03-04 | 2007-10-10 | Ｎｅｃ液晶テクノロジー株式会社 | Liquid crystal display device driving method and liquid crystal display device using the driving method |
| JP6430738B2 (en) * | 2014-07-14 | 2018-11-28 | シナプティクス・ジャパン合同会社 | CDR circuit and semiconductor device |
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