CN115885269A - 芯片及芯片封装 - Google Patents
芯片及芯片封装 Download PDFInfo
- Publication number
- CN115885269A CN115885269A CN202080103119.5A CN202080103119A CN115885269A CN 115885269 A CN115885269 A CN 115885269A CN 202080103119 A CN202080103119 A CN 202080103119A CN 115885269 A CN115885269 A CN 115885269A
- Authority
- CN
- China
- Prior art keywords
- chip
- buffer
- circuit
- input end
- output end
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
- G06F13/4072—Drivers or receivers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017509—Interface arrangements
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
本申请提供了一种芯片及芯片封装，涉及芯片互连技术领域，能够降低芯片互连接口的功耗和面积。该芯片包括芯片互连接口，芯片互连接口包括缓冲器；该缓冲器为标准单元；缓冲器的输出端和输入端中，一个与芯片有源面的连接部连接，另一个与芯片中的内部数字电路连接；该芯片有源面的连接部与外部的芯片连接。
Description
PCT国内申请，说明书已公开。
Claims (11)
- PCT国内申请，权利要求书已公开。
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2020/112590 WO2022041221A1 (zh) | 2020-08-31 | 2020-08-31 | 芯片及芯片封装 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115885269A true CN115885269A (zh) | 2023-03-31 |
Family
ID=80354372
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202080103119.5A Pending CN115885269A (zh) | 2020-08-31 | 2020-08-31 | 芯片及芯片封装 |
Country Status (3)
| Country | Link |
|---|---|
| EP (1) | EP4198752A4 (zh) |
| CN (1) | CN115885269A (zh) |
| WO (1) | WO2022041221A1 (zh) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115514704B (zh) * | 2022-07-18 | 2023-08-22 | 华为技术有限公司 | 一种通信芯片及数据交换装置、交换设备 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5880607A (en) * | 1996-05-01 | 1999-03-09 | Sun Microsystems, Inc. | Clock distribution network with modular buffers |
| US8736328B2 (en) * | 2011-12-22 | 2014-05-27 | Intel Corporation | Low power, jitter and latency clocking with common reference clock signals for on-package input/output interfaces |
| US9647668B2 (en) * | 2012-01-13 | 2017-05-09 | Altera Corporation | Apparatus for flexible electronic interfaces and associated methods |
| US9761533B2 (en) * | 2015-10-16 | 2017-09-12 | Xilinx, Inc. | Interposer-less stack die interconnect |
| CN109388826B (zh) * | 2017-08-09 | 2023-09-12 | 默升科技集团有限公司 | 使能2.5d器件级静态时序分析的管芯接口 |
-
2020
- 2020-08-31 EP EP20950890.2A patent/EP4198752A4/en active Pending
- 2020-08-31 WO PCT/CN2020/112590 patent/WO2022041221A1/zh unknown
- 2020-08-31 CN CN202080103119.5A patent/CN115885269A/zh active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| EP4198752A1 (en) | 2023-06-21 |
| EP4198752A4 (en) | 2023-09-20 |
| WO2022041221A1 (zh) | 2022-03-03 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |