CN115734464B - Thick film circuit substrate TR assembly and packaging method thereof - Google Patents

Thick film circuit substrate TR assembly and packaging method thereof Download PDF

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CN115734464B
CN115734464B CN202310017007.3A CN202310017007A CN115734464B CN 115734464 B CN115734464 B CN 115734464B CN 202310017007 A CN202310017007 A CN 202310017007A CN 115734464 B CN115734464 B CN 115734464B
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layer
circuit layer
area
metal
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CN115734464A (en
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王韧
王树庆
雍政
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Sichuan SIP Electronic Technology Co Ltd
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Sichuan SIP Electronic Technology Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00Reducing energy consumption in communication networks
    • Y02D30/70Reducing energy consumption in communication networks in wireless communication networks

Abstract

A thick film circuit substrate TR assembly and a packaging method thereof belong to the technical field of TR assemblies, the TR assembly comprises a circuit substrate in a packaging metal shell, and the circuit substrate comprises a first circuit layer, a second circuit layer, a third circuit layer, a fourth circuit layer, a power control layer and a bottom metal ground. Ceramic layers are arranged between the circuit layers. The first circuit layer is formed by a thick film process and is divided into an area A, an area E, an area H, an area I and an area J, and first metal holes communicated with the metal ground of the bottom layer are formed in the outer sides of the area A and the area H; the second circuit layer is formed by a thick film process and is provided with a zone B; the third circuit layer is formed by a thin film process and is provided with a C region and a G region, and a second metal hole communicated with the bottom metal ground is formed at the outer side of the G region; the fourth circuit layer is formed with a D region for a thin film process; the power supply control layer is used for power supply modulation and control circuit. The TR component can withstand higher voltage, higher power and higher current, and has high density, small volume and good heat dissipation function.

Description

Thick film circuit substrate TR assembly and packaging method thereof
Technical Field
The invention belongs to the technical field of TR (transmitter and receiver) components, and particularly relates to a thick film circuit substrate TR component and a packaging method thereof.
Background
Active phased array technology is now widely used in radar systems, electronic countermeasure, weapon precision guidance and communication technology. Particularly in the radar field, the active phased array radar has stronger multi-target reception capability, good anti-interference performance and higher reliability by virtue of the characteristic of sensitive and rapid beam pointing, and is important weapon equipment in the modern military field. In active phased array radar technology, the TR element plays a vital role. The TR element serves as the core component of the active phased array, each antenna element being fed by it, so that the number of elements in a radar system is tens of thousands. Therefore, whether to design a TR assembly with high performance, high reliability, and low cost will directly relate to the overall performance and manufacturing cost of the radar system. The inside of the component generally contains active devices such as a driving amplifier, a power amplifier, a low noise amplifier and the like, and passive devices such as a limiter, a circulator, an attenuator, a power distributor and the like, and the transceiver channel structure is optimized, and a proper chip is selected for composition, so that the optimal TR component can be obtained by processing under the premise of comprehensively considering technical risks, design period and design cost.
The traditional TR component is mainly realized by the following two structures: 1. in the brick type TR component structure, circuit components are distributed on a plane vertical to an antenna array feed port, and the radar complete machine belongs to a longitudinal integrated transverse assembly mode. Thus, the longitudinal direction is not limited by the half wavelength dimension, making the circuit design and micro-assembly of the TR assembly relatively simple. However, the disadvantage is that the integration level of the structure is not high, the section is high, and the occupied transverse area is large. 2. The tile type TR component structure is characterized in that a circuit design plane is parallel to an antenna array feed port through a transverse integration longitudinal assembly mode, so that the heat sink and the TR component lower shell are integrated integrally. The structure has the characteristics of being easy to form a conformal array surface, small in thermal resistance, short in heat dissipation path, free in expansion of heat sink thickness and the like, but has the defect of being incapable of meeting the severe working requirements of high frequency, miniaturization and integration.
Disclosure of Invention
In order to solve the defects in the prior art, the invention provides the thick film circuit substrate TR component and the packaging method thereof, wherein the TR component is integrated into the multilayer circuit board manufactured by adopting the thick film technology, can withstand higher voltage, higher power and higher current, and has high density, small volume and good heat dissipation function.
In order to achieve the object of the invention, the following scheme is adopted:
a thick film circuit substrate TR assembly comprising: the circuit substrate is packaged in a metal shell and comprises a first circuit layer, a second circuit layer, a third circuit layer, a fourth circuit layer, a power control layer and a bottom metal ground which are overlapped and sintered into an integrated structure, and all the layers of the circuit substrate are connected through metal conducting holes.
The ceramic layers are arranged between the adjacent first circuit layer, the second circuit layer, the third circuit layer, the fourth circuit layer, the power control layer and the bottom metal ground;
the first circuit layer is formed by adopting a thick film process and is a circuit layer of a microstrip line and a part of microwave monolithic integrated circuit chip; the first circuit layer is divided into an A area, an E area, an H area, an I area and a J area, wherein the A area is used for setting an output power amplifier, the E area is provided with a ring separator and a directional coupler, the H area is provided with an input power amplifier, the I area is provided with an antenna receiving unit, the J area is a radio frequency input port, and the outer sides of the A area and the H area are provided with first metal holes communicated with a bottom metal ground;
the second circuit layer is formed by adopting a thick film process, is divided into a B area and is used for setting a transceiving change-over switch circuit so as to control the transceiving state of the TR component;
the third circuit layer is formed by adopting a thin film process and is divided into a C area and a G area, the C area is provided with a phase shifter and a numerical control attenuator, the G area is provided with a down-conversion circuit, a low-noise amplifier and a limiter, and the outer side of the G area is provided with a second metal hole communicated with the bottom metal ground;
the fourth circuit layer is formed by adopting a thin film process and is divided into a D region for setting a radio frequency switch and an up-conversion circuit;
the power supply control layer is used for power supply modulation and control circuit.
Furthermore, on the projection view of the bottom surface of the circuit substrate, the circuits of the B area, the C area, the G area, the D area and the power control layer are all spaced from the A area, the H area and the first metal hole.
Further, the area a, the area H and the area G are respectively located at different corners in the projection view of the bottom surface of the circuit substrate.
Further, the first metal holes and the second metal holes are distributed on one side close to the edge of the circuit substrate.
Further, the ceramic layers below the first circuit layer and the third circuit layer are embedded with radiating blocks corresponding to the area A, the area H and the area G respectively, the radiating blocks have good heat conducting performance, the radiating blocks are respectively attached to the bottom surfaces of the corresponding first circuit layer and the corresponding third circuit layer, third metal holes are formed in the circuit substrate below the corresponding radiating blocks, and the third metal holes are downwards communicated with the bottom metal ground.
Further, the heat dissipation block is made of graphene.
Further, the ceramic layers below the first circuit layer and the third circuit layer comprise at least three layers of overlapped ceramic plates, and through holes are formed in positions, above the bottom layer, of the ceramic plates, corresponding to the positions where the radiating blocks are arranged, and the through holes are used for embedding the radiating blocks.
Further, the power control layer comprises a plurality of layers of circuits which are overlapped from top to bottom, each layer of circuit is formed on one ceramic plate, and each layer of circuit comprises a fifth circuit layer, a sixth circuit layer, a seventh circuit layer, an eighth circuit layer, a ninth circuit layer, a tenth circuit layer, an eleventh circuit layer and a twelfth circuit layer; wherein, the liquid crystal display device comprises a liquid crystal display device,
the fifth circuit layer adopts a thin film process to form a control branch circuit and is mainly used for regulating and controlling the phase change of the phase shifter;
the sixth circuit layer adopts a thin film process to form a branch circuit and is used for controlling the attenuation amplitude of an attenuator on the branch circuit;
the seventh circuit layer adopts a thin film process to form a control circuit for controlling the low-power switch chip to switch on and off a receiving channel of the TR component;
the eighth circuit layer is an intermediate metal ground and is formed by adopting a thin film process;
the ninth circuit layer is formed by adopting a thick film process, is a direct current power supply layer and supplies power to the output power amplifier by using a voltage-stabilizing direct current power supply;
the tenth circuit layer adopts a thick film process to form an amplifier direct current bias circuit, and provides stable direct current bias for the input power amplifier;
the eleventh circuit layer adopts a thick film process to form a low-noise direct current bias circuit, and provides stable direct current bias for the low-noise discharge circuit;
the twelfth circuit layer is formed by adopting a thick film process and is a digital control signal layer for realizing signal control.
A TR assembly packaging method is used for forming the thick film circuit substrate TR assembly and comprises the following steps:
s1: providing a plurality of ceramic layers, and forming a first circuit layer, a second circuit layer, a third circuit layer, a fourth circuit layer, a power control layer and a bottom metal land on the top surfaces of the different ceramic layers by adopting thick film or thin film processes respectively;
s2: performing high-frequency electromagnetic simulation software calculation on the first circuit layer and the third circuit layer to respectively determine the ranges of the A area, the H area and the G area, and making range identifications;
s3: overlapping and drilling, namely overlapping a bottom metal ground, a power supply control layer, a fourth circuit layer and a third circuit layer in sequence from bottom to top, drilling a bottom hole for forming a second metal hole corresponding to the outer side of the determined G region, continuously overlapping the second circuit layer and the first metal hole upwards, and drilling a bottom hole for forming the first metal hole corresponding to the outer sides of the determined A region and the determined H region;
s4: electroplating or copper deposition is carried out on the first metal hole and the second metal hole so as to form a metal hole with a metal inner wall;
s5: sintering, namely sintering the first circuit layer, the second circuit layer, the third circuit layer, the fourth circuit layer, the power control layer and the bottom layer into a circuit substrate with an integrated structure through high temperature;
s6: and packaging, namely assembling the circuit substrate in a metal shell, and assembling the connecting port to complete packaging of the TR assembly.
The invention has the beneficial effects that:
(1) The TR component substrate adopts a multilayer circuit structure to realize miniaturization and integration;
(2) The circuit substrate adopts a thick film or thin film process, and a ceramic substrate with high dielectric constant is used, so that the circuit substrate has good heat resistance and can bear high-temperature cofiring invariance;
(3) The positions of all the electrical elements and the circuits are reasonably distributed, and metal holes are arranged on the periphery and the bottom of the high-heating area, so that heat is quickly conducted to the metal shell, and quick heat dissipation is realized; and through optimizing the typesetting structure, each functional area is formed, so that the signal crosstalk problem is well solved, and the electromagnetic shielding effect is realized;
(4) The transmitting branch, the receiving branch, the direct current power supply layer and the control circuit of the digital logic part are respectively arranged on different layers, so that good isolation is realized.
Drawings
The drawings described herein are for illustration of selected embodiments only and not all possible implementations, and are not intended to limit the scope of the invention.
Fig. 1 shows a schematic configuration of a circuit substrate of the present application.
Fig. 2 shows a schematic layout of the areas on the bottom projection view of the circuit substrate.
Fig. 3 shows a partial schematic view of a heat sink arrangement.
Fig. 4 shows a functional block diagram of the TR assembly.
The marks in the figure: the circuit comprises a first circuit layer-1, a first metal hole-11, a second circuit layer-2, a third circuit layer-3, a second metal hole-31, a fourth circuit layer-4, a power control layer-5, a fifth circuit layer-51, a sixth circuit layer-52, a seventh circuit layer-53, an eighth circuit layer-54, a ninth circuit layer-55, a tenth circuit layer-56, an eleventh circuit layer-57, a twelfth circuit layer-58, a bottom metal ground-6, a heat dissipation block-7, a third metal hole-71 and a ceramic chip-72.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the following detailed description of the embodiments of the present invention will be given with reference to the accompanying drawings, but the described embodiments of the present invention are some, but not all embodiments of the present invention.
Example 1
As shown in fig. 1 and 2, a thick film circuit substrate TR assembly includes: the circuit substrate is packaged in a metal shell and comprises a first circuit layer 1, a second circuit layer 2, a third circuit layer 3, a fourth circuit layer 4, a power control layer 5 and a bottom metal ground 6 which are overlapped and sintered into an integrated structure, and all layers of the circuit substrate are connected through metal via holes.
The first circuit layer 1, the second circuit layer 2, the third circuit layer 3, the fourth circuit layer 4, the power control layer 5 and the bottom metal ground 6 are all provided with ceramic layers between two adjacent layers.
The first circuit layer 1 is formed by adopting a thick film process, is a circuit layer of a microstrip line and a part of microwave monolithic integrated circuit chip, and is formed by bonding gold wires in a connection mode between a power amplifier and a limiter and the circuit; the first circuit layer 1 is divided into an A area, an E area, an H area, an I area and a J area, wherein the A area is provided with an output power amplifier, the E area is provided with a ring separator and a directional coupler, the thickness of the two devices is far higher than that of a radio frequency chip, so that radio frequency signals are transmitted to an antenna end radio frequency end of a TR component, the H area is provided with an input power amplifier, the I area is provided with an antenna receiving unit, the J area is a radio frequency input port, and a large amount of heat can be emitted when the output power amplifier and the input power amplifier work, so that the outer sides of the A area and the H area are provided with a first metal hole 11 communicated with a bottom metal ground 6, the heat is emitted to the bottom metal ground 6, the heat is directly transmitted to a metal shell through the bottom metal ground 6, the bottom metal ground 6 is directly attached to the metal shell, and can accelerate heat emission, and the first metal hole 11 downwards penetrates through the second circuit layer 2, the third circuit layer 3, the fourth circuit layer 4 and the power supply control layer 5 until the first metal hole is communicated with the bottom metal ground 6;
the second circuit layer 2 is formed by adopting a thick film process, is divided into a B area, and is provided with a receiving and transmitting change-over switch circuit so as to control the receiving and transmitting state of the TR component;
the third circuit layer 3 is formed by adopting a thin film process and is divided into a C area and a G area, the C area is provided with a phase shifter and a numerical control attenuator, the G area is provided with a down-conversion circuit and a low-noise amplifier and a limiter, because the circuit of the G can emit a large amount of heat when working, the outer side of the G area is provided with a second metal hole 31 communicated with the bottom metal ground 6 for emitting the heat to the bottom metal ground 6, the heat is directly transferred to the metal shell through the bottom metal ground 6, the bottom metal ground 6 is directly attached to the metal shell, the heat emission can be accelerated, and the second metal hole 31 downwards penetrates through the fourth circuit layer 4 and the power control layer 5 until the second metal hole is communicated with the bottom metal ground 6;
the fourth circuit layer 4 is formed by adopting a thin film process, and is divided into a D region, and a radio frequency switch and an up-conversion circuit are arranged on the D region;
the power control layer 5 is used for power modulation and control circuits. The power control layer 5 includes a plurality of layers of circuits stacked from top to bottom, each layer of circuits being formed on one ceramic board, the plurality of layers of circuits including a fifth wiring layer 51, a sixth wiring layer 52, a seventh wiring layer 53, an eighth wiring layer 54, a ninth wiring layer 55, a tenth wiring layer 56, an eleventh wiring layer 57, a twelfth wiring layer 58; wherein, the liquid crystal display device comprises a liquid crystal display device,
the fifth circuit layer 51 forms a control branch circuit by adopting a thin film process and is mainly used for regulating and controlling the phase change of the phase shifter; the sixth circuit layer 52 forms a branch circuit by adopting a thin film process and is used for controlling the attenuation amplitude of the numerical control attenuator on the branch circuit; the seventh circuit layer 53 adopts a thin film technology to form a control circuit for controlling the low-power switch chip to switch on and off the receiving channel of the TR component; the eighth circuit layer 54 is an intermediate metal ground, and is formed by a thin film process; the ninth circuit layer 55 is formed by a thick film process, and is a direct current power supply layer, and a regulated direct current power supply is used for supplying power to the output power amplifier; the tenth circuit layer 56 forms an amplifier dc bias circuit by a thick film process to provide a stable dc bias for the input power amplifier; the eleventh circuit layer 57 forms a low-noise dc bias circuit by using a thick film process, and provides stable dc bias for low-noise amplification; the twelfth wiring layer 58 is formed using a thick film process and is a digital control signal layer for implementing signal control, such as a clock of a digital transceiver system, to digitally control the amplitude and phase of the cell circuit signals so that the antenna beam performs a specific scanning function.
The line width and the gap processed by the traditional thick film technology are in the grade of +/-10 microns, and the thin film processing technology can reach the grade of +/-0.5 microns; for example, the processing precision of the width between metal wires of the lange bridge is required to be less than or equal to 0.5 micrometers, if an integrated circuit is to be realized, a thin film integrated circuit design process is required to be selected, and the processing precision of the line width and the gap of the thin film integrated circuit is far greater than that of a thick film integrated circuit, but the corresponding processing cost is also greatly higher than that of the thick film integrated circuit. The fine control circuit is mainly arranged on the circuit layer in the middle, so that a thin film technology is adopted; other layers are not involved in fine circuit design and thick film technology is employed for cost reduction.
As shown in fig. 4, the TR module of the present invention mainly comprises a transmitting branch, a receiving branch, a dc power supply layer, and a control circuit of a digital logic part. The transmitting branch circuit finishes the phase shifting and attenuation of the input radio frequency signal, amplifies the input signal to the power required by the index, receives the weak signal from the radiation unit of the antenna, amplifies the weak signal by the single-pole double-throw switch and the limiter, adjusts the amplitude and the phase by the digital attenuator and the digital phase shifter after amplifying the weak signal by the low-noise amplifier, and finally outputs the weak signal to the data processing. The receiving branch and the transmitting branch both adopt digital phase shifters to realize the phase shifting function.
The circuit can be made into a multilayer three-dimensional structure by adopting a multilayer circuit structure formed by thick and thin film processes, wherein the dielectric plate adopts a co-fired ceramic substrate with high dielectric constant, and the size can be remarkably reduced.
The transmitting branch, the receiving branch, the direct current power supply layer and the control circuit of the digital logic part are respectively arranged on different layers and sintered together, so that the high-integration modularization is realized, and meanwhile, the rapid processing design can be realized aiming at different working frequency bands and functions.
By optimizing the typesetting structure, each region is formed, the crosstalk among radio frequency, low frequency and direct current signals can be effectively eliminated, the electromagnetic compatibility problem of single board integration is solved, and a good electromagnetic shielding effect is realized.
Preferably, as shown in fig. 2, on the projection view of the bottom surface of the circuit substrate, the B region, the C region, the G region, the D region, and the circuits of the power control layer 5 are spaced from the a region, the H region, and the first metal hole 11, so as to prevent signal crosstalk and improve electromagnetic shielding effect.
Preferably, as shown in fig. 2, the area a, the area H and the area G are respectively located at different corners in the projection view of the bottom surface of the circuit substrate, so as to avoid heat concentration, and simultaneously facilitate heat dissipation from adjacent side walls at the corners of the metal housing, thereby further accelerating heat dissipation efficiency.
Further preferably, as shown in fig. 2, the first metal holes 11 and the second metal holes 31 are distributed on one side close to the edge of the circuit substrate, so that the first metal holes 11 and the second metal holes 31 can transfer a part of heat downwards and simultaneously transfer the heat to the side surface of the circuit substrate, thereby improving the heat dissipation effect.
Preferably, as shown in fig. 1 and 3, the ceramic layers below the first circuit layer 1 and the third circuit layer 3 are embedded with heat dissipation blocks 7 respectively corresponding to the region a, the region H and the region G, the heat dissipation blocks 7 have good heat conduction performance, the heat dissipation blocks 7 are respectively attached to the bottom surfaces of the corresponding first circuit layer 1 and the corresponding third circuit layer 3, so as to realize heat conduction, third metal holes 71 are formed below the circuit substrate corresponding to the heat dissipation blocks 7, the third metal holes 71 are downwards communicated with the bottom metal ground 6, so that heat absorbed by the heat dissipation blocks 7 can be quickly transferred to the bottom metal ground 6 through the third metal holes 71, and heat is processed through the bottom metal ground 6 to be transferred to the metal shell.
Further preferably, the heat dissipation block 7 is made of graphene.
More specifically, as shown in fig. 3, the ceramic layers below the first circuit layer 1 and the third circuit layer 3 include at least three laminated ceramic plates 72, and through holes are formed at positions above the bottom layer of the ceramic plates 72 corresponding to the positions where the heat dissipation blocks 7 are arranged for embedding the heat dissipation blocks 7, and since the thickness of the ceramic plates is usually 0.5mm to 3mm, in order to increase the volume of the heat dissipation blocks 7 and increase the heat capacity, multiple laminated ceramic plates are required to accommodate the heat dissipation blocks 7.
Example 2
A TR assembly packaging method is used for forming the thick film circuit substrate TR assembly and comprises the following steps:
s1: providing a plurality of ceramic layers, and forming a first circuit layer 1, a second circuit layer 2, a third circuit layer 3, a fourth circuit layer 4, a power control layer 5 and a bottom metal land 6 on the top surfaces of the different ceramic layers by adopting a thick film or thin film process respectively;
s2: performing high-frequency electromagnetic simulation software calculation on the first circuit layer 1 and the third circuit layer 3 to respectively determine the ranges of the area A, the area H and the area G, and making range identifications;
s3: overlapping and drilling, namely overlapping a bottom metal ground 6, a power control layer 5, a fourth circuit layer 4 and a third circuit layer 3 in sequence from bottom to top, drilling a bottom hole for forming a second metal hole 31 corresponding to the outer side of the determined G region, continuously overlapping the second circuit layer 2 and the first metal hole 11 upwards, and drilling a bottom hole for forming the first metal hole 11 corresponding to the outer sides of the determined A region and the determined H region;
s4: electroplating or copper deposition is carried out on the first metal hole 11 and the second metal hole 31 so as to form a metal hole with a metal inner wall;
s5: sintering, namely sintering the first circuit layer 1, the second circuit layer 2, the third circuit layer 3, the fourth circuit layer 4, the power supply control layer 5 and the bottom metal land 6 into a circuit substrate with an integrated structure at high temperature;
s6: and packaging, namely assembling the circuit substrate in a metal shell, and assembling the connecting port to complete packaging of the TR assembly.
The foregoing description of the preferred embodiments of the invention is merely exemplary and is not intended to be exhaustive or limiting of the invention. It will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the invention.

Claims (9)

1. A thick film circuit substrate TR assembly, comprising: the circuit board is packaged in a metal shell and comprises a first circuit layer (1), a second circuit layer (2), a third circuit layer (3), a fourth circuit layer (4), a power control layer (5) and a bottom metal ground (6), wherein the first circuit layer, the second circuit layer, the third circuit layer, the fourth circuit layer (4), the power control layer (5) and the bottom metal ground (6) are overlapped and sintered into an integrated structure, all the layers of the circuit board are connected through metal through holes, and a ceramic layer is arranged between every two adjacent layers;
the first circuit layer (1) is formed by adopting a thick film process and is used as a circuit layer of a microstrip line and a part of microwave monolithic integrated circuit chip; the first circuit layer (1) is divided into an area A, an area E, an area H, an area I and an area J, wherein the area A is provided with an output power amplifier, the area E is provided with a ring separator and a directional coupler, the area H is provided with an input power amplifier, the area I is provided with an antenna receiving unit, the area J is a radio frequency input port, and the outer sides of the area A and the area H are provided with first metal holes (11) communicated with a bottom metal ground (6);
the second circuit layer (2) is formed by adopting a thick film process, is divided into a B area, and is provided with a transceiver change-over switch circuit for controlling the transceiver state of the TR component;
the third circuit layer (3) is formed by adopting a thin film process, and is divided into a C area and a G area, wherein the C area is provided with a phase shifter and a numerical control attenuator, the G area is provided with a down-conversion circuit, a low-noise amplifier and a limiter, and the outer side of the G area is provided with a second metal hole (31) communicated with a bottom metal ground (6);
the fourth circuit layer (4) is formed by adopting a thin film process, is divided into a D region and is provided with a radio frequency switch and an up-conversion circuit;
the power supply control layer (5) is used for a power supply modulation and control circuit.
2. A thick film circuit substrate TR assembly as claimed in claim 1 wherein the circuits of the B, C, G, D and power control layers (5) are spaced from the a, H and first metal holes (11) in a projection view of the bottom surface of the circuit substrate.
3. The TR assembly of claim 1, wherein the a region, the H region, and the G region are located at different corners in a projection view of the bottom surface of the circuit substrate.
4. A thick film circuit substrate TR assembly as claimed in claim 1 wherein the first metal holes (11) and the second metal holes (31) are each distributed on a side close to the edge of the circuit substrate.
5. The thick-film circuit substrate TR assembly of claim 1, wherein the ceramic layers below the first circuit layer (1) and the third circuit layer (3) are embedded with heat dissipation blocks (7) respectively corresponding to the a region, the H region and the G region, the heat dissipation blocks (7) are attached to the bottom surfaces of the corresponding first circuit layer (1) and third circuit layer (3) respectively, third metal holes (71) are formed below the circuit substrate corresponding to the heat dissipation blocks (7), and the third metal holes (71) are downwards communicated with the bottom metal ground (6).
6. A thick-film circuit substrate TR assembly as claimed in claim 5 wherein the heat sink (7) is made of graphene.
7. The TR assembly of claim 5, wherein the ceramic layers below the first circuit layer (1) and the third circuit layer (3) include at least three laminated ceramic plates (72), and through holes are formed at positions of the ceramic plates (72) above the bottom layer corresponding to the heat dissipation blocks (7) for embedding the heat dissipation blocks (7).
8. A thick film circuit substrate TR assembly as claimed in claim 1, wherein the power supply control layer (5) comprises a plurality of layers of circuits stacked from top to bottom, each layer of circuits being formed on one ceramic board, the plurality of layers of circuits comprising a fifth wiring layer (51), a sixth wiring layer (52), a seventh wiring layer (53), an eighth wiring layer (54), a ninth wiring layer (55), a tenth wiring layer (56), an eleventh wiring layer (57), a twelfth wiring layer (58); wherein, the liquid crystal display device comprises a liquid crystal display device,
the fifth circuit layer (51) adopts a thin film process to form a control branch circuit and is mainly used for regulating and controlling the phase change of the phase shifter;
a sixth circuit layer (52) adopts a thin film process to form a branch circuit and is used for controlling the attenuation amplitude of the numerical control attenuator on the branch circuit;
a seventh circuit layer (53) adopts a thin film technology to form a control circuit for controlling the low-power switch chip to switch on and off a receiving channel of the TR component;
the eighth circuit layer (54) is an intermediate metal ground and is formed by adopting a thin film process;
a ninth circuit layer (55) is formed by adopting a thick film process, is a direct current power supply layer and supplies power to the output power amplifier by using a voltage-stabilizing direct current power supply;
a tenth circuit layer (56) adopts a thick film process to form an amplifier direct current bias circuit, and provides stable direct current bias for an input power amplifier;
an eleventh circuit layer (57) adopts a thick film process to form a low-noise direct current bias circuit, and provides stable direct current bias for low-noise amplification;
the twelfth wiring layer (58) is formed by a thick film process and is a digital control signal layer for signal control.
9. A TR assembly packaging method for forming the thick film circuit substrate TR assembly according to any one of claims 1 to 8, comprising the steps of:
s1: providing a plurality of ceramic layers, and forming a first circuit layer (1), a second circuit layer (2), a third circuit layer (3), a fourth circuit layer (4), a power supply control layer (5) and a bottom metal ground (6) on the top surfaces of the different ceramic layers by adopting thick film or thin film processes respectively;
s2: performing high-frequency electromagnetic simulation software calculation on the first circuit layer (1) and the third circuit layer (3) to respectively determine the ranges of the area A, the area H and the area G, and making range identifications;
s3: overlapping and drilling, namely overlapping a bottom metal ground (6), a power supply control layer (5) and a fourth circuit layer (4) to a third circuit layer (3) sequentially from bottom to top, drilling a bottom hole for forming a second metal hole (31) corresponding to the outer side of a determined G region, continuously overlapping the second circuit layer (2) and a first metal hole (11) upwards, and drilling a bottom hole for forming the first metal hole (11) corresponding to the outer sides of a determined A region and a determined H region;
s4: electroplating or copper deposition is carried out on the first metal hole (11) and the second metal hole (31) so as to form a metal hole with a metal inner wall;
s5: sintering, namely sintering the circuit substrate with the integrated structure by a high Wen Jiangdi circuit layer (1), a second circuit layer (2), a third circuit layer (3), a fourth circuit layer (4), a power supply control layer (5) and a bottom metal ground (6);
s6: and packaging, namely assembling the circuit substrate in a metal shell, and assembling the connecting port to complete packaging of the TR assembly.
CN202310017007.3A 2023-01-06 2023-01-06 Thick film circuit substrate TR assembly and packaging method thereof Active CN115734464B (en)

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