CN115568112A - Through hole processing method for specified layer copper plating disconnection and PCB - Google Patents

Through hole processing method for specified layer copper plating disconnection and PCB Download PDF

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Publication number
CN115568112A
CN115568112A CN202211254866.6A CN202211254866A CN115568112A CN 115568112 A CN115568112 A CN 115568112A CN 202211254866 A CN202211254866 A CN 202211254866A CN 115568112 A CN115568112 A CN 115568112A
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CN
China
Prior art keywords
via hole
hole
layer
copper
wall
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Pending
Application number
CN202211254866.6A
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Chinese (zh)
Inventor
焦其正
王小平
张志远
张勇
承良浩
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Shengyi Electronics Co Ltd
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Shengyi Electronics Co Ltd
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Publication date
Application filed by Shengyi Electronics Co Ltd filed Critical Shengyi Electronics Co Ltd
Priority to CN202211254866.6A priority Critical patent/CN115568112A/en
Publication of CN115568112A publication Critical patent/CN115568112A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/423Plated through-holes or plated via connections characterised by electroplating method
    • H05K3/424Plated through-holes or plated via connections characterised by electroplating method by direct electroplating
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02Electroplating of selected surface areas
    • C25D5/022Electroplating of selected surface areas using masking means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • H05K1/116Lands, clearance holes or other lay-out details concerning the surrounding of a via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

The invention discloses a via hole processing method for breaking copper plating of a designated layer and a PCB (printed Circuit Board), wherein the method comprises the following steps: manufacturing ink with full light absorption characteristics on a first core board positioned on a specified layer in a preset area of the upper board surface and the lower board surface of the first core board according to a preset lamination sequence; stacking the first core board and other core boards forming the PCB according to a preset sequence, and then laminating to form a multilayer board; drilling holes at preset positions on the multilayer board to form via holes with unmetallized hole walls, wherein ink is left on the peripheries of hole sections of the via holes positioned on the appointed layers; spraying photosensitive coating on the wall of the via hole, wherein the photosensitive coating is mixed coating of photosensitive resin and conductive particles; carrying out exposure treatment on the wall of the via hole; removing unexposed photosensitive coating in the wall of the via hole; sequentially carrying out copper deposition and electroplating treatment on the multilayer board to form a via hole disconnected by the designated layer of copper plating; the manufacturing method is simple and reliable, special flow processing is not needed, the hole wall of the normal position cannot be damaged, and the qualified rate of hole copper disconnection is high.

Description

Through hole processing method for specified layer copper plating disconnection and PCB
Technical Field
The invention relates to the technical field of PCB manufacturing, in particular to a via hole processing method for copper plating disconnection of a designated layer and a PCB.
Background
In the PCB manufacturing process, a designated layer copper plating disconnection technology is involved, at present, three technologies are mainly used for realizing designated layer copper plating disconnection, the first technology is realized by adopting a special material, the designated layer cannot be subjected to copper deposition and electroplating procedures through the material, the second technology is realized by treating an activating agent in a chemical copper deposition process, and the third technology is realized by carrying out decoiling treatment after copper deposition, so that a copper deposition layer of a designated layer of a hole wall is removed. The three techniques described above have the following drawbacks: the method has high requirements on material characteristics, is special in treatment mode, has influence on normal copper treatment, can cause normal hole copper to fall off and no copper in serious cases, seriously influences the conductivity of a hole wall copper plating layer, and greatly limits popularization and application of specified layer copper plating disconnection.
Disclosure of Invention
The invention aims to provide a via hole processing method for specified layer copper plating disconnection and a PCB (printed Circuit Board), wherein the manufacturing method is simple and reliable, special flow processing is not needed, the hole wall of a normal position cannot be damaged, and the qualified rate of hole copper disconnection is high.
In order to achieve the purpose, the invention discloses a via hole processing method for specified layer copper plating disconnection, which comprises the following steps:
s1, manufacturing ink with full light absorption characteristics in preset areas on the upper surface and the lower surface of a first core board positioned on a specified layer according to a preset lamination sequence, wherein the preset areas correspond to drilling positions of through holes to be processed, and the specified layer is a pre-specified hole wall copper layer breaking position of the through holes to be processed;
s2, stacking the first core board and other core boards forming the PCB according to a preset sequence, and then pressing to form a multilayer board;
s3, drilling holes at preset positions on the multilayer board to form through holes with unmetallized hole walls, wherein the ink is left on the peripheries of hole sections of the through holes, which are located on the appointed layer;
s4, spraying a photosensitive coating on the wall of the via hole, wherein the photosensitive coating is a mixed coating of photosensitive resin and conductive particles;
s5, exposing the hole wall of the via hole;
s6, removing unexposed photosensitive coating in the wall of the via hole;
and S7, sequentially carrying out copper deposition and electroplating treatment on the multilayer board to form a via hole with broken copper plating of the specified layer.
Preferably, the ink is a resin that is photocurable and developable in an alkaline solution, or the ink is a resin that is thermally curable and to which a fully light absorbing material is added and uniformly dispersed.
Specifically, the total light absorption material is carbon black or carbon nanotubes.
Preferably, the step S1 further includes, before:
s101, conducting pattern manufacturing on the first core plate, forming a through hole copper block at a drilling position of a through hole to be processed of the first core plate, and arranging the printing ink on the through hole copper block.
Preferably, the projection of the ink along the lamination direction falls into the projection of the through-hole copper block along the lamination direction.
Preferably, the thickness of the ink is between 30 μm and 100 μm.
Preferably, the step S5 specifically includes:
s51, extending the top end of the optical fiber into the via hole so that a light source which is emitted into the optical fiber vertically irradiates the wall of the via hole.
Preferably, a tangent plane arranged at an included angle of 45 degrees is formed at the top end of the optical fiber, the light source is vertically emitted into the optical fiber from the bottom end of the optical fiber, is transmitted along the length direction of the optical fiber, and vertically irradiates the wall of the via hole after the reflection of the tangent plane.
Preferably, the optical fiber is extended into the via hole along the length direction thereof in a high speed rotation manner.
Preferably, the step S6 specifically includes:
s61, soaking the multilayer board in an alkaline solution to remove the unexposed photosensitive coating in the hole wall of the via hole.
Preferably, the step S7 specifically includes:
s71, immersing the multilayer board into chemical copper deposition chemical liquid to enable the exposed photosensitive material in the hole wall of the via hole to deposit a thin conductive compact copper layer;
and S72, carrying out electroplating treatment on the multilayer board to form electroplated copper on the compact copper layer in the hole wall of the via hole, so as to form the via hole with broken copper plating of the specified layer.
Correspondingly, the invention also discloses a PCB which comprises at least one through hole with the hole wall and the copper layer disconnected at a specified layer, and the through hole is manufactured according to the method.
Compared with the prior art, the method has the advantages that the ink with the full light absorption characteristic is manufactured in the preset areas of the upper plate surface and the lower plate surface of the first core plate, the photosensitive coating is sprayed on the hole wall of the via hole, the photosensitive coating except for the appointed layer of the hole wall of the via hole is exposed through exposure treatment of the hole wall of the via hole, the unexposed photosensitive coating is removed, copper deposition and electroplating treatment are carried out on the multilayer plate, and the via hole with the disconnected appointed layer of copper plating is formed.
Drawings
FIG. 1 is a flow chart of a via processing method of the present invention specifying layer copper plating break;
FIG. 2 is a schematic structural diagram of the first core plate after the through-hole copper block is formed;
FIG. 3 is a schematic view of the ink of FIG. 2 after ink preparation;
FIG. 4 is a schematic structural view of a multilayer sheet of the present invention;
FIG. 5 is a schematic diagram of the structure of the multi-layer board of the present invention after via hole fabrication;
FIG. 6 is a schematic diagram of the structure of FIG. 5 after photo-sensitive coating is applied to the via wall;
FIG. 7 is a schematic diagram of the structure of an optical fiber of the present invention;
FIG. 8 is a schematic view of a multilayer sheet of the present invention after optical fibers have been extended into the walls of the vias to produce a photosensitive coating;
FIG. 9 is a schematic representation of the structure of a multilayer board of the present invention after exposure of the photosensitive coating of the via walls;
fig. 10 is a schematic view of the unexposed photosensitive coating material of fig. 9 after removal.
Detailed Description
In order to explain the technical contents, structural features, objects and effects of the present invention in detail, the following description is made in conjunction with the embodiments and the accompanying drawings.
Referring to fig. 1 to 10, the PCB of the present embodiment includes at least one via hole 4 with a hole wall and a copper layer broken at a designated layer, the via hole 4 is manufactured by a via hole processing method with a copper plating broken at the designated layer, and the via hole processing method with the copper plating broken at the designated layer includes the following steps:
s1, manufacturing ink 3 with full light absorption characteristics in preset areas of upper and lower plate surfaces of a first core plate 1 on a specified layer according to a preset lamination sequence, wherein the ink 3 is shown in figure 3. The preset area corresponds to the drilling position of the via hole 4 to be processed, and the specified layer is a pre-specified hole wall copper layer breaking position of the via hole 4 to be processed.
It can be understood that, before the ink 3 is manufactured, at least one core board is selected from the core boards to be manufactured to form the PCB as the first core board 1 according to the position of the specified layer, that is, the specified layer may be formed by a single core board or by multiple core boards, and under the condition that the number of the core boards and the stacking position included in the first core board 1 are ensured to correspond to the specified layer, the number of the core boards and the stacking position included in the first core board 1 may be set according to actual requirements, which is not limited herein.
In addition, in actual operation, the manufacturing area of the ink 3 of each first core plate 1 needs to be reasonably set according to the number of the through holes 4 to be processed and the drilling position. In order to ensure the processing quality of the through holes 4, the area of each ink 3 manufacturing area must be larger than the cross-sectional area of the corresponding through hole 4 to be processed. The ink 3 can be made by a conventional solder mask screen printing process, but can be made by other methods such as spraying, printing, etc.
Preferably, the ink 3 is a resin that is light-curable and developable in an alkaline solution, or the ink 3 is a resin that is heat-curable and to which a total light absorbing material, specifically, carbon black or carbon nanotubes, is added and uniformly dispersed. The above type of ink 3 has good light absorption properties and is suitable for the following steps.
S2, stacking the first core board 1 and other core boards forming the PCB according to a preset sequence, and then pressing to form a multilayer board, as shown in FIG. 4.
It can be understood that, before lamination, the first core board 1 and other core boards are required to be respectively subjected to corresponding inner layer circuit pattern fabrication. Specifically, for the first core board 1, the step S1 further includes:
s101, making a pattern on the first core board 1, forming a through hole copper block 2 at a drilling position of a through hole 4 to be processed of the first core board 1, and arranging the ink 3 on the through hole copper block 2, as shown in fig. 2. Specifically, the through-hole copper block 2 is a ring or a copper PAD.
Preferably, the projection of the ink 3 along the stacking direction falls into the projection of the through-hole copper block 2 along the stacking direction.
Preferably, the thickness of the ink 3 is between 30 μm and 100 μm, so as to ensure that the normal pressing between the core plates is not affected by the presence of the ink 3 on the premise that the ink 3 can function in the subsequent process.
In addition, during lamination, prepregs are required to be stacked between adjacent core plates, the core plates and the core plates are overlapped or copper foils are stacked on the outer surfaces of the outer core plates, and high-temperature and high-pressure pressing is adopted, so that all parts are fused into a whole to form the multilayer plate.
And S3, drilling at a preset position on the multilayer board to form a via hole 4 with an unmetallized hole wall, wherein the ink 3 is left on the periphery of a hole section of the via hole 4 positioned on a specified layer, as shown in FIG. 5.
In this step, the number and the positions of the via holes 4 are not limited, and may be set as required.
After drilling, while extending into each core board, the via hole 4 will pass through the corresponding ink 3 making area on the designated layer, but because the area of the ink 3 making area is larger than the cross-sectional area of the via hole 4, the ink 3 will still remain on the periphery of the hole section of the via hole 4 on the designated layer.
And S4, spraying photosensitive paint 5 on the hole wall of the via hole 4, wherein the photosensitive paint 5 is mixed paint of photosensitive resin and conductive particles, as shown in figure 6.
Preferably, the photosensitive resin is typically a polyol acrylic polymer, and is sensitive to light of a specified wavelength (typically, ultraviolet light having a wavelength of 320 to 440 nm), and when irradiated with light of a specified wavelength, the photosensitive resin undergoes polymerization and is cured by exposure. The unexposed photosensitive resin can be soaked by alkali liquor and dissolved.
The conductive particles are one or the combination of copper powder, silver powder or nickel powder, and the particle diameter of the conductive particles needs to reach the nanometer level to the micron level.
Specifically, the photosensitive resin needs to be prepared into a transparent or semitransparent liquid mixed coating (the light reflection rate of the resin on the hole wall and the copper layer is not influenced), the tiny conductive particles are dispersed and mixed in the photosensitive resin, the photosensitive coating 5 is uniformly sprayed on the hole walls of all the through holes 4 to be processed in the multilayer board by using spraying equipment, and the spraying thickness is controlled to be between 10 and 20 micrometers.
And S5, carrying out exposure treatment on the hole wall of the via hole 4.
Specifically, the step S5 specifically includes:
s51, extending the top end of the optical fiber 6 into the via hole 4, so that a light source which is emitted into the optical fiber 6 vertically irradiates the wall of the via hole 4.
It can be understood that, in the present embodiment, the specially-made optical fiber 6 is inserted into all the vias 4 to be processed one by one as shown in fig. 8, so as to respectively expose the hole walls of all the vias 4 to be processed, and the diameter of the optical fiber 6 is directly smaller than the hole diameter of the via 4 to be processed.
Specifically, as shown in fig. 7, the top end of the optical fiber 6 forms a section 61 that is arranged at an included angle of 45 °, the light source is vertically emitted into the optical fiber 6 from the bottom end of the optical fiber 6, and is transmitted along the length direction of the optical fiber 6, and after the reflection of the section 61, the light vertically irradiates the hole wall of the via hole 4 along the direction a, which utilizes the reflection principle of light.
Further, in order to fully expose all hole walls of the via hole 4 to be processed, in this embodiment, the optical fiber 6 extends into the via hole 4 in a high-speed rotation manner along the length direction thereof, so that after the light source is reflected by the section 61, a circular smooth surface with the center axis of the optical fiber 6 as the center of circle can be generated along with the high-speed rotation of the optical fiber 6, and the circular smooth surface can fully irradiate all hole walls of the via hole 4 located at the same height in the process that the optical fiber 6 extends into the via hole 4, thereby ensuring that all the photosensitive coatings 5 on all the hole walls of the via hole 4 located at the same height can be fully exposed.
Since the ink 3 of the embodiment has a full light absorption characteristic, when the light source reflected by the optical fiber 6 irradiates the photosensitive paint 5 corresponding to the ink 3, the light source reflected by the optical fiber 6 is completely absorbed by the ink 3 at the position, so that the photosensitive paint 5 cannot be exposed by the light source, and thus the photosensitive paint 5 corresponding to the ink 3 is not exposed, as shown in fig. 9, the filled portion of the photosensitive paint 5 in fig. 9 is shown as the photosensitive paint 5 at the position is exposed, and the unfilled portion of the photosensitive paint 5 is shown as the photosensitive paint 5 at the position is not exposed.
And S6, removing the unexposed photosensitive coating 5 in the hole wall of the via hole 4.
Specifically, the step S6 specifically includes:
s61, soaking the multilayer board in an alkaline solution to remove the unexposed photosensitive coating 5 in the hole wall of the via hole 4, wherein the structure after removal is shown in figure 10. It should be noted that the removing of the unexposed photosensitive coating 5 on the hole wall of the via hole 4 is performed according to the property of the photosensitive coating 5, and certainly, when the property of the photosensitive coating 5 is such as being easily dissolved or decomposed in an acidic solution, the unexposed photosensitive coating 5 on the hole wall of the via hole 4 may be removed by using a method corresponding to the property, such as soaking the multilayer board in an acidic solution, and the like, which is not described herein again.
And S7, sequentially carrying out copper deposition and electroplating treatment on the multilayer board to form the via hole 4 with broken copper plating of the specified layer.
Specifically, the step S7 specifically includes:
and S71, immersing the multilayer board into chemical copper deposition chemical solution to deposit a thin conductive compact copper layer on the exposed photosensitive material in the hole wall of the via hole 4.
In the step, a compact copper layer with the thickness of 0.1-1.0 μm is deposited on the exposed photosensitive material surface layer in the hole wall of the via hole 4 through autocatalytic redox reaction, and the compact copper layer has conductivity, so that the hole wall and the surface layer can be communicated, and the subsequent hole wall and the surface layer can be conveniently plated with the copper layer at the same time.
And S72, carrying out electroplating treatment on the multilayer board to form electroplated copper on the compact copper layer in the hole wall of the via hole 4, so as to form the via hole 4 with the copper plating broken on the specified layer. At this time, the photosensitive coating 5 corresponding to the designated layer in the via hole 4 is not exposed, and a dense copper layer is not attached to the surface of the photosensitive coating 5, so that in this step, the photosensitive coating 5 corresponding to the designated layer cannot be electroplated to form electroplated copper, so that the copper layer on the hole wall of the via hole 4 is broken at the designated layer, and thus the via hole 4 with broken designated layer copper plating is formed.
And (5) combining the conventional process of the PCB, namely obtaining the PCB with the via hole 4 with the copper plating disconnection of the specified layer. The via hole processing method for copper plating disconnection of the designated layer has many unique effects in the aspect of signal and assembly function design, can be applied to the realization of the zero stub control requirement of the signal via hole 4, the manufacture of a buried hole through one-time pressing, the manufacture of a double-sided compression joint hole through one-time pressing, the realization of a plurality of networks in one hole and the like, and has a large application market.
With reference to fig. 1-10, the invention manufactures ink 3 with full light absorption characteristic in the preset area of the upper and lower plate surfaces of the first core plate 1, sprays photosensitive paint 5 on the hole wall of the via hole 4, exposes the photosensitive paint 5 except the designated layer on the hole wall of the via hole 4, removes the unexposed photosensitive paint 5, and performs copper deposition and electroplating treatment on the multilayer plate to form the via hole 4 with the designated copper plating disconnected.
The above disclosure is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the scope of the present invention, therefore, the present invention is not limited by the appended claims.

Claims (10)

1. A via hole processing method for specified layer copper plating disconnection is characterized by comprising the following steps:
manufacturing ink with full light absorption characteristics in preset areas on the upper plate surface and the lower plate surface of a first core plate positioned on a specified layer according to a preset lamination sequence, wherein the preset areas correspond to the drilling positions of through holes to be processed, and the specified layer is a pre-specified hole wall copper layer disconnection position of the through hole to be processed;
stacking the first core board and other core boards forming the PCB according to a preset sequence and then pressing the stacked core boards to form a multilayer board;
drilling holes at preset positions on the multilayer board to form through holes with unmetallized hole walls, wherein the ink is left on the peripheries of hole sections of the through holes, which are positioned on the appointed layer;
spraying photosensitive coating on the wall of the via hole, wherein the photosensitive coating is mixed coating of photosensitive resin and conductive particles;
exposing the hole wall of the via hole;
removing unexposed photosensitive coating in the wall of the via hole;
and sequentially carrying out copper deposition and electroplating treatment on the multilayer board to form a via hole with broken copper plating of the designated layer.
2. The method for via processing with specified layer copper plating disconnection according to claim 1, wherein the ink is a resin that is photo-curable and developable under an alkaline solution, or the ink is a resin that is heat-curable and to which a fully light absorbing material is added and uniformly dispersed.
3. The method for processing a via hole with copper plating disconnection of a designated layer according to claim 1, wherein the step of manufacturing the ink with full light absorption characteristics on the predetermined areas of the upper and lower plate surfaces of the first core plate on the first core plate positioned at the designated layer according to the predetermined stacking sequence, the predetermined areas corresponding to the drilling positions of the via hole to be processed, and the designated layer being the hole wall copper layer disconnection position of the pre-designated via hole to be processed further comprises the steps of:
and carrying out pattern manufacturing on the first core plate, forming a through hole copper block at the drilling position of the through hole to be processed of the first core plate, and arranging the printing ink on the through hole copper block.
4. The method for via processing with specified layer copper plating break as claimed in claim 3, wherein the projection of the ink along the stacking direction falls within the projection of the through-hole copper block along the stacking direction.
5. The method for processing the via hole with the specified layer copper plating disconnection according to claim 1, wherein the exposing the via hole wall specifically comprises:
and extending the top end of the optical fiber into the via hole so that a light source which is emitted into the optical fiber vertically irradiates the wall of the via hole.
6. The method for processing the via hole with specified copper plating disconnection according to claim 5, wherein the top end of the optical fiber forms a tangent plane arranged at an included angle of 45 °, and the light source is perpendicularly emitted into the optical fiber from the bottom end of the optical fiber, is transmitted along the length direction of the optical fiber, and perpendicularly irradiates the wall of the via hole after being reflected by the tangent plane.
7. The method of claim 6, wherein the optical fiber is advanced into the via hole with high speed rotation along its length.
8. The method for processing the via hole with the specified layer copper plating disconnection according to claim 1, wherein the removing of the unexposed photosensitive coating from the via hole wall specifically comprises:
and soaking the multilayer board in an alkaline solution to remove the unexposed photosensitive coating in the wall of the via hole.
9. The method for processing the via hole with the broken copper plating layer specified according to claim 1, wherein the steps of sequentially performing copper deposition and electroplating on the multilayer board to form the via hole with the broken copper plating layer specified comprise:
immersing the multilayer board in chemical copper deposition chemical water to deposit a thin conductive compact copper layer on the exposed photosensitive material in the via hole wall;
and electroplating the multilayer board to form electroplated copper on the compact copper layer in the via hole wall, so as to form the via hole with copper-plating disconnection of the specified layer.
10. A PCB comprising at least one via having a wall and a copper layer broken at a given level, the via being formed according to the method of any one of claims 1 to 9.
CN202211254866.6A 2022-10-13 2022-10-13 Through hole processing method for specified layer copper plating disconnection and PCB Pending CN115568112A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211254866.6A CN115568112A (en) 2022-10-13 2022-10-13 Through hole processing method for specified layer copper plating disconnection and PCB

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211254866.6A CN115568112A (en) 2022-10-13 2022-10-13 Through hole processing method for specified layer copper plating disconnection and PCB

Publications (1)

Publication Number Publication Date
CN115568112A true CN115568112A (en) 2023-01-03

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202211254866.6A Pending CN115568112A (en) 2022-10-13 2022-10-13 Through hole processing method for specified layer copper plating disconnection and PCB

Country Status (1)

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CN (1) CN115568112A (en)

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