CN115509974B - Method for receiving and transmitting optical fiber data based on FPGA - Google Patents
Method for receiving and transmitting optical fiber data based on FPGA Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
- G06F13/4068—Electrical coupling
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- G—PHYSICS
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/1668—Details of memory controller
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- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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Abstract
The invention discloses a method for receiving and transmitting optical fiber data based on an FPGA, and relates to the technical field of high-speed interfaces of computers. The specific embodiment comprises the following steps: the CPU controls the recording module and a plurality of aurora IPs to enter a receiving preparation state according to a data recording instruction sent by a first user; the plurality of aurora IPs respectively receive each path of optical fiber data to be recorded and send the optical fiber data to the recording module; the recording module analyzes the multipath optical fiber data to be recorded to obtain target recorded data, and sends the target recorded data to the DDR memory for caching; the CPU acquires target record data from the DDR memory and sends the target record data to the memory card for storage. According to the implementation mode, the CPU can be combined with the FPGA, and multiple aurora IPs, the recording module and the DDR memory of the FPGA are utilized to realize simultaneous reception of multiple paths of optical fiber data; and the playback module of the FPGA and a plurality of aurora IPs are utilized to realize simultaneous transmission of multiple paths of optical fiber data, so that the short-time receiving and transmitting requirements of high-speed data are met, the transmission efficiency of the optical fiber data is improved, and the rapid and complete transmission of the optical fiber data is ensured.
Description
Technical Field
The invention belongs to the technical field of computer high-speed interfaces, and particularly relates to a method for receiving and transmitting optical fiber data based on an FPGA.
Background
The traditional data receiving and transmitting mode usually adopts a data receiving and transmitting mode such as USB, network and the like, on one hand, the transmission rate is low due to the limitation of the transmission rate of a hardware interface; on the other hand, the traditional data transceiving mode only supports single-path data transceiving and cannot simultaneously carry out multi-path data transceiving, so that the traditional data transceiving mode cannot meet the short-time transceiving requirement of high-speed transmission data.
Disclosure of Invention
In view of the above, the invention provides a method for receiving and transmitting optical fiber data based on an FPGA, which can be controlled by a CPU by combining the CPU with the FPGA, and can receive multi-path optical fiber data simultaneously by utilizing a plurality of aurora IPs, a recording module and DDR memories of the FPGA; and then, the playback module of the FPGA and a plurality of aurora IPs are utilized to simultaneously transmit multi-path optical fiber data, so that the short-time receiving and transmitting requirements of high-speed data with large file volume, multiple data and the like are realized, the high-bandwidth communication requirement during transmission of high-speed equipment is met, the situation that effective data cannot be completely recorded due to the problem of transmission rate is prevented, the transmission efficiency of the optical fiber data is greatly improved, and the rapid and complete transmission of the optical fiber data is ensured.
The technical scheme for realizing the invention is as follows:
the method is implemented by reactance recording equipment, wherein the reactance recording equipment comprises a main control board, a memory card and a back board, and the main control board and the memory card perform data transmission through the back board; the main control board comprises a CPU, an FPGA and a DDR memory; the FPGA comprises a plurality of aurora IPs and a recording module; the method comprises the following steps:
the CPU controls the recording module and a plurality of aurora IPs to enter a receiving preparation state according to a data recording instruction sent by a first user; the data transmission instruction comprises optical fiber data to be recorded, wherein the optical fiber data to be recorded is multi-path optical fiber data;
the aurora IP respectively receives the optical fiber data to be recorded in each path and sends the optical fiber data to the recording module; the method comprises the steps that 1 path of optical fiber data corresponds to 1 AuroraIP, and the number of paths of the optical fiber data to be recorded is smaller than or equal to the number of auroraips;
the recording module analyzes multiple paths of optical fiber data to be recorded to obtain target recorded data, and sends the target recorded data to the DDR memory for caching;
and the CPU acquires the target record data from the DDR memory and sends the target record data to the memory card for storage.
Optionally, the recording module analyzes multiple paths of the optical fiber data to be recorded to obtain target recorded data, including:
performing cross-clock domain processing on the optical fiber data to be recorded by utilizing the FIFOIP of the recording module, and determining intermediate recorded data conforming to the clock frequency of the DDR memory;
and arbitrating the intermediate record data, determining the data type and the optical fiber path identification of the intermediate record data, and generating the target record data.
Optionally, before the CPU controls the recording module and the plurality of auroraips to enter the reception ready state, the method further includes:
and determining whether the recording parameters of the data transmission instruction meet the recording requirements, and if not, rejecting the data transmission instruction.
Optionally, the FPGA further comprises a playback module; further comprises:
the CPU receives a data playback instruction sent by a second user, and controls the playback module and a plurality of aurora IPs to enter a sending preparation state; the data playback instruction indicates a storage address of optical fiber data to be played back and a third user corresponding to the optical fiber data to be played back;
the CPU obtains the optical fiber data to be played back from the memory card according to the memory address, and sends the optical fiber data to be played back to the playback module;
and the aurora ips acquire target playback optical fiber data from the playback module and send the target playback optical fiber data to the third user.
Optionally, before the plurality of auroraips obtain the target playback fiber data from the playback module, the method further includes:
and performing cross-clock domain processing on the optical fiber data to be played back by utilizing the FIFOIP of the playback module, and determining target playback data conforming to the clock frequency of the aurora IP.
Optionally, the CPU and the DDR memory, and the CPU and the playback module communicate through PCIE interfaces.
Optionally, before the sending the optical fiber data to be played back to the playback module, the method further includes:
and the CPU queries whether the buffer space of the playback module has a storage space through the PCIE interface, if not, pauses sending the optical fiber data to be played back to the playback module, and waits for the buffer space of the playback module to be released.
Optionally, the number of aurora ips is 8, and the number of paths of the optical fiber data is 8.
The beneficial effects are that:
(1) The aurora IP is utilized to perform simultaneous recording, playback and other technical treatments on the multipath optical fiber data, so that a large amount of data is received or transmitted in a short time, the high-bandwidth communication requirement of high-speed equipment (such as equipment data with short-time flow and high speed, large file volume and the like) is met, and the problem that effective data cannot be completely recorded in a record carrier due to the speed problem is prevented.
(2) The CPU is combined with the FPGA to control, and multiple aurora IPs, a recording module and DDR memories of the FPGA are utilized to receive multi-path optical fiber data simultaneously; and then, the playback module of the FPGA and a plurality of aurora IPs are utilized to simultaneously transmit multi-path optical fiber data, so that the short-time receiving and transmitting requirements of high-speed data such as large file volume, multiple data and the like are realized, the situation that effective data cannot be completely recorded because of the problem of transmission rate is prevented, the transmission efficiency of the optical fiber data is greatly improved, and the rapid and complete transmission of the optical fiber data is ensured.
(3) The function of high-speed data receiving and transmitting is realized through the FPGA and the ARUORA protocol.
(4) The reactance recording device adopts the DDR memory 2123 as high-speed data cache, can cache target recorded data, provides sufficient data acquisition time for a CPU, ensures high-efficiency, complete and accurate transmission of optical fiber data, and ensures the integrity of the optical fiber data.
Drawings
Fig. 1 is a schematic diagram of a main flow of a method for receiving and transmitting optical fiber data based on an FPGA according to an embodiment of the present invention.
Fig. 2 is a schematic composition diagram of a reactance recording device according to an embodiment of the present invention.
Fig. 3 is a schematic diagram of the composition of an FPGA according to an embodiment of the present invention.
Fig. 4 is a schematic diagram of a main flow of a method for determining recording parameters of a data recording command according to an embodiment of the invention.
Fig. 5 is a schematic diagram of a main flow of a method for determining target record data according to an embodiment of the present invention.
Fig. 6 is a schematic diagram of a main flow of a data playback method based on FPGA fiber data according to an embodiment of the present invention.
The system comprises 200-reactance recording equipment, 210-main control board, 211-CPU,212-FPGA,2121-aurora IP, 2122-recording module, 2123-DDR memory, 2124-playback module, 2125-PCIE interface, 2126-clock module, 2127-reset management module, 2128-UART, 2129-control module, 220-memory card, 230-backboard and 240-power supply.
Detailed Description
Noun interpretation:
and (3) FPGA: field Programmable Gate Array, which is referred to as a logic array, between PAL (Programmable Array Logic, i.e., array logic), GAL (Generic Array Logic, i.e., general array logic) and the like. The programmable device is used as a semi-custom circuit in the field of Application Specific Integrated Circuits (ASICs), which not only solves the defect of custom circuits, but also overcomes the defect of limited gate circuits of the original programmable device.
Aurora: is an extensible lightweight link layer protocol for moving data between point-to-point serial links. This provides a transparent interface for the physical layer, allowing proprietary protocols or industry standard protocol upper layers to conveniently use the high speed transceiver. Aurora is widely used in applications requiring back-plate, circuit board-to-board and chip-to-chip connections, and is widely used in wired communications, storage, servers, test and measurement, industry, consumption, medical treatment, and the like.
SDRAM: synchronous Dynamic Random-access Memory, i.e. synchronous dynamic random access Memory, refers to dynamic random access Memory with a synchronous interface, abbreviated as SDRAM.
DDR memory: double Data Rate SDRAM it is referred to as DDR SDRAM.
The invention will now be described in detail by way of example with reference to the accompanying drawings.
The invention provides a method for receiving and transmitting optical fiber data based on an FPGA, which is shown in figure 1, and comprises the following steps:
In the embodiment of the invention, the method based on the FPGA optical fiber data receiving and transmitting processing is implemented by using reactance recording equipment, wherein the reactance recording equipment is multifunctional data recording equipment based on a CPU and an FPGA, and as shown in fig. 2, the reactance recording equipment 200 comprises a main control board 210, a memory card 220 and a backboard 230, and the main control board 210 and the memory card 220 are communicated through the backboard 230 to realize data transmission. The main control board 210 includes a CPU211 and an FPGA212, and is used for performing data processing, including receiving and sending data, and the like. The memory card 220 is a storage carrier for valid data for enabling storage of data.
Further, as shown in fig. 2, the reactance recording device 200 also includes a power supply 240.
In an embodiment of the present invention, as shown in fig. 3, the FPGA212 of the present invention includes a plurality of aurora ips 2121, a recording module 2122, a DDR memory 2123, a playback module 2124, a PCIE interface 2125, a clock module 2126, a reset management module 2127, a UART2128 (Universal Asynchronous Receiver/transceiver), and a control module 2129.Aurora ip2121 is used for implementing optical fiber data transmission and reception; the recording module 2122 is configured to receive the optical fiber data sent by the aurora ip2121 and buffer the optical fiber data to the DDR memory 2123; DDR memory 2123 is used for caching data; the playback module 2124 is configured to send the fiber data to the target user through AuroraIP 2121; PCIE interface 2125 is used for communication between FPGA212 and CPU211, and may be an X8 PCIE interface; clock module 2126 is used for clock management of FPGA 212; the reset management module 2127 is used for restarting, resetting and other operations of the FPGA 212; UART2128 is a serial communication interface; control module 2129 may interact with CPU211 for monitoring the operational status of the various modules within FPGA 212.
Further, the running states of AuroraIP2121 include on, receive ready, start receive, receive in progress, receive completed, transmit ready, start transmit, transmit in progress, transmit completed, off, etc., the running states of recording module 2122 include on, receive ready, start record, record in progress, record completed, off, etc., and the running states of playback module 2124 include on, transmit ready, start playback, play back completed, off, etc.
In the embodiment of the invention, the optical fiber data refers to data transmitted/communicated by taking optical fibers as channels. After the CPU211, FPGA212, and DDR memory 2123 are powered on and initialized, the link connection is enabled, and then the data transmission command starts to be received.
In the embodiment of the present invention, before the CPU211 controls the recording module 2122 and the plurality of auroraips 2121 to enter the reception ready state, the method further includes:
In the embodiment of the present invention, the recording parameters include a transmission protocol, for example, the recording parameters are the transmission protocol, the recording requirements are the TCP/UDP protocol, and then it is determined whether the transmission protocol of the data transmission instruction is the TCP/UDP protocol.
In the embodiment of the present invention, the CPU211 sends a recording start instruction to the aurora ips 2121 and the recording modules 2122 of the FPGA212 through PCIE interfaces 2125 of the FPGA212, and the aurora ips 2121 and the recording modules 2122 enter a receiving ready state after receiving the recording start instruction, and start the aurora ips 2122 and corresponding paths aurora ips 2121 to prepare to receive and record optical fiber data to be recorded.
In an embodiment of the present invention, alternatively, the CPU211 may send a record start instruction to the control module 2129 of the FPGA212 through the PCIE interface 2125, so that the control module 2129 controls the plurality of auroraips 2121 and the recording module 2122 to enter a ready state for reception.
In the embodiment of the invention, the method for receiving and transmitting the fiber data based on the FPGA mainly realizes the function of receiving and transmitting the high-speed data through the FPGA and the ARUORA protocol, is limited by the number of high-speed data channels of the FPGA, is exemplified by 8 aurora IPs, is exemplified by 8 paths of fiber data, and 1 aurora IP independently receives 1 path of fiber data. It should be noted that the number of paths of the optical fiber data may be smaller than or equal to the number of aurora ips, so as to ensure complete recording of the optical fiber data in the actual use scenario.
And 103, analyzing the multipath optical fiber data to be recorded by the recording module to obtain target recorded data, and sending the target recorded data to the DDR memory for caching.
In the embodiment of the invention, the reactance recording device 200 adopts the DDR memory 2123 as the high-speed data cache so as to ensure the high-efficiency and accurate transmission of the optical fiber data and ensure the integrity of the optical fiber data.
In an embodiment of the present invention, as shown in fig. 5, the method for determining target record data of the present invention includes the following steps:
and step 501, performing cross-clock domain processing on the optical fiber data to be recorded by using the FIFOIP of the recording module, and determining intermediate recorded data conforming to the clock frequency of the DDR memory.
In the embodiment of the present invention, the clock frequencies of aurora ip2121 and DDR memory 2123 are different, and the fiber data to be recorded sent by aurora ip2121 needs to be processed across clock domains by using FIFOIP21221 of recording module 2122, so as to ensure that DDR memory 2123 can accurately and completely receive target recorded data. For example, the clock frequency of aurora ip2121 is a frequency, the clock frequency of DDR memory 2123 is B frequency, and the fiber data to be recorded sent by aurora ip2121 needs to be processed into intermediate recording data with B frequency, so that the intermediate recording data meets the clock frequency requirement of DDR memory 2123.
In the embodiment of the present invention, the recording module 2122 arbitrates the intermediate recorded data, determines the data type of the intermediate recorded data and the optical fiber path identifier of AuroraIP2121 corresponding to the path source of the intermediate recorded data, constructs the correspondence among the optical fiber path identifier, the data type and the data details, and generates the target recorded data.
And 104, the CPU acquires target record data from the DDR memory and sends the target record data to the memory card for storage.
In the embodiment of the present invention, after aurora ip2121 starts to receive and recording module 2122 starts to record, CPU211 obtains target record data from DDR memory 2123 through PCIE interface 2125, and sends the target record data to memory card 220 for storage.
Further, when the CPU211 acquires the target record data from the DDR memory 2123 through the PCIE interface 2125, the cross-clock domain processing is performed on the target record data again, so as to obtain target record data conforming to the clock frequency of the PCIE interface 2125.
In this embodiment of the present invention, when the CPU211 stores the target record data in the memory card 220, the target record data may be stored according to the memory address of the memory card 220, and the corresponding relationship between the target record data and the memory address may be stored in a database (for example, mySQL database), so that when the data is played back in the later stage, the database may be searched, and the memory address may be determined to obtain the corresponding optical fiber data.
In the embodiment of the invention, as shown in fig. 6, the data playback method based on the FPGA optical fiber data of the invention comprises the following steps:
In the embodiment of the invention, the first user, the second user and the third user can be the same or different, and the first user, the second user and the third user can be determined according to actual needs.
In the embodiment of the present invention, the CPU211 searches a database according to the data playback instruction, and determines the storage address of the optical fiber data to be played back.
In the embodiment of the present invention, the CPU211 sends a playback start instruction to the aurora ips 2121 and the playback modules 2124 of the FPGA212 through PCIE interfaces 2125 of the FPGA212, and the aurora ips 2121 and the playback modules 2124 enter a sending ready state after receiving the playback start instruction, and start the playback modules 2124 and aurora ips 2121 of the corresponding paths to prepare to play back and send optical fiber data to be played back.
In an embodiment of the present invention, alternatively, the CPU211 may send a playback start instruction to the control module 2129 of the FPGA212 through the PCIE interface 2125, so that the control module 2129 controls the plurality of auroraips 2121 and the playback module 2124 to enter a transmission ready state.
In step 602, the CPU obtains the optical fiber data to be played back from the memory card according to the memory address, and sends the optical fiber data to be played back to the playback module.
In the embodiment of the present invention, the CPU211 sends the fiber data to be played back to the playback module 2124 through the PCIE interface 2125 of the FPGA 212.
Further, the FIFOIP of the playback module 2124 performs cross-clock domain processing on the optical fiber data to be played back, and determines target playback data that conforms to the clock frequency of AuroraIP.
Because the clock frequencies of the PCIE interface 2125 and the AuroraIP2121 are different, the fifo ip21221 of the playback module 2124 needs to perform clock domain crossing processing on the optical fiber data to be played back, which is sent by the PCIE interface 2125, so as to ensure that the AuroraIP2121 can accurately and completely send the target playback data. For example, the clock frequency of the PCIE interface 2125 is C frequency, the clock frequency of the AuroraIP2121 is D frequency, and the optical fiber data to be played back sent by the PCIE interface 2125 needs to be processed into target playback data with D frequency, so that the target playback data meets the clock frequency requirement of AuroraIP 2121.
In the embodiment of the present invention, before the CPU211 sends the optical fiber data to be played back to the playback module 2124 through the PCIE interface 2125, the CPU211 may query the buffer space of the playback module 2124 through the PCIE interface 2125, determine whether the buffer space of the playback module 2124 has a storage space, and if so, send the optical fiber data to be played back to the playback module 2124; if not, the sending of the optical fiber data to be played back to the playback module 2124 is paused, the buffer space of the playback module 2124 is waited for to be released, and the optical fiber data to be played back is sent to the playback module 2124 after the buffer space of the playback module 2124 is determined to have the storage space.
And step 603, the aurora ips acquire target playback optical fiber data from the playback module and send the target playback optical fiber data to the third user.
In the embodiment of the present invention, the plurality of aurora ips acquire the target playback optical fiber data conforming to the clock frequency thereof from the playback module 2124, and send the target playback optical fiber data to the corresponding third user, so that the target playback optical fiber data is played back to the third user through the optical fiber interface.
In summary, the above embodiments are only preferred embodiments of the present invention, and are not intended to limit the scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (7)
1. The method is characterized in that the method is executed by reactance recording equipment, the reactance recording equipment comprises a main control board, a memory card and a back board, and the main control board and the memory card perform data transmission through the back board; the main control board comprises a CPU, an FPGA and a DDR memory; the FPGA comprises a plurality of aurora IPs, a recording module and a playback module; the method comprises the following steps:
the CPU controls the recording module and a plurality of aurora IPs to enter a receiving preparation state according to a data recording instruction sent by a first user; the data recording instruction comprises optical fiber data to be recorded, wherein the optical fiber data to be recorded are multipath optical fiber data;
the aurora IP respectively receives the optical fiber data to be recorded in each path and sends the optical fiber data to the recording module; the method comprises the steps that 1 path of optical fiber data corresponds to 1 AuroraIP, and the number of paths of the optical fiber data to be recorded is smaller than or equal to the number of auroraips;
the recording module analyzes multiple paths of optical fiber data to be recorded to obtain target recorded data, and sends the target recorded data to the DDR memory for caching, so that simultaneous receiving of the multiple paths of optical fiber data is realized;
the CPU acquires the target record data from the DDR memory and sends the target record data to the memory card for storage;
the CPU receives a data playback instruction sent by a second user, and controls the playback module and a plurality of aurora IPs to enter a sending preparation state; the data playback instruction indicates a storage address of optical fiber data to be played back and a third user corresponding to the optical fiber data to be played back;
the CPU obtains the optical fiber data to be played back from the memory card according to the memory address, and sends the optical fiber data to be played back to the playback module;
and the aurora IP acquires target playback optical fiber data from the playback module, and sends the target playback optical fiber data to the third user, so that the simultaneous sending of multiple paths of optical fiber data is realized.
2. The method of claim 1, wherein the recording module analyzes multiple paths of the optical fiber data to be recorded to obtain target recorded data, and the method comprises:
performing cross-clock domain processing on the optical fiber data to be recorded by utilizing the FIFOIP of the recording module, and determining intermediate recorded data conforming to the clock frequency of the DDR memory;
and arbitrating the intermediate record data, determining the data type and the optical fiber path identification of the intermediate record data, and generating the target record data.
3. The method of claim 1, further comprising, before the CPU controls the recording module and the plurality of auroraips to enter a reception ready state:
and determining whether the recording parameters of the data transmission instruction meet the recording requirements, and if not, rejecting the data transmission instruction.
4. The method of claim 1, further comprising, prior to the plurality of aurora ips acquiring target playback fiber data from the playback module:
and performing cross-clock domain processing on the optical fiber data to be played back by utilizing the FIFOIP of the playback module, and determining target playback data conforming to the clock frequency of the aurora IP.
5. The method of any of claims 1-4, wherein the CPU and the DDR memory, the CPU, and the playback module communicate over a PCIE interface.
6. The method of claim 5, further comprising, prior to said sending the fiber data to be played back to the playback module:
and the CPU queries whether the buffer space of the playback module has a storage space through the PCIE interface, if not, pauses sending the optical fiber data to be played back to the playback module, and waits for the buffer space of the playback module to be released.
7. The method of claim 1, wherein the number of aurora ips is 8 and the number of paths of the fiber data is 8.
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| WO2019085605A1 (en) * | 2017-10-31 | 2019-05-09 | 武汉精测电子集团股份有限公司 | Automatic optical detection system based on cpu+gpu+fpga architecture |
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