CN115498077A - Preparation method of red light micro LED chip, red light micro LED chip and display device - Google Patents

Preparation method of red light micro LED chip, red light micro LED chip and display device Download PDF

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CN115498077A
CN115498077A CN202211160517.8A CN202211160517A CN115498077A CN 115498077 A CN115498077 A CN 115498077A CN 202211160517 A CN202211160517 A CN 202211160517A CN 115498077 A CN115498077 A CN 115498077A
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metal layer
micro led
contact hole
red light
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CN115498077B (en
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黄青青
张珂
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Shenzhen Stan Technology Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0016—Processes relating to electrodes

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Abstract

The disclosure provides a red light micro LED chip, a preparation method thereof and a display device. The method comprises the following steps: providing a red light micro LED epitaxial wafer; etching the epitaxial wafer from the ohmic contact layer until the P-type window layer is exposed to obtain a mesa structure array; doping the exposed surface to form a doped surface; arranging an anode metal layer on the doped surface; arranging a cathode metal layer on the ohmic contact layer of the mesa structure; arranging an elevated metal layer on the anode metal layer to obtain an intermediate structure; arranging a passivation layer on the intermediate structure, and forming a first contact hole and a second contact hole on the passivation layer, so that the first contact hole exposes part of the raised metal layer, and the second contact hole exposes part of the cathode metal layer; and arranging metal discs on part of the heightened metal layer and part of the cathode metal layer to obtain the red light micro LED chip.

Description

Preparation method of red light micro LED chip, red light micro LED chip and display device
Technical Field
The disclosure relates to the technical field of semiconductor LEDs, in particular to a red light micro LED chip preparation method, a red light micro LED chip and a display device.
Background
With the continuous development of display technology, virtual Reality (VR) and Augmented Reality (AR) technologies are applied more and more widely in different fields. Nowadays, micro-LED display technology is considered to be the ultimate display technology, and is one of the fastest developing technologies in the world. In the application aspect of Micro display, especially in the application fields of Micro display such as AR, VR and the like, gaN-based blue light and green light Micro-LED chip arrays show huge application potential. The red light Micro-LED chip is an indispensable component of the full-color Micro-LED display screen, and the manufacturing process of the red light Micro-LED chip is more difficult than that of a blue light Micro-LED chip and a green light Micro-LED chip, so that the research on the red light Micro-LED chip is laggard behind that of the blue light Micro-LED chip and the green light Micro-LED chip although the red light LED chip appears earliest.
In the related technology, the red light Micro-LED display adopts a P-shared Micro-LED flip chip array structure, and the overall brightness of the LED chip is low.
Disclosure of Invention
In order to solve the technical problems mentioned in the background art, the present disclosure provides a method for manufacturing a red light micro LED chip, and a display device.
According to one aspect of the disclosed embodiments, a method for manufacturing a micro LED device is provided. The method comprises the following steps: providing a first red light micro LED epitaxial wafer, wherein the first red light micro LED epitaxial wafer sequentially comprises a first substrate, a bonding layer, a P-type window layer, a transition layer, a P-type limiting layer, an active layer, an N-type limiting layer, an N-type window layer and an ohmic contact layer from bottom to top; etching the first red light micro LED epitaxial wafer from the ohmic contact layer until the P-type window layer is exposed to obtain a mesa structure array; doping the exposed surface of the P-type window layer to form a doped surface; arranging an anode metal layer on the doped surface; a cathode metal layer is arranged on the ohmic contact layer of each mesa structure of the mesa structure array; arranging an elevated metal layer on the anode metal layer to obtain a micro LED intermediate structure; arranging a passivation layer on the micro LED intermediate structure, and forming a first contact hole and a second contact hole on the passivation layer, so that the first contact hole exposes part of the elevated metal layer, and the second contact hole exposes part of the cathode metal layer; and arranging metal discs on the exposed part of the heightened metal layer and the part of the cathode metal layer to obtain the red light micro LED chip.
Further, the doping the exposed surface of the P-type window layer, and the forming a doped rear surface includes: by using CO 2 And as an injection source, carrying out carbon doping on the exposed surface of the P-type window layer to form a doped surface, so that the doping concentration of the doped surface reaches a preset doping concentration.
Further, the preset doping concentration is within a range of 10 19 cm -3 To 10 20 cm -3 。
Further, the disposing an anode metal layer on the doped rear surface comprises: and arranging a grid-shaped anode metal layer on the doped rear surface, wherein the grid-shaped anode metal layer comprises a peripheral metal layer surrounding the mesa structure array at the outermost periphery.
Further, the disposing a raised metal layer on the anode metal layer includes: and arranging the heightened metal layer with a preset thickness on the peripheral metal layer.
Further, the disposing a passivation layer on the micro LED intermediate structure and opening a first contact hole and a second contact hole on the passivation layer such that the first contact hole exposes a portion of the elevated metal layer, and the second contact hole exposes a portion of the cathode metal layer includes: and arranging a passivation layer on the heightened metal layer, the anode metal layer without the heightened metal layer, the cathode metal layer, the exposed doped rear surface and the exposed part of the mesa structure array, and forming a first contact hole and a second contact hole on the passivation layer, so that the first contact hole exposes part of the heightened metal layer and the second contact hole exposes part of the cathode metal layer.
Further, the providing the first red micro LED epitaxial wafer includes: obtaining a second red light micro LED epitaxial wafer, wherein the second red light micro LED epitaxial wafer comprises a second substrate, an ohmic contact layer, an N-type window layer, an N-type limiting layer, an active layer, a P-type limiting layer, a transition layer and a P-type window layer; and transferring the part of the second red light micro LED epitaxial wafer except the second substrate to the first substrate through the bonding layer to obtain the first red light micro LED epitaxial wafer.
Further, the first substrate is a sapphire substrate, the bonding layer is a bonding glue or oxide layer, the P-type window layer is a GaP layer, the transition layer is an AlGaInP layer, the P-type confinement layer is an AlInP layer, the active layer is an AlGaInP multilayer quantum well, the N-type confinement layer is an AlInP layer, the N-type window layer is an AlGaInP layer, and the ohmic contact layer is a GaAs layer.
Further, etching the first red light micro LED epitaxial wafer from the ohmic contact layer until the P-type window layer is exposed, and obtaining a mesa structure array includes: and forming the mesa structure array by adopting an inductively coupled plasma etching method.
Further, disposing a grid-shaped anode metal layer on the doped rear surface includes: depositing a grid-shaped anode metal layer on the doped surface by adopting an electron beam evaporation method and a stripping process method; and annealing the deposited anode metal layer to enable the anode metal layer and the P-type window layer to form ohmic contact.
Further, disposing a cathode metal layer on the ohmic contact layer of each mesa of the array of mesas comprises: depositing a cathode metal layer on the ohmic contact layer of each mesa structure by adopting an electron beam evaporation method and a stripping process method; and annealing the deposited cathode metal layer so that the cathode metal layer and the ohmic contact layer form ohmic contact.
Further, the step of providing a raised metal layer with a predetermined thickness on the peripheral metal layer includes: and depositing the heightened metal layer with a preset thickness on the peripheral metal layer by adopting an electron beam evaporation method and a stripping process method.
Further, the step of arranging a passivation layer on the micro LED intermediate structure and forming a first contact hole and a second contact hole in the passivation layer includes: depositing a passivation layer on the miniature LED intermediate structure by adopting a plasma enhanced chemical vapor deposition method; and forming a first contact hole and a second contact hole on the passivation layer by adopting an inductively coupled plasma etching method.
Further, disposing a metal disk on the exposed portion of the elevated metal layer and the portion of the cathode metal layer includes: and arranging a metal disc on the exposed heightened second metal layer and the partial cathode metal layer by adopting a vacuum thermal evaporation method and a stripping process method.
According to another aspect of the disclosure, a red light micro LED chip is also provided. The red light micro LED chip sequentially comprises a first substrate, a bonding layer, a P-type window layer, a transition layer, a P-type limiting layer, an active layer, an N-type limiting layer, an N-type window layer and an ohmic contact layer from bottom to top, the P-type window layer comprises a doped rear surface, and the red light micro LED chip further comprises: an anodic metal layer disposed on the doped rear surface; a raised metal layer disposed on the anode metal layer; a cathode metal layer disposed on the ohmic contact layer; a passivation layer disposed on the elevated metal layer and the cathode metal layer and including a first contact hole exposing a portion of the elevated metal layer and a second contact hole exposing a portion of the cathode metal layer; a metal disk disposed on the exposed portion of the elevated metal layer and the portion of the cathode metal layer.
Further, the anode metal layer is in a grid shape, and the grid-shaped anode metal layer comprises a peripheral metal layer at the outermost periphery.
Further, the elevated metal layer is disposed on the peripheral metal layer.
Further, the first substrate is a sapphire substrate.
According to another aspect of the disclosed embodiment, a display device is also provided. The display device comprises the red light micro LED chip.
By applying the technical scheme, the ohmic contact performance of the P-type window layer and the anode metal layer arranged on the P-type window layer can be improved by doping the exposed surface of the P-type window layer, so that the condition that the starting voltage of the red light micro LED chip is too large and the influence on the whole brightness of the chip can be avoided, and the photoelectric performance of the red light micro LED chip is improved.
In addition, by applying the technical scheme disclosed by the invention, the red light micro LED chip with the common anode structure can be realized, and the flip chip is utilized to be bonded with the driving panel, so that the manufacturing of a display array with high PPI is facilitated.
In addition, use this disclosed technical scheme, can also increase the anode metal layer through utilizing to increase the metal level for the positive pole is in approximate the same level with the negative pole, is favorable to follow-up display module's integration.
Drawings
The above and other objects, features and advantages of exemplary embodiments of the present disclosure will become readily apparent from the following detailed description read in conjunction with the accompanying drawings. Several embodiments of the present disclosure are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar or corresponding parts and in which:
fig. 1 is a flow chart illustrating a method of fabricating a red micro LED chip according to one embodiment of the present disclosure;
fig. 2a to 2h are schematic views illustrating a manufacturing process flow of a method for manufacturing a red micro LED chip according to an embodiment of the present disclosure;
FIG. 3 is a plan view showing a mesh-shaped anode metal layer disposed on a surface of the doped P-type window layer;
fig. 4 is a top view showing a raised metal layer disposed on the perimeter metal layer.
Detailed Description
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present disclosure will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.
It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the disclosure. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.
For ease of description, spatially relative terms such as "over 8230 \ 8230;,"' over 8230;, \8230; upper surface "," above ", etc. may be used herein to describe the spatial relationship of one device or feature to another device or feature as shown in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if a device in the figures is turned over, devices described as "above" or "on" other devices or configurations would then be oriented "below" or "under" the other devices or configurations. Thus, the exemplary terms "at 8230; \8230; 'above" may include both orientations "at 8230; \8230;' above 8230; 'at 8230;' below 8230;" above ". The device may also be oriented 90 degrees or at other orientations and the spatially relative descriptors used herein interpreted accordingly.
Exemplary embodiments according to the present disclosure will now be described in more detail with reference to the accompanying drawings. These exemplary embodiments may, however, be embodied in many different forms and should not be construed as limited to only the embodiments set forth herein. It is to be understood that these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art, in the drawings, the thicknesses of layers and regions are exaggerated for clarity, and the same devices are denoted by the same reference numerals, and thus the description thereof will be omitted.
In the related art, the manufacturing process of the red light Micro-LED chip is more difficult than that of the blue light Micro-LED chip and the green light Micro-LED chip. In particular, the red light epitaxial structure is more complex than the blue and green light epitaxial structures. The substrate for AlGaInP red light epitaxial growth can only be a GaAs substrate, mainly for lattice matching, but the GaAs substrate is conductive and can absorb red light, so a red light chip to be made into a flip-chip structure must be subjected to a substrate transfer process, but the substrate transfer process has a high requirement on the process, and a small amount of particles can affect the yield. The etching depth of the red light mesas is much deeper than that of the blue light and the green light mesas, the red light mesas need to be etched by 6-7um, but the blue light and the green light mesas only need to be etched by about 1um, and because the epitaxial structure of the red light is complex, the etching rate of the same gas to each layer is different, the side etching condition of the side wall is also different, and the process difficulty of etching the red light mesas is large. Because the red light mesa is too deep, the red light mesa also has certain influence on the photoetching process of the subsequent processing procedure, basically, the process can be carried out only by adopting thick glue, because the mesa can not be well covered by thin glue, but the disadvantage of adopting thick glue is that the precision is reduced. The red light flip chip with the common P structure or the common N structure has overlarge height difference of PN electrodes due to the fact that the mesa depth is too deep, so that flip integration cannot be carried out, metal can only be used for carrying out heightening treatment, and the patterning and stripping processes of thick metal are difficult.
In addition, in the related art, the red LED chip is generally made of AlGaInP quaternary system material, and to meet the matching of the growth lattice of the epitaxial layer, gaAs is generally selected as the epitaxial substrate material, however, the GaAs substrate is a non-transparent and conductive crystal, and light generated inside the LED active layer can only exit through the front surface, so the flip-chip red LED chip is transferred through the epitaxial substrate once, and is generally a single LED chip structure with P and N in the same plane, but the P and N electrodes of the structure occupy a larger area, which is not beneficial to the preparation of a high PPI display array, so to implement the high PPI red Micro-LED display, only a P-common Micro-LED flip-chip array structure can be adopted. However, the P-pole of the P-common micro-LED flip chip array structure has poor current spreading performance, which may cause non-uniform display brightness of the display screen.
The disclosure provides a preparation method of a red light micro LED chip. Referring to fig. 1, 2 a-2 h, 3, and 4, fig. 1 is a flow chart illustrating a method of fabricating a red light micro LED chip according to one embodiment of the present disclosure; fig. 2 a-2 h are schematic diagrams illustrating a fabrication process flow of a method of fabricating a red light micro LED chip according to one embodiment of the present disclosure; FIG. 3 is a plan view showing a first metal layer of a mesh shape provided on a surface of the doped P type window layer; fig. 4 is a plan view showing a second metal layer disposed on the peripheral metal layer.
According to embodiments of the present disclosure, the red pixel size in a red light Micro LED (Micro-LED) chip is typically less than or equal to 200 microns.
As shown in FIG. 1, the method for preparing the red micro LED chip comprises the following steps S101-S108.
Step S101, providing a first red light micro LED epitaxial wafer, wherein the first red light micro LED epitaxial wafer sequentially comprises a first substrate, a bonding layer, a P-type window layer, a transition layer, a P-type limiting layer, an active layer, an N-type limiting layer, an N-type window layer and an ohmic contact layer from bottom to top.
And S102, etching the first red light micro LED epitaxial wafer from the ohmic contact layer until the P-type window layer is exposed to obtain a mesa structure array.
And S103, doping the exposed surface of the P-type window layer to form a doped surface.
And step S104, arranging an anode metal layer on the doped surface.
And S105, arranging a cathode metal layer on the ohmic contact layer of each mesa structure of the mesa structure array.
And S106, arranging a heightened metal layer on the anode metal layer to obtain the micro LED intermediate structure.
And S107, arranging a passivation layer on the micro LED intermediate structure, and forming a first contact hole and a second contact hole on the passivation layer, so that the first contact hole exposes part of the raised metal layer, and the second contact hole exposes part of the cathode metal layer.
And S108, arranging metal discs on the exposed part of the heightened metal layer and the part of the cathode metal layer to obtain the red light micro LED chip.
According to the technical scheme, the ohmic contact performance of the P-type window layer and the anode metal layer arranged on the P-type window layer can be improved by doping the exposed surface of the P-type window layer, so that the condition that the starting voltage of the red light micro LED chip is overlarge can be avoided, the influence on the overall brightness of the chip can be avoided, and the photoelectric performance of the red light micro LED chip is improved. In addition, according to the technical scheme, the red light micro LED chip with the common anode structure can be realized, and the chip is reversely mounted and bonded with the driving panel, so that the manufacturing of the display array with high PPI is facilitated. In addition, according to this technical scheme, can also increase the anode metal layer through utilizing to increase the metal level for the anode is in approximate the same level with the cathode, is favorable to the integration of follow-up display module assembly.
In step S101, a first red micro LED epitaxial wafer may be provided, where the first red micro LED epitaxial wafer includes, from bottom to top, a first substrate, a bonding layer, a P-type window layer, a transition layer, a P-type confinement layer, an active layer, an N-type confinement layer, an N-type window layer, and an ohmic contact layer.
According to an embodiment of the present disclosure, in order to prepare the red micro LED chip, a first red micro LED epitaxial wafer may be obtained first, and the first red micro LED epitaxial wafer may be directly prepared or may be a red micro LED epitaxial wafer after a substrate is replaced. The red light micro LED epitaxial wafer after substrate replacement can be prepared in advance, and can also be prepared in the micro LED chip preparation method of the present disclosure.
Further, the providing the first red micro LED epitaxial wafer may include: obtaining a second red light micro LED epitaxial wafer, wherein the second red light micro LED epitaxial wafer comprises a second substrate, an ohmic contact layer, an N-type window layer, an N-type limiting layer, an active layer, a P-type limiting layer, a transition layer and a P-type window layer; and transferring the part of the second red light micro LED epitaxial wafer except the second substrate to the first substrate through the bonding layer to obtain the first red light micro LED epitaxial wafer. Therefore, the second red light micro LED epitaxial wafer is subjected to substrate transfer once, and the substrate is replaced, so that the first red light micro LED epitaxial wafer is obtained. Wherein the second substrate of the second red micro LED epitaxial wafer can be a GaAs substrate, and the first substrate obtained after substrate replacementThe first substrate of the red micro LED epitaxial wafer may be, for example, a sapphire substrate, and the bonding layer may be, for example, a bonding paste such as BCB (benzocyclobutene) paste or a bonding paste such as SiO (silicon oxide) 2 An oxide of (a).
Referring to fig. 2 a-2 h, wherein fig. 2a shows a side view of a first red micro LED epitaxial wafer 10 according to one embodiment of the present disclosure. As shown in fig. 2a, the first red micro LED epitaxial wafer 10 may include, from bottom to top, a first substrate 101, a bonding layer 102, a P-type window layer 103, a transition layer 104, a P-type confinement layer 105, an active layer 106, an N-type confinement layer 107, an N-type window layer 108, and an ohmic contact layer 109.
According to an embodiment of the present disclosure, the first substrate 101 may be a sapphire substrate, and the bonding layer 102 may be a bonding paste such as BCB (benzocyclobutene) paste or SiO 2 The P-type window layer 103 may be a GaP layer, the transition layer 104 may be an AlGaInP layer, the P-type confinement layer 105 may be an AlInP layer, the active layer 106 may be an AlGaInP multilayer quantum well, the N-type confinement layer 107 may be an AlInP layer, the N-type window layer 108 may be an AlGaInP layer, and the ohmic contact layer 109 may be a GaAs layer.
In step S102, the first red micro LED epitaxial wafer may be etched from the ohmic contact layer until the P-type window layer is exposed, so as to obtain a mesa structure array.
According to an embodiment of the present disclosure, after obtaining the first red micro LED epitaxial wafer, it may be etched to obtain the mesa structure array. It is noted that the mesa structure array may comprise, for example, tens to millions of mesa structures, as desired, for example, the number of mesa structures may be tens when red micro LED chips are used in a lighting device, and the number of mesa structures may be hundreds of thousands, or even millions, when red micro LED chips are used in a display device.
In order to obtain the above mesa structure array, etching the first red micro LED epitaxial wafer from the ohmic contact layer until the P-type window layer is exposed, and obtaining the mesa structure array may include: and forming the mesa structure array by adopting an inductively coupled plasma etching method.
Further, referring to fig. 2a to 2h, fig. 2b shows a side view of the mesa structure array 11 etched out of the first red micro LED epitaxial wafer.
Specifically, firstly, silane (SiH) may be introduced into a Plasma Enhanced Chemical Vapor Deposition apparatus by a Plasma Enhanced Chemical Vapor Deposition (PECVD) method 4 ) Dinitrogen monoxide (N) 2 O) and nitrogen (N) 2 ) The silicon oxide layer 110 is deposited on the first red micro LED epitaxial wafer as a hard mask. The mesa array is then patterned by photoresist lithography. Subsequently, the pattern obtained by photolithography is etched and mapped to the silicon oxide layer 110 by Inductively Coupled Plasma etching (ICP), in which sulfur hexafluoride (SF) is used 6 ) And trifluoromethane (CHF) 3 ) And oxygen (O) 2 ) The silicon oxide layer 110 is dry etched in an ICP etching apparatus. Next, as shown in FIG. 2b, after removing the photoresist using acetone, the substrate is passed through an inductively coupled plasma etching apparatus using chlorine gas (Cl) 2 ) Boron trichloride (BCl) 3 ) And argon (Ar) gas, the pattern etching of the silicon oxide layer 110 is mapped to expose the surface layer of the P-type window layer 103, thereby forming the mesa structure array 11 as shown in fig. 2 b.
It should be noted that the number of mesa structures included in the mesa structure array 11 in fig. 2b is only illustrative and not limited thereto. In addition, the silicon oxide layer 110 as a hard mask remains on the mesa structure of the mesa structure array 11 shown in fig. 2b, and the silicon oxide layer 110 may be washed away by immersion in BOE (buffered oxide etchant).
In step S103, the exposed surface of the P-type window layer may be doped to form a doped back surface.
According to the embodiment of the disclosure, after the first red micro LED epitaxial wafer is etched to obtain the mesa structure array, a part of the surface of the P-type window layer is exposed, and the exposed surface of the P-type window layer may be doped to form a doped rear surface. Through the doped rear surface, ohmic contact between the P-type window layer and metal arranged on the doped rear surface can be improved, and further photoelectric performance of the chip is improved.
Further, the doping the exposed surface of the P-type window layer, and the forming a doped rear surface includes: by using CO 2 And as an injection source, carrying out carbon doping on the exposed surface of the P-type window layer to form a doped surface so as to enable the doping concentration of the surface to reach a preset doping concentration. Wherein the preset doping concentration range may be 10 19 cm -3 To 10 20 cm -3 。
Referring to fig. 2 a-2 h, wherein fig. 2c shows a view of the doped back surface 1031 after doping the exposed surface of the P-type window layer 103. Specifically, the silicon oxide layer 110 as the hard mask shown in fig. 2b may be used as a hard mask again by using an ion implanter and CO instead of being removed when preparing the mesa array 2 As an implantation source, the exposed surface of the P-type window layer is carbon-doped to have a doping concentration of, for example, 10 19 cm -3 To 10 20 cm -3 Thereby forming a doped back surface 1031. The silicon oxide layer 110 may then be rinsed away by a BOE (buffered oxide etchant) dip, resulting in the structure shown in fig. 2 c.
In another embodiment, if the silicon oxide layer 110 has been rinsed away by a BOE (buffered oxide etchant) soak in step S102, the silicon oxide layer may be redeposited as a hard mask in this step S103, and also rinsed away by a BOE (buffered oxide etchant) soak at the end of this step.
It should be understood that, in the related art, in order to prevent haze defects from occurring in the epitaxy during the deposition process of the red micro LED epitaxial wafer, the thickness of about 1um of the surface of the P-type window layer is low-doped. The doping concentration of the surface layer of the P electrode of the red light micro LED chip prepared by the epitaxial wafer, which is contacted with metal, is lower, so that poor ohmic contact is easy to form, the turn-on voltage of the red light micro LED chip is overlarge,further, the overall light-emitting brightness of the chip is affected, and therefore, the photoelectric performance of the chip is affected to a certain extent. Through the technical scheme, the C doping can be carried out on the surface layer of the P-type window layer by adopting an ion implantation process before the P electrode is prepared, so that the doping concentration of the surface layer of the P-type window layer is improved, the ohmic contact performance of the P-type window layer and metal is effectively improved, the over-high starting voltage of the red light micro LED chip can be avoided, the influence on the whole luminous brightness of the chip can be avoided, and the photoelectric performance of the chip is improved. In addition, the disclosed solution uses CO 2 As an injection source, the exposed surface of the P-type window layer is subjected to carbon doping, and a metal contact layer is formed without using a toxic AuBe alloy material, so that the safety is improved.
In step S104, an anode metal layer may be disposed on the doped rear surface.
According to an embodiment of the present disclosure, after doping the exposed surface of the P-type window layer to form a doped rear surface, an anode metal layer may be disposed on the doped rear surface.
Further, disposing an anode metal layer on the doped back surface may include: and arranging a grid-shaped anode metal layer on the doped rear surface, wherein the grid-shaped anode metal layer comprises a peripheral metal layer surrounding the mesa structure array at the outermost periphery.
Specifically, the disposing of the anode metal layer in a grid shape on the doped rear surface may include: depositing a grid-shaped anode metal layer on the doped surface by adopting an electron beam evaporation method and a stripping process method; and annealing the deposited anode metal layer to enable the anode metal layer and the P-type window layer to form ohmic contact.
Referring to fig. 2 a-2 h and fig. 3, wherein fig. 2d shows a side sectional view of the anode metal layer 111 disposed on the doped back surface 1031, and fig. 3 is a top view showing a grid-like anode metal layer disposed on the surface of the doped P-type window layer. Specifically, as shown in fig. 2d and 3, a grid pattern may be photo-etched using a photoresist, and then electron beam evaporation may be usedDepositing the anode metal layer 111 by a method, namely depositing an Au layer, an AuZn layer and an Au layer in sequence, and finally removing the photoresist and the redundant metal by using acetone or photoresist removing liquid by a lift-off process to obtain the structure shown in FIG. 2 d. In order to make the anode metal layer and the doped surface of the P-type window layer form better ohmic contact, the anode metal layer needs to be annealed, specifically, for example, in N 2 Annealing at 400-500 deg.C for 5-20min.
Notably, as shown in fig. 3, the grid-shaped anode metal layer 111 forms a grid-shaped connected metal structure and includes a peripheral metal layer 1111 at the outermost periphery around the mesa structure array. The grid-shaped anode metal layer is beneficial to improving the current spreading effect of the anode, so that the brightness uniformity of the red light micro LED chip with the common anode structure is improved.
In step S105, a cathode metal layer may be disposed on the ohmic contact layer of each mesa of the array of mesas.
According to an embodiment of the present disclosure, a cathode metal layer may be disposed on the ohmic contact layer of each mesa structure.
In some embodiments, S104 may be implemented in a process step prior to S105; in some embodiments, S104 may also be implemented in a process step after S105; in other embodiments, S104 and S105 may be implemented by the same process step. In other words, the order of S104 and S105 may be set as needed, and is not limited herein.
Further, disposing a cathode metal layer on the ohmic contact layer of each mesa of the array of mesas may include: depositing a cathode metal layer on the ohmic contact layer of each mesa structure by adopting an electron beam evaporation method and a stripping process method; and annealing the deposited cathode metal layer to enable the cathode metal layer and the ohmic contact layer to form ohmic contact.
Referring to fig. 2 a-2 h, fig. 2e illustrates a cathode metal layer 112 disposed on the ohmic contact layer 109 of each mesa structure. Specifically, as shown in FIG. 2e, the cathode metal layer can be photo-etched using photoresistAnd (3) patterning, depositing a cathode metal layer 112 by adopting an electron beam evaporation method, namely depositing an Au layer, an AuGeNi layer and an Au layer in sequence, and finally removing the photoresist and the redundant metal by utilizing acetone or photoresist removing liquid by adopting a lift-off process to obtain the structure shown in figure 2 e. In order to form a better ohmic contact between the cathode metal layer 112 and the ohmic contact layer 109, the cathode metal layer needs to be annealed, specifically, for example, in N 2 Annealing at 300-400 deg.c for 5-20min.
In step S106, a raised metal layer may be disposed on the anode metal layer, so as to obtain a micro LED intermediate structure.
According to the embodiment of the disclosure, after the cathode metal layer is arranged, because the cathode metal layer is arranged above the mesa structure, a larger height difference (for example, greater than 4 um) exists between the cathode metal layer and the anode metal layer, which is not beneficial to the integration of the subsequent display module, so that the anode metal layer can be subjected to heightening treatment, i.e., the heightening metal layer can be arranged on the anode metal layer.
Further, disposing a raised metal layer on the anode metal layer includes: and arranging the heightened metal layer with a preset thickness on the peripheral metal layer. According to this embodiment, the predetermined thickness of the raised metal layer can be set according to actual needs and preset, so that the height of the raised metal layer after setting is substantially flush with the height of the cathode metal layer. However, since the thickness of the raised metal layer mainly depends on the height difference between the anode metal layer and the cathode metal layer, and the height difference is usually larger than 4um, the thick metal is generally difficult to achieve a line width smaller than 5um, and the width of the part of the grid-shaped anode metal layer located between the mesa structure arrays is small, so that the step-up process is not suitable, and thus only the peripheral metal layer around the mesa structure arrays at the outermost periphery of the grid-shaped anode metal layer is subjected to the step-up process. Therefore, the manufacturing of the array with high PPI is not influenced, and the effect of improving the height of the anode electrode can be achieved.
Further, the step of providing a raised metal layer with a predetermined thickness on the peripheral metal layer includes: and depositing the heightened metal layer with a preset thickness on the peripheral metal layer by adopting an electron beam evaporation method and a stripping process method.
Referring to fig. 2 a-2 h and 4, wherein fig. 2f shows a side cross-sectional view of the raised metal layer 113 disposed on the perimeter metal layer 1111, and fig. 4 is a top view showing the raised metal layer 113 disposed on the perimeter metal layer 1111. Specifically, as shown in fig. 2f and fig. 4, a photoresist may be used to photo-etch the raised metal layer, then the raised metal layer 113 is deposited by electron beam evaporation, i.e. a Ti layer, an Al layer, a Ti layer and an Au layer are sequentially deposited, and finally the photoresist and the excess metal are removed by a lift-off process using acetone or a photoresist remover, so as to obtain the structure shown in fig. 2f and fig. 4.
It will be appreciated that the structure as shown in fig. 2f and 4, which is realized at this step, may be used as a micro LED intermediate structure, on which subsequent operations may be performed.
In step S107, a passivation layer may be disposed on the micro LED intermediate structure and a first contact hole and a second contact hole may be opened on the passivation layer such that the first contact hole exposes a portion of the elevated metal layer and the second contact hole exposes a portion of the cathode metal layer.
According to the embodiment of the present disclosure, a passivation layer may be disposed on the micro LED intermediate structure obtained in step S106, and contact holes may be opened to the passivation layer to expose a portion of the elevated metal layer and a portion of the cathode metal layer for making contact with the metal pad.
Specifically, when the raised metal layer with a preset thickness is disposed on the peripheral metal layer, disposing a passivation layer on the micro LED intermediate structure and forming a first contact hole and a second contact hole on the passivation layer such that the first contact hole exposes a portion of the raised metal layer, and the second contact hole exposes a portion of the cathode metal layer may include: and arranging a passivation layer on the raised metal layer, the anode metal layer without the raised metal layer, the cathode metal layer, the exposed doped rear surface and the exposed part of the mesa structure array, and forming a first contact hole and a second contact hole on the passivation layer, so that the first contact hole exposes part of the raised metal layer and the second contact hole exposes part of the cathode metal layer.
Further, disposing a passivation layer on the micro LED intermediate structure and opening a first contact hole and a second contact hole on the passivation layer may include: depositing a passivation layer on the micro LED intermediate structure by adopting a plasma enhanced chemical vapor deposition method; and forming a first contact hole and a second contact hole on the passivation layer by adopting an inductively coupled plasma etching method.
Referring to fig. 2a to 2h, fig. 2g shows a passivation layer 114 disposed on the micro LED intermediate structure and a first contact hole 1141 and a second contact hole 1142 opened on the passivation layer. As shown in FIG. 2g, a Plasma Enhanced Chemical Vapor Deposition (PECVD) process may be used to deposit SiO on the intermediate structure of the micro LED of FIG. 2f 2 Or Si 3 N 4 As the passivation layer 114, after depositing the passivation layer 114, the passivation layer 114 is coated with glue to be patterned into the first contact hole 1141 and the second contact hole 1142, and an Inductively Coupled Plasma (ICP) etching method is used to etch the first contact hole and the second contact hole by SF 6 、CHF 3 And O 2 The mixed gas etches a first contact hole 1141 and a second contact hole 1142, and the photoresist is removed to form the structure shown in fig. 2 g.
In step S108, a metal plate may be disposed on the exposed portion of the elevated metal layer and the exposed portion of the cathode metal layer, so as to obtain a red micro LED chip.
According to the embodiment of the present disclosure, in order to complete the preparation of the red micro LED chip, a metal plate may be disposed on a portion exposed by the contact hole, i.e., a metal plate implementing a connection electrode, so as to be bonded with other components to implement a corresponding function. The material of the metal plate may comprise indium, which has a low melting point and is particularly suitable for lower temperature flip chip bonding, but may of course comprise any suitable metal.
Further, disposing a metal disk on the exposed portion of the elevated metal layer and the portion of the cathode metal layer may include: and arranging a metal disc on the exposed heightened second metal layer and the partial cathode metal layer by adopting a vacuum thermal evaporation method and a stripping process method.
Referring to fig. 2 a-2 h, fig. 2h shows a side view of a metal disk 115 disposed over exposed portions of the elevated metal layer and portions of the cathode metal layer. Specifically, as shown in fig. 2h, a metal plate may be patterned by photolithography using a photoresist, an indium metal layer may be deposited by vacuum thermal evaporation, and finally, the photoresist and the excess metal may be removed by lift-off (lift-off) using acetone or a photoresist remover, so as to obtain the structure including the metal plate 115 as shown in fig. 2 h.
Thus, the red micro LED chip is completed, and fig. 2h shows the completed red micro LED chip 20. The red micro LED chip 20 is a common anode structure and is used for bonding with a driving panel by flip-chip.
The present disclosure also provides a red light micro LED chip. The red light micro LED chip can be manufactured by the preparation method of the red light micro LED chip.
As shown in fig. 2 a-2 h, the red micro LED chip 20 includes, from bottom to top, a first substrate 101, a bonding layer 102, a P-type window layer 103, a transition layer 104, a P-type confinement layer 105, an active layer 106, an N-type confinement layer 107, an N-type window layer 108, and an ohmic contact layer 109. The P-type window layer 103 includes a doped back surface 1031. And the red micro LED chip 20 further includes: an anode metal layer 111 disposed on the doped back surface 1031; a raised metal layer 113 disposed on the anode metal layer 111; a cathode metal layer 112 disposed on the ohmic contact layer 109; a passivation layer 114 disposed on the raised metal layer 113 and the cathode metal layer 112 and including a first contact hole 1141 and a second contact hole 1142, the first contact hole 1141 exposing a portion of the raised metal layer 113, and the second contact hole 1142 exposing a portion of the cathode metal layer 112; a metal pad 115 disposed on the exposed portions of the raised metal layer 113 and the cathode metal layer 112.
According to the embodiment of the present disclosure, the anode metal layer 111 is in a grid shape, and the grid-shaped anode metal layer 111 includes a peripheral metal layer 1111 at an outermost periphery.
According to an embodiment of the present disclosure, the raised metal layer 113 is disposed on the peripheral metal layer 1111.
According to an embodiment of the present disclosure, the first substrate is a sapphire substrate.
It is to be noted that any relevant description (including but not limited to technical features and their actions, explanations, etc.) about the structure of the red micro LED chip in the above-mentioned red micro LED chip preparation method can be applied to the red micro LED chip of the present disclosure.
The present disclosure also provides a display device. The display device comprises the red light micro LED chip. The display device may be, for example, a display screen applied to an electronic apparatus. The electronic device may include: any equipment with a display screen, such as a smart phone, a smart watch, a notebook computer, a tablet computer, a vehicle event data recorder, a navigator and the like.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, and it should be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof, unless the context clearly indicates otherwise.
It should be appreciated that reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment of the present application. Thus, the appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. It should be understood that, in the various embodiments of the present application, the sequence numbers of the above steps/processes do not mean the execution sequence, and the execution sequence of the steps/processes should be determined by their functions and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application. The above-mentioned numbers of the embodiments of the present application are merely for description, and do not represent the merits of the embodiments.
It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged under appropriate circumstances such that, for example, embodiments of the application described herein may be implemented in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The above description is only a preferred embodiment of the present disclosure and is not intended to limit the present disclosure, and various modifications and changes may be made to the present disclosure by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present disclosure should be included in the protection scope of the present disclosure.

Claims (13)

1. A preparation method of a red micro LED chip comprises the following steps:
providing a first red light micro LED epitaxial wafer, wherein the first red light micro LED epitaxial wafer sequentially comprises a first substrate, a bonding layer, a P-type window layer, a transition layer, a P-type limiting layer, an active layer, an N-type limiting layer, an N-type window layer and an ohmic contact layer from bottom to top;
etching the first red light micro LED epitaxial wafer from the ohmic contact layer until the P-type window layer is exposed to obtain a mesa structure array;
doping the exposed surface of the P-type window layer to form a doped surface;
arranging an anode metal layer on the doped surface;
a cathode metal layer is arranged on the ohmic contact layer of each mesa structure of the mesa structure array;
arranging an elevated metal layer on the anode metal layer to obtain a micro LED intermediate structure;
arranging a passivation layer on the micro LED intermediate structure, and forming a first contact hole and a second contact hole on the passivation layer, so that the first contact hole exposes part of the elevated metal layer, and the second contact hole exposes part of the cathode metal layer;
and arranging metal discs on the exposed part of the heightened metal layer and the part of the cathode metal layer to obtain the red light micro LED chip.
2. The method of claim 1, wherein the doping the exposed surface of the P-type window layer to form a doped back surface comprises:
by using CO 2 And as an injection source, carrying out carbon doping on the exposed surface of the P-type window layer to form a doped surface so as to enable the doping concentration of the doped surface to reach a preset doping concentration.
3. The method for preparing the red micro LED chip according to claim 2, wherein the preset doping concentration is in a range of 10 19 cm -3 To 10 20 cm -3 。
4. The method of claim 1, wherein the disposing an anode metal layer on the doped rear surface comprises:
and arranging a grid-shaped anode metal layer on the doped rear surface, wherein the grid-shaped anode metal layer comprises a peripheral metal layer surrounding the mesa structure array at the outermost periphery.
5. The method for preparing the red micro LED chip according to claim 4, wherein the disposing of the elevated metal layer on the anode metal layer comprises:
and arranging the heightened metal layer with a preset thickness on the peripheral metal layer.
6. The method of claim 5, wherein the providing a passivation layer on the micro LED intermediate structure and opening a first contact hole and a second contact hole on the passivation layer such that the first contact hole exposes a portion of the elevated metal layer and the second contact hole exposes a portion of the cathode metal layer comprises:
and arranging a passivation layer on the raised metal layer, the anode metal layer without the raised metal layer, the cathode metal layer, the exposed doped rear surface and the exposed part of the mesa structure array, and forming a first contact hole and a second contact hole on the passivation layer, so that the first contact hole exposes part of the raised metal layer and the second contact hole exposes part of the cathode metal layer.
7. The method of manufacturing a red micro LED chip according to claim 1, wherein the providing a first red micro LED epitaxial wafer comprises:
obtaining a second red light micro LED epitaxial wafer, wherein the second red light micro LED epitaxial wafer comprises a second substrate, an ohmic contact layer, an N-type window layer, an N-type limiting layer, an active layer, a P-type limiting layer, a transition layer and a P-type window layer;
and transferring the part of the second red light micro LED epitaxial wafer except the second substrate to the first substrate through the bonding layer to obtain the first red light micro LED epitaxial wafer.
8. The method of any one of claims 1 to 7, wherein the first substrate is a sapphire substrate, the bonding layer is a bonding glue or oxide layer, the P-type window layer is a GaP layer, the transition layer is an AlGaInP layer, the P-type confinement layer is an AlInP layer, the active layer is an AlGaInP multilayer quantum well, the N-type confinement layer is an AlInP layer, the N-type window layer is an AlGaInP layer, and the ohmic contact layer is a GaAs layer.
9. A red light micro LED chip comprises a first substrate, a bonding layer, a P-type window layer, a transition layer, a P-type limiting layer, an active layer, an N-type limiting layer, an N-type window layer and an ohmic contact layer from bottom to top in sequence, wherein the P-type window layer comprises a doped back surface,
and the red micro LED chip further comprises:
an anodic metal layer disposed on the doped rear surface;
a raised metal layer disposed on the anode metal layer;
a cathode metal layer disposed on the ohmic contact layer;
a passivation layer disposed on the elevated metal layer and the cathode metal layer and including a first contact hole exposing a portion of the elevated metal layer and a second contact hole exposing a portion of the cathode metal layer;
a metal disk disposed on the exposed portion of the elevated metal layer and the portion of the cathode metal layer.
10. The red micro LED chip of claim 9, wherein the first substrate is a sapphire substrate.
11. The red micro LED chip of claim 9, wherein the anode metal layer is in a grid shape, the grid-shaped anode metal layer including a peripheral metal layer at an outermost periphery.
12. The red micro LED chip of claim 11, wherein the elevated metal layer is disposed on the perimeter metal layer.
13. A display device, wherein the display device comprises the red micro LED chip of any one of claims 9 to 12.
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