CN115470920A

CN115470920A - Quantum bit calibration method and device and quantum computer

Info

Publication number: CN115470920A
Application number: CN202210309146.9A
Authority: CN
Inventors: 孔伟成
Original assignee: Origin Quantum Computing Technology Co Ltd
Current assignee: Origin Quantum Computing Technology Co Ltd
Priority date: 2022-03-28
Filing date: 2022-03-28
Publication date: 2022-12-13
Anticipated expiration: 2042-03-28
Also published as: CN115470920B

Abstract

The invention discloses a quantum bit calibration method, a device and a quantum computer, wherein the quantum bit calibration method realizes the automatic calibration of quantum bit parameters by combining a first directed acyclic graph and the weight of each quantum bit parameter, and when an error occurs, the detection and calibration of the quantum bit parameters are not needed one by one, so that the calibration time is effectively saved, and the efficiency of the quantum bit parameter calibration is improved to a certain extent.

Description

Quantum bit calibration method and device and quantum computer

Technical Field

The invention relates to the field of quantum computing, in particular to a quantum bit calibration method and device and a quantum computer.

Background

Quantum computing and quantum information are a cross discipline for realizing computing and information processing tasks based on the principle of quantum mechanics, and are closely related to disciplines such as quantum physics, computer discipline, informatics and the like. There has been rapid development in the last two decades. Quantum computer-based quantum algorithms for scenarios such as factorization, unstructured search, etc., exhibit performance far exceeding existing classical computer-based algorithms, and this direction is also being placed on expectations beyond existing computing capabilities. Since quantum computing has a potential for solving a specific problem far beyond the performance of a classical computer, in order to realize a quantum computer, a quantum chip containing a sufficient number of qubits and a sufficient quality of qubits is required, and extremely high-fidelity operation and reading of a quantum logic gate can be performed on the qubits.

The quantum chip is equivalent to a quantum computer as a CPU (central processing unit) and is a core component of the quantum computer. With the continuous research and advance of the quantum computing related technology, the quantum bit number on the quantum chip is also increased year by year, and it is expected that a larger-scale quantum chip will appear subsequently, the quantum bit number in the quantum chip will be more at that time, and the larger-scale quantum chip will be carried in the quantum computer. With the increase of the number of qubits in the quantum chip, the problem of parameter drift of some qubits is necessarily faced in the use process, and at this time, corresponding calibration operation needs to be performed on the qubits.

Generally, in the process from research and development to online use, a quantum chip needs to go through a plurality of early test stages until the performance parameters of the quantum chip meet the online requirement, and then the quantum chip can be used online. In the early testing stage, all the qubits in the quantum chip can be tested and calibrated in detail according to a set of testing procedures, so that the specific parameters which drift can be obtained in time in the early testing stage. After online use, for example, when a certain quantum chip executes a quantum computing task, the performance of a certain qubit in the quantum chip is abnormal, and it is impossible to acquire which specific parameter is drifted in time. In the prior art, for the problem, a worker usually judges according to the output signal of the qubit according to past experience, and the scheme has low efficiency, thereby greatly influencing the execution efficiency of the quantum computing task.

Therefore, it is an urgent problem in the art to provide a scheme capable of realizing automatic calibration of qubit parameters.

It is noted that the information disclosed in this background section is only for enhancement of understanding of the general background of the application and should not be taken as an acknowledgement or any form of suggestion that this information constitutes prior art already known to a person skilled in the art.

Disclosure of Invention

The invention aims to provide a quantum bit calibration method and device and a quantum computer, which are used for solving the problem that the quantum bit calibration scheme in the prior art is low in efficiency.

In order to solve the above technical problem, the present application provides a method for calibrating a quantum bit, including:

obtaining a first directed acyclic graph, wherein the first directed acyclic graph is used for representing a plurality of quantum bit parameters of a quantum bit to be tested and a dependency relationship among the plurality of quantum bit parameters;

judging whether the quantum bit to be detected has errors or not when executing a quantum computing task;

if so, selecting a target parameter to be calibrated based on a first weight of each qubit parameter of the qubit to be tested and the first directed acyclic graph, wherein the first weight is used for calibrating the weight of each qubit parameter when the qubit to be tested has an error, and the target parameter to be calibrated is a qubit parameter corresponding to a root node which causes the qubit to be tested to have an error in the first directed acyclic graph;

calibrating the target parameter to be calibrated, and returning to execute the judgment of whether the quantum bit to be calibrated has errors or not when executing the quantum computing task;

and if not, completing the calibration of the qubit to be tested.

Optionally, the size of the corresponding first weight is determined based on the degree of each qubit parameter in the first directed acyclic graph.

Optionally, the size of the out-degree of each qubit parameter in the first directed acyclic graph is in a direct proportion to the size of the corresponding first weight.

Optionally, the size of the corresponding first weight is determined based on a distance of each qubit parameter in the first directed acyclic graph, where the distance is a path length from a position of each qubit parameter in the first directed acyclic graph to an end point of the first directed acyclic graph.

Optionally, the distance of each qubit in the first directed acyclic graph has a direct relationship with the corresponding first weight.

Optionally, the magnitude of the corresponding first weight is determined based on a first probability of an error occurring in each qubit parameter, where the first probability is obtained through test data of the qubit to be tested in a test phase.

Optionally, the magnitude of the first probability of the error occurring in each qubit parameter is in a direct proportion to the magnitude of the corresponding first weight.

Optionally, the first weight of each qubit parameter is obtained by the following formula:

Ω＝D*L*ε

wherein Ω is the first weight, D is the degree of the qubit parameter in the first directed acyclic graph, L is the distance of the qubit parameter in the first directed acyclic graph, and e is the first probability of the qubit parameter being in error.

Optionally, the selecting a target parameter to be calibrated based on the first weight of each qubit parameter of the qubit to be tested and the first directed acyclic graph includes:

and selecting target parameters to be calibrated by combining the first directed acyclic graph according to the sequence of the first weight from large to small.

Optionally, the selecting a target parameter to be calibrated by combining the first directed acyclic graph according to the sequence of the first weight from large to small includes:

traversing first quantum bit parameters according to the sequence of the first weight values from large to small, and if the currently traversed quantum bit parameters are not wrong, setting the quantum bit parameters corresponding to all parent nodes in the first directed acyclic graph, which have a direct connection relation or an indirect connection relation with the currently traversed quantum bit parameters, to be in a traversed state, so as to obtain the target parameter to be calibrated, wherein the first quantum bit parameters are quantum bit parameters in a non-traversed state, all the quantum bit parameters are in the non-traversed state in an initial state, and the currently traversed quantum bit parameters are set to be in the traversed state after each traversal.

Based on the same inventive concept, the present application also provides a quantum bit calibration apparatus, comprising:

the device comprises a directed acyclic graph acquisition module, a first data processing module and a second data processing module, wherein the directed acyclic graph acquisition module is configured to acquire a first directed acyclic graph, and the first directed acyclic graph is used for representing a plurality of quantum bit parameters of a quantum bit to be tested and a dependency relationship among the plurality of quantum bit parameters;

a judging module configured to judge whether an error occurs in the qubit to be tested when the quantum computing task is executed;

a processing module configured to select a target parameter to be calibrated based on a first weight of each qubit parameter of the qubit to be calibrated and the first directed acyclic graph when a determination result is yes, where the first weight is used to calibrate a weight of each qubit parameter when the qubit to be calibrated has an error, and the target parameter to be calibrated is a qubit parameter corresponding to a root node in the first directed acyclic graph that causes the qubit to be calibrated to have the error;

and the processing module is also configured to finish the calibration of the qubit to be tested when the judgment result is negative.

Based on the same inventive concept, the application also provides a quantum control system, which utilizes the quantum bit calibration method described in any of the above feature descriptions to calibrate the quantum bit parameters, or comprises the quantum bit calibration device.

Based on the same inventive concept, the application also provides a quantum computer which comprises the quantum control system.

Based on the same inventive concept, the present application also proposes a readable storage medium, on which a computer program is stored, which, when being executed by a processor, is capable of implementing the qubit calibration method according to any of the above-mentioned features.

Compared with the prior art, the invention has the following beneficial effects:

according to the quantum bit calibration method provided by the invention, a plurality of quantum bit parameters for representing a quantum bit to be tested and a first directed acyclic graph of a dependency relationship among the plurality of quantum bit parameters are utilized, and whether an error occurs in the quantum bit to be tested when a quantum computing task is executed is judged at first. If so, selecting a target parameter to be calibrated based on a first weight of each qubit parameter of the qubit to be tested and the first directed acyclic graph, wherein the first weight is used for calibrating the weight of each qubit parameter when the qubit to be tested has an error, and the target parameter to be calibrated is a qubit parameter corresponding to a root node which causes the qubit to be tested to have the error in the first directed acyclic graph; and then calibrating the target parameter to be calibrated, and returning to execute the judgment of whether the error occurs in the quantum bit to be calibrated when the quantum computing task is executed. And if not, completing the calibration of the qubit to be tested. By utilizing the scheme, the automatic calibration of the quantum bit parameters is realized through the combination of the first directed acyclic graph and the weight of each quantum bit parameter, and when an error occurs, the quantum bit parameters do not need to be detected and calibrated one by one, so that the calibration time is effectively saved, and the efficiency of the quantum bit parameter calibration is improved to a certain extent.

The invention also provides a quantum bit calibration device, a quantum control system, a quantum computer and a readable storage medium, which belong to the same inventive concept as the quantum bit calibration method, so that the invention has the same beneficial effects, and the details are not repeated.

Drawings

Fig. 1 is a schematic flowchart of a method for calibrating quantum bits according to an embodiment of the present disclosure;

FIG. 2 is an exemplary graph of a first directed acyclic graph shown in an embodiment of the present application;

FIG. 3 is a schematic view of traversal of the node in FIG. 2 corresponding to the qubit parameter;

fig. 4 is a schematic structural diagram of a qubit calibration device according to another embodiment of the present application.

Detailed Description

The following describes in more detail embodiments of the present invention with reference to the schematic drawings. Advantages and features of the present invention will become apparent from the following description and claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is provided for the purpose of facilitating and clearly illustrating embodiments of the present invention.

In the description of the present invention, it is to be understood that the terms "center", "upper", "lower", "left", "right", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience in describing the present invention and simplifying the description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or to implicitly indicate the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.

Referring to fig. 1, an embodiment of the present invention provides a method for calibrating quantum bits, including:

s1: obtaining a first directed acyclic graph, wherein the first directed acyclic graph is used for representing a plurality of quantum bit parameters of a quantum bit to be tested and a dependency relationship among the plurality of quantum bit parameters;

s2: judging whether the quantum bit to be detected has errors when executing a quantum computing task;

s3: if so, selecting a target parameter to be calibrated based on a first weight of each qubit parameter of the qubit to be tested and the first directed acyclic graph, wherein the first weight is used for calibrating the weight of each qubit parameter when the qubit to be tested has an error, and the target parameter to be calibrated is a qubit parameter corresponding to a root node which causes the qubit to be tested to have an error in the first directed acyclic graph;

s4: calibrating the target parameter to be calibrated, and returning to execute the judgment whether the quantum bit to be calibrated generates errors when executing the quantum computing task (namely returning to the step S2);

s5: and if not, completing the calibration of the qubit to be tested.

The method for calibrating the quantum bit is different from the prior art in that a first directed acyclic graph used for representing a plurality of quantum bit parameters of the quantum bit to be tested and the dependency relationship among the plurality of quantum bit parameters is used, and whether an error occurs in the quantum bit to be tested when a quantum computing task is executed or not is judged. If so, selecting a target parameter to be calibrated based on a first weight of each qubit parameter of the qubit to be tested and the first directed acyclic graph, wherein the first weight is used for calibrating the weight of each qubit parameter when the qubit to be tested has an error, and the target parameter to be calibrated is a qubit parameter corresponding to a root node which causes the qubit to be tested to have an error in the first directed acyclic graph; and then calibrating the target parameter to be calibrated, and returning to execute the judgment of whether the error occurs in the quantum bit to be calibrated when the quantum computing task is executed. And if not, completing the calibration of the qubit to be tested. By utilizing the scheme, the automatic calibration of the quantum bit parameters is realized through the combination of the first directed acyclic graph and the weight of each quantum bit parameter, and when an error occurs, the quantum bit parameters do not need to be detected and calibrated one by one, so that the calibration time is effectively saved, and the efficiency of the quantum bit parameter calibration is improved to a certain extent.

For facilitating understanding of the technical solution of the present application, in this embodiment, all the first directed acyclic graphs take the directed acyclic graph shown in fig. 2 as an example, please refer to fig. 2, where each node represents a different qubit parameter, for example, a parameter of a single-bit logic gate of a qubit or a parameter of a control signal of the qubit, the parameter of the single-bit logic gate includes, but is not limited to, a voltage amplitude of a pi pulse or a frequency of a readout pulse, a pi pulse length, a pi/2 pulse length, a pi pulse amplitude and a pi/2 pulse amplitude, the parameter of the control signal of the qubit includes, but is not limited to, a readout pulse frequency, a readout pulse length, a readout pulse power, and many other qubit parameters, which are not repeated herein and may be determined specifically according to a type and a characteristic of the qubit. The directed acyclic graph in fig. 2 shows a dependency relationship of each qubit parameter, where a backward node is affected by a forward node having a connection relationship, the forward node refers to a starting point of an arrow in the graph, and a backward node refers to a pointing point of the arrow in the graph, and certainly the forward node and the backward node are defined relatively and do not have a fixed relationship for a certain node, for example, node 2 is a backward node of node 1 and is also a forward node of node 3, so node 2 is affected by node 1, node 2 also affects node 3 at the same time, and other nodes and so on are not repeated herein. In fig. 2, node 1 is the starting node of the whole directed acyclic graph, and node 13 is the terminating node of the whole directed acyclic graph.

In this embodiment, the magnitude of the corresponding first weight may be determined based on the out-degree of each qubit parameter in the first directed acyclic graph. Specifically, referring to table 1, the out-degree of each qubit parameter in the first directed acyclic graph is in a direct proportion to the corresponding first weight.

Further, in this embodiment, as can be seen from table 1, the size of the corresponding first weight may also be determined based on a distance of each qubit parameter in the first directed acyclic graph, where the distance is a path length from a position of each qubit parameter in the first directed acyclic graph to an end point of the first directed acyclic graph. Specifically, the distance of each qubit in the first directed acyclic graph has a direct relationship with the corresponding first weight.

Further, in this embodiment, as can be seen from table 1, the magnitude of the corresponding first weight may also be determined based on a first probability of errors occurring in each qubit parameter, where the first probability is obtained through test data of the qubit to be tested in a test phase. Specifically, the magnitude of the first probability of error occurrence of each qubit parameter is in a direct proportion to the magnitude of the corresponding first weight.

Further, the first weight of each qubit parameter is obtained by the following formula:

wherein Ω is the first weight, D is the degree of quantum bit parameter in the first directed acyclic graph, L is the distance of quantum bit parameter in the first directed acyclic graph, and e is the first probability of quantum bit parameter error.

TABLE 1 weight table for each node

In this embodiment, the selecting, in the step S3, a target parameter to be calibrated based on the first weight of each qubit parameter of the qubit to be measured and the first directed acyclic graph includes:

Specifically, the target parameter to be calibrated may be selected as follows:

As can be seen from fig. 2 and table 1, according to the scheme of the present application, the first weights of the nodes in fig. 2 are, in descending order: node 5, node 3, node 1, node 7, node 10, node 4, node 6, node 2, node 8, node 11, node 9, node 12, node 13. Therefore, when the quantum bit parameter calibration is performed according to the scheme provided by the present application, parameters corresponding to each node in the directed acyclic graph in fig. 2 may be traversed according to the traversal scheme shown in fig. 3, and the target parameter to be calibrated is found.

In order to better understand the technical solution of the application, the following briefly introduces the traversal scheme of fig. 3 with reference to fig. 2 and table 1, and suppose that a qubit has an error during operation of a quantum computing task, the qubit needs to be calibrated, and we assume that the root cause of a current error is caused by the error in the qubit parameter of node 3, that is, assume that node 3 is the target parameter to be calibrated, then the specific calibration scheme is:

according to the first weight shown in table 1, it can be known that the first weight of the qubit parameter corresponding to the node 5 in the qubit is the largest, so that the node 5 is traversed first to determine whether the qubit parameter corresponding to the node 5 is wrong. If no error occurs in the node 5, it indicates that all the forward nodes of the node 5 having the direct connection relationship or the indirect connection relationship have no error, and it is easy to see through fig. 2 that the node 1, the node 2, and the node 3 are all correct. Therefore, node 1, node 2, node 3, and node 5 are all marked as traversed and do not participate in the traversal process in the subsequent traversal. As can be seen from the foregoing description, if node 5 has no error, the next node to be traversed is node 7 in the order of the magnitude of the weights shown in table 1. Since it is assumed that the qubit parameter of the node 3 is erroneous, the node 5 is inevitably in an error condition in the current calibration process, and therefore, according to the order of the magnitude of the weight, the next node to be traversed is the node 3, and at this time, if the node 3 is not in error, it is obvious from fig. 2 that, because the node 3 is the only forward node of the node 5 having a direct connection relationship, and the node 3 is not in error, but the node 5 is in error, the node 5 is the root cause of the error of the quantum computing task. And node 3 actually has an error, so we need to continue traversing the remaining quantum bit parameters, at this time, node 3 is marked as a traversed state, and according to the weight value order in table 1, the next node to be traversed is node 1, and if node 1 has an error, node 1 is the root cause of the error of the quantum computing task because node 1 is the initial node. It is known that since the node 3 is the target parameter to be calibrated, the determination result of the node 1 is necessarily no error, and it is not difficult to see in fig. 2, since the forward node that can cause the error of the node 3 is only the node 1 and the node 2, at this time, the node 1 is correct, and therefore, the next node to be traversed may be the node 7 in the order of the weight values in table 1, but in order to improve the efficiency of traversal, at this time, traversing the node 2 is obviously a scheme with higher efficiency, and therefore, in the case that the node 1 is correct, the next node to be traversed is the node 2, and obviously, the determination result of the node 2 is no error, and therefore, the target parameter to be calibrated is finally obtained as the node 3.

The technical solution of the present application is briefly described above by taking the node 3 as the target parameter to be calibrated as an example, and the process may be referred to in the traversal process of the qubit parameter when other nodes are the target parameter to be calibrated, which is not repeated herein. Existing calibration schemes, which traverse from node 1 to node 13, or from node 13 to node 1, or from the node at the middle, are inefficient. The method for traversing the quantum bit parameters by using the scheme of the first weight can effectively improve the efficiency of quantum bit parameter calibration.

Based on the same inventive concept, referring to fig. 4, the present embodiment further provides a quantum bit calibration apparatus, including:

a directed acyclic graph obtaining module 100 configured to obtain a first directed acyclic graph, where the first directed acyclic graph is used to represent a plurality of qubit parameters of a qubit to be measured and a dependency relationship between the plurality of qubit parameters;

a determining module 200 configured to determine whether an error occurs in the qubit to be tested when executing the quantum computing task;

a processing module 300, configured to select a target parameter to be calibrated based on a first weight of each qubit parameter of the qubit to be calibrated and the first directed acyclic graph when a determination result is yes, where the first weight is used to calibrate a weight of each qubit parameter when the qubit to be calibrated has an error, and the target parameter to be calibrated is a qubit parameter corresponding to a root node in the first directed acyclic graph that causes the qubit to be calibrated to have the error;

the processing module 300 is further configured to complete calibration of the qubit to be tested when the determination result is negative.

It is understood that the directed acyclic graph obtaining module 100, the judging module 200, and the processing module 300 may be combined into one device, or any one of the modules may be split into a plurality of sub-modules, or at least part of functions of one or more of the directed acyclic graph obtaining module 100, the judging module 200, and the processing module 300 may be combined with at least part of functions of other modules and implemented in one functional module. According to an embodiment of the present invention, at least one of the directed acyclic graph obtaining module 100, the judging module 200, and the processing module 300 may be at least partially implemented as a hardware circuit, such as a Field Programmable Gate Array (FPGA), a Programmable Logic Array (PLA), a system on a chip, a system on a substrate, a system on a package, an Application Specific Integrated Circuit (ASIC), or may be implemented in hardware or firmware in any other reasonable manner of integrating or packaging a circuit, or in a suitable combination of three implementations of software, hardware, and firmware. Alternatively, at least one of the directed acyclic graph obtaining module 100, the judging module 200, and the processing module 300 may be at least partially implemented as a computer program module, and when the program is executed by a computer, the function of the corresponding module may be executed.

Based on the same inventive concept, this embodiment further provides a quantum control system, which performs calibration of qubit parameters by using the qubit calibration method described in any of the above feature descriptions, or includes the qubit calibration device described in the above feature description 11.

Based on the same inventive concept, the present embodiment further provides a quantum computer, including the quantum control system described in the above feature description.

Based on the same inventive concept, the present embodiment further provides a readable storage medium, on which a computer program is stored, and the computer program, when executed by a processor, can implement the qubit calibration method described in any of the above feature descriptions.

The readable storage medium may be a tangible device that can hold and store the instructions for use by the instruction execution device, such as, but not limited to, an electronic memory device, a magnetic memory device, an optical memory device, an electromagnetic memory device, a semiconductor memory device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a Static Random Access Memory (SRAM), a portable compact disc read-only memory (CD-ROM), a Digital Versatile Disc (DVD), a memory stick, a floppy disk, a mechanical coding device, such as punch cards or in-groove projection structures having instructions stored thereon, and any suitable combination of the foregoing. The computer program described herein may be downloaded from a readable storage medium to a respective computing/processing device, or to an external computer or external storage device over a network, such as the internet, a local area network, a wide area network, and/or a wireless network. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers and/or edge servers. The network adapter card or network interface in each computing/processing device receives the computer program from the network and forwards the computer program for storage in a readable storage medium in the respective computing/processing device. Computer programs for carrying out operations of the present invention may be assembler instructions, instruction Set Architecture (ISA) instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The computer program may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider). In some embodiments, aspects of the invention are implemented by personalizing a custom electronic circuit, such as a programmable logic circuit, a Field Programmable Gate Array (FPGA), or a Programmable Logic Array (PLA), with state information of a computer program, the electronic circuit being operable to execute computer-readable program instructions.

Aspects of the present invention are described herein with reference to flowchart illustrations and/or block diagrams of methods, systems and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer programs. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the programs, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. Such a computer program may also be stored in a readable storage medium that can direct a computer, programmable data processing apparatus, and/or other devices to function in a particular manner, such that the readable storage medium storing the computer program comprises an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.

The computer program may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the computer program which executes on the computer, other programmable apparatus or other devices implements the functions/acts specified in the flowchart and/or block diagram block or blocks.

In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example" or "a specific example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. And the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments. Furthermore, various embodiments or examples described in this specification can be combined and combined by those skilled in the art.

The above description is only a preferred embodiment of the present invention, and does not limit the present invention in any way. It will be understood by those skilled in the art that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. A method of quantum bit alignment, comprising:

and if not, completing the calibration of the qubit to be tested.

2. The method of qubit calibration of claim 1, wherein a magnitude of the corresponding first weight is determined based on an out-degree of each qubit parameter in the first directed acyclic graph.

3. The method of claim 2, wherein the degree of out-scaling of each qubit parameter in the first directed acyclic graph is in direct proportion to the corresponding first weight.

4. The method of qubit calibration of claim 2, wherein a magnitude of the corresponding first weight is determined based on a distance of each qubit parameter in the first directed acyclic graph, wherein the distance is a path length from a position of each qubit parameter in the first directed acyclic graph to an end point of the first directed acyclic graph.

5. The method of claim 4, wherein a magnitude of a distance of each qubit in the first directed acyclic graph is directly proportional to a magnitude of the corresponding first weight.

6. The qubit calibration method of claim 4, wherein the magnitude of the corresponding first weight is determined based on a first probability of errors occurring for each qubit parameter, wherein the first probability is obtained from test data of the qubit under test during a test phase.

7. The method of claim 6, wherein the magnitude of the first probability of error occurring for each qubit parameter is directly proportional to the magnitude of the corresponding first weight.

8. The qubit calibration method of claim 6, wherein the first weight of each qubit parameter is obtained by a formula:

Ω＝D*L*ε

9. The method of claim 1, wherein the selecting the target parameter to be calibrated based on the first weight of each qubit parameter of the qubit to be tested and the first directed acyclic graph comprises:

10. The method of calibrating qubits according to claim 9, wherein the selecting the target parameter to be calibrated by combining the first directed acyclic graph in order from large to small according to the first weight comprises:

11. A quantum bit alignment apparatus, comprising:

a processing module, configured to select a target parameter to be calibrated based on a first weight of each qubit parameter of the qubit to be tested and the first directed acyclic graph when a determination result is yes, where the first weight is used to calibrate a weight of each qubit parameter when the qubit to be tested has an error, and the target parameter to be calibrated is a qubit parameter corresponding to a root node that causes the qubit to be tested to have the error in the first directed acyclic graph;

calibrating the target parameter to be calibrated, and returning to execute the judgment whether the quantum bit to be calibrated has errors when executing the quantum computing task;

12. A quantum control system, characterized in that the calibration of qubit parameters is performed using a qubit calibration method according to any of claims 1 to 10, or comprising a qubit calibration device according to claim 11.

13. A quantum computer comprising the quantum control system of claim 12.

14. A readable storage medium, on which a computer program is stored, which, when being executed by a processor, is able to carry out the method of qubit calibration according to any one of claims 1 to 10.