CN118095455A - Quantum bit control method and device and quantum computer - Google Patents
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Abstract
The invention discloses a quantum bit control method and device and a quantum computer, which are used for balancing the influence of a gate bit on a two-quantum bit logic gate executed by a gate bit by providing a compensation pulse for an adjustable coupler, biasing the two-quantum bit logic gate to the coupling strength with equal magnitude and opposite sign, effectively reducing the probability of excited observation bit, making up the blank of the prior art and improving the accuracy and efficiency of the quantum chip to execute quantum computing tasks in parallel.
Description
Technical Field
The present invention relates to the field of quantum computing technologies, and in particular, to a method and an apparatus for controlling a quantum bit, and a quantum computer.
Background
Quantum computation and quantum information are a cross subject for realizing computation and information processing tasks based on the principle of quantum mechanics, and have very close connection with subjects such as quantum physics, computer science, informatics and the like. There has been a rapid development in the last two decades. Quantum computer-based quantum algorithms in factorization, unstructured search, etc. scenarios exhibit far beyond the performance of existing classical computer-based algorithms, and this direction is expected to be beyond the existing computing power. Since quantum computing has a potential to solve specific problems far beyond the development of classical computer performance, in order to realize a quantum computer, it is necessary to obtain a quantum chip containing a sufficient number and a sufficient mass of qubits, and to enable quantum logic gate operation and reading of the qubits with extremely high fidelity. The quantum chip is the core component of the quantum computer, and the quantum chip is the processor for executing quantum computation. Before each quantum chip is formally used on line, each parameter of the quantum bit in the quantum chip needs to be tested and characterized.
Similar to classical bits, in performing quantum computation with qubits, it is inevitably necessary to apply a qubit logic gate to the qubits, which in effect refers to a series of regulatory signals for the qubits. The qubit logic gate mainly comprises a single-qubit logic gate and a two-qubit logic gate, wherein the two-qubit logic gate comprises CNOT, SWAP, CZ and the like. When two quantum bits on a quantum chip are used for making a two-quantum bit logic gate, the two quantum bits are called gate bits, any quantum bit with dispersive coupling action with the gate bits is called observation bit, and the observation bit influences the resonance condition of the two-quantum bit logic gate to a certain extent, so that the fidelity of the two-quantum bit logic gate is reduced. Since the coupling between the tunable coupler and the observation bit is in practice due to various stray capacitances, the coupling strength between them cannot be completely 0, and the effective coupling of bits between diagonals cannot be completely turned off. Taking fig. 1 as an example, when Q 1 and Q 2 implement a CZ gate, the wave function on C 10 is enhanced, and the coupling between C 10 and Q 0 causes Q 0 to be excited with probability, and then Q 1 and Q 0 act. If this effect is not resolved, it can severely affect the state of surrounding bits, thereby limiting the accuracy and efficiency of quantum chip parallel execution of quantum computing tasks.
It should be noted that the information disclosed in the background section of the present application is only for enhancement of understanding of the general background of the present application and should not be taken as an admission or any form of suggestion that this information forms the prior art already known to those skilled in the art.
Disclosure of Invention
The invention aims to provide a quantum bit control method and device and a quantum computer, which are used for solving the problem that gate bits in the prior art influence the states of surrounding observation bits when two quantum bit logic gates are executed, so as to limit the accuracy and efficiency of quantum chip parallel execution quantum computing tasks.
In order to solve the above technical problems, the present invention provides a method for controlling a qubit, which is characterized by comprising:
When no compensation pulse is applied to the first adjustable coupler, a plurality of two-qubit logic gates are applied to the gate bit, when the acquired delay is at different values, the delay corresponding to the extreme point of the observation bit in the first selected eigenstate is the first delay, wherein the delay is the interval between the two-qubit logic gates, and the first adjustable coupler is an adjustable coupler for coupling the observation bit and the gate bit;
applying compensation pulses with different amplitudes to the first adjustable coupler, and applying a plurality of two-qubit logic gates to the gate bit based on the selected first delay to obtain that the amplitude of the compensation pulse corresponding to the extreme point of the observation bit in the first selected eigenstate is a first amplitude;
The compensation pulse is determined based on the first amplitude.
Optionally, when no compensation pulse is applied to the first adjustable coupler, applying a plurality of two-qubit logic gates to the gate bit, and when the obtained delay is at different values, the delay corresponding to the extreme point of the observation bit in the first selected eigenstate is the first delay, including:
applying a plurality of two-quantum bit logic gates to the gate bits to obtain first distribution change of observation bits in a first selected eigenstate when the delay is at different values;
And acquiring the delay corresponding to the extreme point of the observation bit in the first selected eigenstate as a first delay.
Optionally, the applying the compensation pulse with different amplitude to the first adjustable coupler applies a plurality of two-qubit logic gates to the gate bit based on the selected first delay, and obtains the amplitude of the compensation pulse corresponding to the extremum point of the observation bit in the first selected eigenstate as the first amplitude, which includes:
Based on the selected first delay, applying a plurality of two-qubit logic gates to the gate bit, and applying compensation pulses with different amplitudes to the first adjustable coupler, so as to obtain second distribution change of the observation bit in a first selected eigenstate when the amplitudes of the compensation pulses are different values;
And acquiring the amplitude corresponding to the extreme point of the observation bit in the first selected eigenstate as a first amplitude based on the second distribution change.
Optionally, the number of compensation pulses applied to the first tunable coupler at a time includes one or more.
Optionally, the second distribution variation includes a first sub-distribution and a second sub-distribution;
Wherein the first sub-distribution is a change condition of the observation bit in a first selected eigenstate when the amplitude of the compensation pulse is a different value each time the number of the compensation pulses applied to the first adjustable coupler is one;
The second sub-distribution is such that the observation bit is in a change of a first selected eigenstate each time the number of compensation pulses applied to the first tunable coupler is a plurality of, the amplitudes of the compensation pulses being different values.
Optionally, the acquiring, based on the second distribution change, the amplitude corresponding to the extreme point of the observation bit in the first selected eigenstate as the first amplitude includes:
And acquiring the amplitude corresponding to the intersection point of the extreme point of the observation bit in the first selected eigenstate in the first sub-distribution and the extreme point of the observation bit in the first selected eigenstate in the second sub-distribution as the first amplitude.
Optionally, the first selected eigenstate is an excited state.
Optionally, the delay corresponding to the maximum point of the observation bit in the excited state is the first delay.
Optionally, the amplitude of the compensation pulse corresponding to the minimum value point of the observation bit in the excited state is a first amplitude.
Based on the same inventive concept, the invention also provides a control device of the quantum bit, comprising:
the first delay acquisition module is configured to apply a plurality of two-qubit logic gates to the gate bit when no compensation pulse is applied to the first adjustable coupler, acquire the delay corresponding to the extreme point of the observation bit in the first selected eigenstate as the first delay when the delay is in different values, wherein the delay is the interval between the two applied qubit logic gates, and the first adjustable coupler is an adjustable coupler for coupling and connecting the observation bit and the gate bit;
The first amplitude acquisition module is configured to apply the compensation pulses with different amplitudes to the first adjustable coupler, apply a plurality of two-qubit logic gates to the gate bit based on the selected first delay, and acquire the amplitude of the compensation pulse corresponding to the extreme point of the observation bit in the first selected eigenstate as a first amplitude;
A compensation pulse determination module configured to determine the compensation pulse based on the first amplitude.
Based on the same inventive concept, the invention also provides a quantum control system, a control method of the quantum bit by using any one of the above feature descriptions, or a control device of the quantum bit in the above feature descriptions.
Based on the same inventive concept, the invention also provides a quantum computer, which comprises the quantum control system described in the above characteristic description.
Based on the same inventive concept, the present invention also proposes a readable storage medium having stored thereon a computer program which, when executed by a processor, enables a method of controlling qubits according to any of the above-mentioned feature descriptions.
Compared with the prior art, the invention has the following beneficial effects:
According to the quantum bit control method provided by the application, the compensation pulse is used for balancing the influence of the gate bit on the observation bit by executing the two quantum bit logic gates, and the two quantum bit logic gates are biased to the coupling strength with equal magnitude and opposite sign, so that the probability of excited observation bits can be effectively reduced, the blank of the prior art is made up, and the accuracy and efficiency of parallel execution of quantum computing tasks by the quantum chip are improved.
The control device, the quantum control system, the quantum computer and the readable storage medium of the quantum bit provided by the application belong to the same application conception as the control method of the quantum bit, so that the control device and the quantum control system have the same beneficial effects and are not repeated herein.
Drawings
FIG. 1 is a schematic diagram of a quantum chip;
Fig. 2 is a flow chart of a control method of qubits according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of a control device for qubits according to an embodiment of the present application.
Detailed Description
Specific embodiments of the present invention will be described in more detail below with reference to the drawings. Advantages and features of the invention will become more apparent from the following description and claims. It should be noted that the drawings are in a very simplified form and are all to a non-precise scale, merely for convenience and clarity in aiding in the description of embodiments of the invention.
In the description of the present invention, it should be understood that the directions or positional relationships indicated by the terms "center", "upper", "lower", "left", "right", etc., are based on the directions or positional relationships shown in the drawings, are merely for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present invention.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.
Referring to fig. 2, the present embodiment provides a method for controlling a qubit, which is characterized by comprising:
S100: when no compensation pulse is applied to the first adjustable coupler, a plurality of two-qubit logic gates are applied to the gate bit, when the acquired delay is at different values, the delay corresponding to the extreme point of the observation bit in the first selected eigenstate is the first delay, wherein the delay is the interval between the two-qubit logic gates, and the first adjustable coupler is an adjustable coupler for coupling the observation bit and the gate bit;
S200: applying compensation pulses with different amplitudes to the first adjustable coupler, and applying a plurality of two-qubit logic gates to the gate bit based on the selected first delay to obtain that the amplitude of the compensation pulse corresponding to the extreme point of the observation bit in the first selected eigenstate is a first amplitude;
S300: the compensation pulse is determined based on the first amplitude.
Compared with the prior art, the quantum bit control method provided by the embodiment is used for balancing the influence of the gate bit on the execution of the two-quantum bit logic gate by providing the adjustable coupler with a compensation pulse, biasing the two-quantum bit logic gate to the coupling strength with equal magnitude and opposite sign, so that the probability of excitation of the observation bit can be effectively reduced, the blank of the prior art is made up, and the accuracy and the efficiency of the quantum chip for executing the quantum computing task in parallel are improved. In the scheme of the application, the number of the two-qubit logic gates applied to the gate bits is multiple, so that errors caused by the two-qubit logic gates are accumulated, and the situation in actual application can be better simulated. The series of two-qubit logic gates is followed by a delay after each two-qubit logic gate to accumulate phase changes. Each two-qubit logic gate corresponds to a Landau-Zene tunnel that transfers a portion of the data onto the observation bit, causing the observation bit to transition to the excited state.
As will be appreciated by those skilled in the art, the first selected eigenstate may be any one of the |1> state or the |0> state, and when the first selected eigenstate is the |1> state, the delay corresponding to the extreme point where the observation bit in the step S100 is in the first selected eigenstate is the first delay, where the extreme point is the maximum point; the amplitude of the compensation pulse corresponding to the extreme point of the observation bit in the first selected eigenstate is the first amplitude, where the extreme point is the minimum point in step S200. When the first selected eigenstate is the |0> state, the delay corresponding to the extreme point of the observation bit in the first selected eigenstate in the step S100 is the first delay, where the extreme point is the minimum point; the amplitude of the compensation pulse corresponding to the extreme point of the observation bit in the first selected eigenstate obtained in step S200 is the first amplitude, where the extreme point is the maximum point. In this embodiment, the first selected eigenstate selects the |1> state.
It should be noted that, in this embodiment, the compensation pulse is a square wave pulse, the amplitude of the compensation pulse is set to the first amplitude that is finally obtained, and the duration of the compensation pulse is determined according to the duration of the two-qubit logic gate applied to the gate bit, specifically, the duration of the compensation pulse is equal to the duration of the two-qubit logic gate applied to the gate bit.
Specifically, in this embodiment, when the compensation pulse is not applied to the first adjustable coupler, a plurality of two-qubit logic gates are applied to the gate bit, and when the obtained delay is at a different value, the delay corresponding to the extremum point where the observation bit is at the first selected eigenstate is the first delay, that is, the step S100 may specifically include:
applying a plurality of two-quantum bit logic gates to the gate bits to obtain first distribution change of observation bits in a first selected eigenstate when the delay is at different values;
And acquiring the delay corresponding to the extreme point of the observation bit in the first selected eigenstate as a first delay.
Specifically, in this embodiment, the applying the compensation pulse with different amplitudes to the first adjustable coupler, applying a plurality of two-qubit logic gates to the gate bit based on the selected first delay, and obtaining the amplitude of the compensation pulse corresponding to the extreme point of the observation bit in the first selected eigenstate as the first amplitude includes:
Based on the selected first delay, applying a plurality of two-qubit logic gates to the gate bit, and applying compensation pulses with different amplitudes to the first adjustable coupler, so as to obtain second distribution change of the observation bit in a first selected eigenstate when the amplitudes of the compensation pulses are different values;
And acquiring the amplitude corresponding to the extreme point of the observation bit in the first selected eigenstate as a first amplitude based on the second distribution change.
When the number of the compensation pulses applied to the adjustable coupler is one, the second distribution variation obtained by us has a plurality of extreme points, which point is the extreme point needed by us cannot be obtained accurately, and the applicant considers that besides the number of the compensation pulses applied to the adjustable coupler is one each time, a group of operations are performed when the number of the compensation pulses applied to the first adjustable coupler is a plurality of times, and statistics are performed similarly, at this time, we can obtain two sub-distributions, wherein the first sub-distribution is the variation condition that the observation bit is in a first selected eigenstate when the amplitude of the compensation pulses is a different value each time; the second sub-distribution is such that the observation bit is in a change of the first selected eigenstate each time the number of compensation pulses applied to the first tunable coupler is a plurality of, the amplitudes of the compensation pulses being different values. The two sub-distributions are in the same coordinate system, and an extreme point intersection point exists, and the intersection point is the extreme point which is finally needed by people. In this embodiment, the number of the compensation pulses applied to the first tunable coupler is four at a time, and in other embodiments, other numbers may be selected, for example, three, five or more, which is not limited herein.
Specifically, in the present embodiment, the number of compensation pulses applied to the first tunable coupler at a time includes one or more.
Specifically, in the present embodiment, the second distribution variation includes a first sub-distribution and a second sub-distribution;
Wherein the first sub-distribution is a change condition of the observation bit in a first selected eigenstate when the amplitude of the compensation pulse is a different value each time the number of the compensation pulses applied to the first adjustable coupler is one;
The second sub-distribution is such that the observation bit is in a change of a first selected eigenstate each time the number of compensation pulses applied to the first tunable coupler is a plurality of, the amplitudes of the compensation pulses being different values.
Specifically, in this embodiment, the obtaining, based on the second distribution change, the amplitude corresponding to the extreme point of the observation bit in the first selected eigenstate is a first amplitude, including:
And acquiring the amplitude corresponding to the intersection point of the extreme point of the observation bit in the first selected eigenstate in the first sub-distribution and the extreme point of the observation bit in the first selected eigenstate in the second sub-distribution as the first amplitude.
Based on the same inventive concept, this embodiment further provides a control device for quantum bits, please refer to fig. 3, including:
a first delay acquiring module 100 configured to apply a plurality of two-qubit logic gates to a gate bit when no compensation pulse is applied to a first adjustable coupler, and acquire a first delay corresponding to an extremum point of an observation bit in a first selected eigenstate when the delay is at a different value, where the delay is an interval between the two-qubit logic gates applied, and the first adjustable coupler is an adjustable coupler for coupling between the observation bit and the gate bit;
A first amplitude obtaining module 200, configured to apply the compensation pulses with different amplitudes to the first adjustable coupler, apply a plurality of two-qubit logic gates to the gate bit based on the selected first delay, and obtain the amplitude of the compensation pulse corresponding to the extreme point of the observation bit in the first selected eigenstate as a first amplitude;
a compensation pulse determination module 300 is configured to determine the compensation pulse based on the first amplitude.
It will be appreciated that the first delay acquiring module 100, the first amplitude acquiring module 200 and the compensating pulse determining module 300 may be combined in one device, or any one of them may be split into a plurality of sub-modules, or at least part of the functions of one or more of the first delay acquiring module 100, the first amplitude acquiring module 200 and the compensating pulse determining module 300 may be combined with at least part of the functions of the other modules and implemented in one functional module. According to an embodiment of the present invention, at least one of the first delay acquisition module 100, the first amplitude acquisition module 200, and the compensation pulse determination module 300 may be implemented at least in part as a hardware circuit, such as a Field Programmable Gate Array (FPGA), a Programmable Logic Array (PLA), a system on a chip, a system on a substrate, a system on a package, an Application Specific Integrated Circuit (ASIC), or any other reasonable way of integrating or packaging a circuit, or in hardware or firmware, or in a suitable combination of three implementations of software, hardware, and firmware. Or at least one of the first delay acquisition module 100, the first amplitude acquisition module 200 and the compensation pulse determination module 300 may be at least partially implemented as computer program modules, which when executed by a computer, may perform the functions of the respective modules.
Based on the same inventive concept, the invention also provides a quantum control system, a control method of the quantum bit by using any one of the above feature descriptions, or a control device of the quantum bit in the above feature descriptions.
Based on the same inventive concept, the invention also provides a quantum computer, which comprises the quantum control system described in the above characteristic description.
Based on the same inventive concept, the present invention also proposes a readable storage medium having stored thereon a computer program which, when executed by a processor, enables a method of controlling qubits according to any of the above-mentioned feature descriptions.
The readable storage medium may be a tangible device that can hold and store instructions for use by an instruction execution device, such as, but not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the preceding. More specific examples (a non-exhaustive list) of the readable storage medium would include the following: portable computer disks, hard disks, random Access Memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static Random Access Memory (SRAM), portable compact disk read-only memory (CD-ROM), digital Versatile Disks (DVD), memory sticks, floppy disks, mechanical coding devices, punch cards or in-groove structures such as punch cards or grooves having instructions stored thereon, and any suitable combination of the foregoing. The computer program described herein may be downloaded from a readable storage medium to a respective computing/processing device or to an external computer or external storage device via a network, such as the internet, a local area network, a wide area network, and/or a wireless network. The network may include copper transmission cables, fiber optic transmissions, wireless transmissions, routers, firewalls, switches, gateway computers and/or edge servers. The network interface card or network interface in each computing/processing device receives the computer program from the network and forwards the computer program for storage in a readable storage medium in the respective computing/processing device. The computer program used to perform the operations of the present invention may be assembly instructions, instruction Set Architecture (ISA) instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source or object code written in any combination of one or more programming languages, including an object oriented programming language such as SMALLTALK, C ++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The computer program may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computer (for example, through the Internet using an Internet service provider). In some embodiments, aspects of the present invention are implemented by personalizing electronic circuitry, such as programmable logic circuits, field Programmable Gate Arrays (FPGAs), or Programmable Logic Arrays (PLAs), with state information for a computer program, which can execute computer-readable program instructions.
Aspects of the present invention are described herein with reference to flowchart illustrations and/or block diagrams of methods, systems, and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer programs. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the programs, when executed by the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer programs may also be stored in a readable storage medium that can direct a computer, programmable data processing apparatus, and/or other devices to function in a particular manner, such that the readable storage medium storing the computer program includes an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.
The computer program may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the computer program which is executed on the computer, other programmable apparatus or other devices implements the functions/acts specified in the flowchart and/or block diagram block or blocks.
In the description of the present specification, a description of the terms "one embodiment," "some embodiments," "examples," or "particular examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments. Further, one skilled in the art can engage and combine the different embodiments or examples described in this specification.
The foregoing is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Any person skilled in the art will make any equivalent substitution or modification to the technical solution and technical content disclosed in the invention without departing from the scope of the technical solution of the invention, and the technical solution of the invention is not departing from the scope of the invention.
Claims (13)
1. A method of controlling a qubit, comprising:
When no compensation pulse is applied to the first adjustable coupler, a plurality of two-qubit logic gates are applied to the gate bit, when the acquired delay is at different values, the delay corresponding to the extreme point of the observation bit in the first selected eigenstate is the first delay, wherein the delay is the interval between the two-qubit logic gates, and the first adjustable coupler is an adjustable coupler for coupling the observation bit and the gate bit;
applying compensation pulses with different amplitudes to the first adjustable coupler, and applying a plurality of two-qubit logic gates to the gate bit based on the selected first delay to obtain that the amplitude of the compensation pulse corresponding to the extreme point of the observation bit in the first selected eigenstate is a first amplitude;
The compensation pulse is determined based on the first amplitude.
2. The control method according to claim 1, wherein when no compensation pulse is applied to the first tunable coupler, applying a plurality of two-qubit logic gates to the gate bit, and when the obtained delay is at a different value, the delay corresponding to the extremum point of the observation bit at the first selected eigenstate is the first delay, including:
applying a plurality of two-quantum bit logic gates to the gate bits to obtain first distribution change of observation bits in a first selected eigenstate when the delay is at different values;
And acquiring the delay corresponding to the extreme point of the observation bit in the first selected eigenstate as a first delay.
3. The control method according to claim 1, wherein applying the compensation pulses of different magnitudes to the first tunable coupler, applying a plurality of the two-qubit logic gates to the gate bit based on the selected first delay, and obtaining the magnitude of the compensation pulse corresponding to the extreme point of the observation bit in the first selected eigenstate as the first magnitude includes:
Based on the selected first delay, applying a plurality of two-qubit logic gates to the gate bit, and applying compensation pulses with different amplitudes to the first adjustable coupler, so as to obtain second distribution change of the observation bit in a first selected eigenstate when the amplitudes of the compensation pulses are different values;
And acquiring the amplitude corresponding to the extreme point of the observation bit in the first selected eigenstate as a first amplitude based on the second distribution change.
4. A control method according to claim 3, wherein the number of compensation pulses applied to the first adjustable coupler at a time comprises one or more.
5. The control method of claim 4, wherein the second distribution variation comprises a first sub-distribution and a second sub-distribution;
Wherein the first sub-distribution is a change condition of the observation bit in a first selected eigenstate when the amplitude of the compensation pulse is a different value each time the number of the compensation pulses applied to the first adjustable coupler is one;
The second sub-distribution is such that the observation bit is in a change of a first selected eigenstate each time the number of compensation pulses applied to the first tunable coupler is a plurality of, the amplitudes of the compensation pulses being different values.
6. The control method according to claim 5, wherein the obtaining, based on the second distribution change, the amplitude corresponding to the extreme point of the observation bit in the first selected eigenstate is a first amplitude, includes:
And acquiring the amplitude corresponding to the intersection point of the extreme point of the observation bit in the first selected eigenstate in the first sub-distribution and the extreme point of the observation bit in the first selected eigenstate in the second sub-distribution as the first amplitude.
7. The control method of claim 1, wherein the first selected eigenstate is an excited state.
8. The control method according to claim 7, wherein the delay corresponding to a maximum point at which the observation bit is in an excited state is the first delay.
9. The control method of claim 7, wherein the magnitude of the compensation pulse corresponding to the minimum point at which the observation bit is in the excited state is a first magnitude.
10. A control device for qubits, comprising:
the first delay acquisition module is configured to apply a plurality of two-qubit logic gates to the gate bit when no compensation pulse is applied to the first adjustable coupler, acquire the delay corresponding to the extreme point of the observation bit in the first selected eigenstate as the first delay when the delay is in different values, wherein the delay is the interval between the two applied qubit logic gates, and the first adjustable coupler is an adjustable coupler for coupling and connecting the observation bit and the gate bit;
The first amplitude acquisition module is configured to apply the compensation pulses with different amplitudes to the first adjustable coupler, apply a plurality of two-qubit logic gates to the gate bit based on the selected first delay, and acquire the amplitude of the compensation pulse corresponding to the extreme point of the observation bit in the first selected eigenstate as a first amplitude;
A compensation pulse determination module configured to determine the compensation pulse based on the first amplitude.
11. A quantum control system, characterized by using the control method of a qubit according to any one of claims 1 to 9, or comprising the control device of a qubit according to claim 10.
12. A quantum computer comprising the quantum control system of claim 11.
13. A readable storage medium having stored thereon a computer program, which when executed by a processor is capable of implementing the method of controlling qubits according to any one of claims 1 to 9.
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| CN202211454967.8A CN118095455A (en) | 2022-11-21 | 2022-11-21 | Quantum bit control method and device and quantum computer |
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