CN115425146B - Backside illuminated microstructure array wide-spectrum imaging detector and preparation method thereof - Google Patents
Backside illuminated microstructure array wide-spectrum imaging detector and preparation method thereof Download PDFInfo
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The invention relates to a backside illuminated microstructure array wide-spectrum imaging detector and a preparation method thereof. The detector comprises a top common electrode, a p-type microstructure array substrate and a patterned bottom electrode which are stacked from top to bottom, wherein the top common electrode is deposited on the upper part of the p-type microstructure array substrate; a p-type infrared light absorbing material, an n-type electron transport window material and an n-type high-resistance semiconductor material are plated between the p-type microstructure array substrate and the patterned bottom electrode in sequence. The preparation method comprises the following steps: preparing a p-type microstructure array substrate: preparing an intermediate layer between the p-type microstructure array substrate and the patterned bottom electrode; preparing a patterned bottom electrode; a top common electrode was prepared. The invention improves the utilization ratio of visible-infrared incident light, the vertical integrated device structure realizes the simultaneous acquisition of visible-infrared light signals, the spectrum detection range of a single detector is widened, and the device preparation process is compatible with the conventional semiconductor preparation and has wide commercial application prospect.
Description
Technical Field
The invention belongs to the technical field of photoelectric detection, and particularly relates to a backside illuminated microstructure array wide-spectrum imaging detector.
Technical Field
The photoelectric detector is used as an important ring for photoelectric information acquisition, and is widely applied to the aspects of vehicle driving, motion sensing, security alarm, infrared sensing imaging and the like. The photoelectric detection systems working in different wavelength regions have various advantages in capability and application, but with the continuous development of technology, various emergency conditions and interference technologies are developed, so that the requirements of users on the photoelectric detectors are higher and higher, and the photoelectric detectors only responding to a single wavelength region can not meet the actual requirements far away. How to obtain accurate multi-band information in complex environments with high efficiency becomes important, and thus dual-band or multi-band fusion photoelectric detection systems have been developed. However, the currently developed dual-band or multi-band detection system is usually assembled by two or even more independent detection systems, and the system has high manufacturing cost and excessive volume, which is contrary to the thought of high integration, miniaturization and light weight of the existing detection system.
The CN201810862215 discloses a wide-spectrum photoelectric detection device based on an amorphous nitride film and a preparation method thereof, and the technical problems are that: the response spectrum range is 350-1150nm, and compared with the traditional silicon detector, the response spectrum (the response spectrum range of the traditional silicon detector is 400-1100 nm) is not remarkably widened. Further, the detector structure disclosed in CN201810862215 is a unit device, which cannot meet the pixel isolation condition, and cannot form a focal plane imaging array. The CN111739963B discloses a preparation method of a silicon-based broad spectrum photoelectric detector, which has the following technical problems: also its spectral response range (400-1600 nm) is much smaller than the present invention and pixel isolation is not possible. In addition, most of the preparation methods of the related light absorption layer materials are chemical synthesis, and the consistency of the preparation of the detector cannot be ensured.
Disclosure of Invention
The invention aims to provide a backside illuminated microstructure array wide-spectrum imaging detector and a preparation method thereof, which are used for solving the problems that the existing detector structure cannot meet the conditions of cross-band wide-spectrum detection and pixel isolation, a focal plane imaging array cannot be formed and the preparation of the detector lacks consistency.
In order to achieve the above purpose, the technical scheme adopted by the invention is as follows: a backside illuminated microstructure array broad spectrum imaging detector: the array substrate comprises a top common electrode, a p-type microstructure array substrate and a patterned bottom electrode which are stacked from top to bottom, and is characterized in that: the top common electrode is deposited on the upper part of the p-type microstructure array substrate; and a p-type infrared light absorbing material, an n-type electronic transport window material and an n-type high-resistance semiconductor material are plated between the p-type microstructure array substrate and the patterned bottom electrode in sequence.
Further, the p-type microstructure array substrate is a columnar array structure arranged on a plane, the forbidden bandwidth of the p-type microstructure array substrate is 1-1.5eV, the resistivity is 0.001-50Ω & cm, the thickness is 100-200 μm, the diameter of the microstructure is 500nm-10 μm, the period is 1-20 μm, and the aspect ratio is 1-10.
Furthermore, the top common electrode is a full-coverage visible-infrared transparent conductive film electrode, specifically fluorine doped indium tin oxide or aluminum doped zinc oxide, and the sheet resistance is 10-100 omega.
Furthermore, the p-type infrared light absorbing material is in the form of a polycrystalline film or a quantum dot film, specifically, lead telluride, mercury cadmium telluride or lead tin tellurium, and the thickness is 100nm-2 mu m.
Further, the n-type electron transport window material is an n-type semiconductor material, the forbidden bandwidth is larger than 2eV, and specifically cadmium sulfide, fullerene C60, fullerene C70 or C60MC12 and the thickness is 10-50nm.
Further, the n-type high-resistance semiconductor material is an n-type wide-bandgap semiconductor material, the bandgap is larger than 3eV, and the thickness is 0.2-2 μm, specifically tin oxide, gallium nitride or aluminum nitride.
Further, the patterned bottom electrode is made of platinum, gold, silver or alloy electrode material, and has resistivity of 0.001-10Ω & cm, thickness of 200nm-1 μm, and electrode area of 1-100 μm 2 The width of the isolation channel between the electrodes is 1-10 μm.
Further, the preparation method of the backside illuminated microstructure array broad spectrum imaging detector comprises the following steps:
step one, preparing a p-type microstructure array substrate: spin coating photoresist on the p-type substrate; according to the designed microstructure graph, exposing photoresist in a graph area by adopting a mask plate under ultraviolet light, immersing an exposed sample wafer into a developing solution to remove the photoresist in an exposed part in the graph area, and then hardening the sample wafer; processing the hardened sample wafer by adopting plasma or chemical wet etching, and etching the substrate in the pattern area to the designed depth by controlling the etching rate to form a p-type microstructure array substrate;
step two, preparing an intermediate layer between the p-type microstructure array substrate and the patterned bottom electrode: spin-coating UV glue on the p-type microstructure array substrate to protect the microstructure; spin coating a photoresist sacrificial layer on the back of the p-type microstructure array substrate; according to the designed sacrificial layer pattern, exposing photoresist in the pattern area by using a mask under ultraviolet light, immersing the exposed sample wafer into a developing solution, and removing the photoresist in the exposed part in the pattern area; plating a p-type infrared light absorbing material, an n-type electron transport window material and an n-type high-resistance semiconductor material on the back surface of the p-type microstructure array substrate in sequence, and removing the photoresist sacrificial layer;
step three, preparing a patterned bottom electrode: spin-coating photoresist on the surface of an n-type high-resistance semiconductor material, exposing the photoresist in a pattern area by adopting a mask under ultraviolet light according to a designed bottom electrode pattern, immersing an exposed sample into a developing solution, removing the photoresist in an exposed part in the pattern area, and then performing hardening treatment on the sample; depositing a bottom electrode material on the surface of the n-type high-resistance semiconductor material, and removing redundant photoresist to form a patterned bottom electrode;
step four, preparing a top common electrode: and removing UV protective glue on the upper surface of the p-type microstructure array substrate, preparing a top common electrode on the upper surface by adopting an atomic layer deposition technology, and finally completing the preparation of the detector.
Compared with the prior art, the invention has the following advantages:
1. in the invention, visible-infrared light is incident on the surface of the p-type micro-structure array substrate, and the visible light is absorbed by the p-type micro-structure array substrate and converted into electron-hole pairs. The p-type microstructure array substrate is preferably selected, the forbidden bandwidth is 1-1.5eV, and the thickness is 100-200 mu m, so that on one hand, the high-efficiency absorption of visible light is ensured, and the utilization rate of visible-infrared incident light is improved; on the other hand, this thickness provides good support for the device structure.
2. The light trapping effect of the microstructure can obviously enhance the absorption of visible light, reduce the reflection of infrared light and improve the utilization rate of incident light. The microstructure size of the invention can be flexibly designed to meet the requirements of different wave bands, and the application range is wider. The p-type infrared light absorbing material can flexibly select corresponding materials according to practical application conditions, so that the universality of the detector structure designed by the invention is ensured.
3. The n-type electron transport window material has the functions of collecting and transporting electrons, and the thickness is preferably controlled to be 10-50nm, so that the increase of the electron recombination rate is avoided; the forbidden bandwidth is more than 2eV, and the generation of dark current can be restrained on the premise of externally applying reverse bias. The n-type high-resistance semiconductor material is an n-type layer in a p-n junction, and the transverse high-resistance characteristic of the n-type high-resistance semiconductor material also plays a role in pixel isolation, so that focal plane array imaging is realized.
4. The transparent conductive film is selected as the top common electrode, so that the requirement of the transmittance of visible-infrared light is met; on the other hand, the preparation method adopting Atomic Layer Deposition (ALD) technology can realize uniform encapsulation of the electrode microstructure surface and form good full-coverage ohmic contact.
5. The size of the detector unit pixel is determined by the area of a single patterned bottom electrode, an independent p-n junction unit is formed between the single patterned bottom electrode and a top common electrode after external bias voltage is applied, electric isolation is realized among the units by n-type high-resistance semiconductor materials, an electric signal generated by each independent pixel unit is led out by a read-out circuit (ROIC), and a focal plane array image can be obtained after the electric signals of the pixel units are collected and processed.
6. The invention can realize the wide spectrum detection of visible-infrared light of a single detector: the invention can flexibly adopt infrared light absorbing materials with different absorption wave bands, such as PbTe infrared absorbing materials, and the spectral response range of the detector is 400-2500nm; if HgCdTe is employed, the spectral response range of the detector may encompass the entire visible-infrared light region.
7. The vertical integrated device structure adopted by the invention realizes the simultaneous acquisition of visible-infrared light signals and widens the spectrum detection range of a single detector. The p-type light absorbing material and the n-type high-resistance semiconductor material are longitudinally stacked, so that the advantage of high gain output of the photovoltaic detector is obtained, meanwhile, the transverse high-resistance characteristic of the n-type high-resistance semiconductor material can ensure electric isolation among transverse pixels, and focal plane array imaging can be realized by combining the patterned bottom electrode.
8. The preparation process of the invention is compatible with the existing semiconductor manufacturing process, the technical core is morphology regulation and control of microstructure, uniformity of films of each layer and control of components, but the process is compatible with the existing semiconductor manufacturing process, and meanwhile, the preparation equipment can adopt the existing mature equipment, so that the consistency of device preparation can be effectively ensured, and the preparation cost is low, thereby being suitable for industrial production.
Description of the drawings:
FIG. 1 is a schematic diagram of a backside illuminated microstructure array broad spectrum imaging detector;
FIG. 2 is a schematic diagram of the operation of a backside illuminated microstructure array wide spectrum imaging detector;
FIG. 3 is a process flow diagram of a fabrication process for a backside illuminated microstructure array wide-spectrum imaging detector;
FIG. 4 is an absorption spectrum of the detector prepared in example 1;
FIG. 5 is a graph showing the response of the detector prepared in example 1 at 2200 nm.
Marking: the device comprises a 1-top shared electrode, a 2-p type microstructure array substrate, a 3-p type infrared light absorbing material, a 4-n type electron transport window material, a 5-n type high-resistance semiconductor material and a 6-patterned bottom electrode.
The specific embodiment is as follows:
the present invention will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present invention more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Referring to fig. 1: the back-illuminated micro-structure array wide-spectrum imaging detector comprises a p-type micro-structure array substrate 2, wherein a top common electrode 1 is arranged on the p-type micro-structure array substrate 2, and the back surface of the p-type micro-structure array substrate 2 is sequentially plated with a p-type infrared light absorbing material 3, an n-type electron transport window material 4, an n-type high-resistance semiconductor material 5 and a patterned bottom electrode 6.
The microstructure size can be flexibly designed, for example, aiming at enhancing visible light absorption, the microstructure size can be designed into a diameter of 500nm, a period of 1 mu m and an aspect ratio of 5; if the infrared absorption needs to be enhanced, the microstructure size can be adjusted according to the corresponding wave bands (near infrared, medium wave infrared and long wave infrared).
The p-type infrared light absorbing material can flexibly select corresponding materials according to practical application conditions, and PbTe can be selected in a near infrared band (800-2500 nm); hgCdTe or PbSnTe may be selected from the medium-wavelength infrared (3-5 μm) and the long-wavelength infrared (8-12 μm) bands.
The p-type microstructure array substrate 2 is a columnar array structure arranged on a plane, the forbidden bandwidth is 1-1.5eV, the resistivity is 0.001-50Ω & cm, the thickness is 100-200 μm, the microstructure diameter is 500nm-10 μm, the period is 1-20 μm, and the aspect ratio is 1-10.
The top common electrode 1 may be a full-coverage visible-infrared transparent conductive thin film electrode, for example: fluorine doped indium tin oxide (FTO) or aluminum doped zinc oxide (AZO) and the like, and the square resistance is 10-100 omega.
The p-type infrared light absorbing material 3 can be in a polycrystalline film or a quantum dot film form, and can adopt lead telluride (PbTe), mercury cadmium telluride (HgCdTe), lead tin tellurium (PbSnTe) and the like, and the thickness is 100nm-2 mu m.
The n-type electron transport window material 4 may be an n-type semiconductor material, and the forbidden band width is greater than 2eV, for example: cadmium sulfide (CdS), fullerene (C60, C70), C60MC12 and the like, and the thickness is 10-50nm.
1. The n-type high-resistance semiconductor material 5 may be an n-type wide bandgap semiconductor material, and the bandgap is greater than 3eV, for example: tin oxide (SnO) 2 ) Gallium nitride (GaN), aluminum nitride (AlN), etc., and has a thickness of 0.2-2 μm.
The patterned bottom electrode 6 may be a platinum (Pt), gold (Au), silver (Ag) or alloy electrodeMaterials, etc., resistivity of 0.001-10Ω cm, thickness of 200nm-1 μm, electrode area of 1-100 μm 2 The width of the isolation channel between the electrodes is 1-10 μm.
Example 1: the double polished silicon wafer is adopted as a p-type microstructure array substrate, the resistivity is 10Ω & cm, the thickness is 100 mu m, the diameter of the microstructure is 2 mu m, the period is 4 mu m, and the aspect ratio is 5:1; the top common electrode adopts indium doped tin oxide (ITO) and has a sheet resistance of 10Ω; the p-type infrared light absorbing material adopts lead telluride (PbTe) with the thickness of 500nm; the n-type electron transport window material adopts cadmium sulfide (CdS) with the thickness of 20nm; the n-type high-resistance semiconductor material adopts gallium nitride (GaN) with the thickness of 200nm; the patterned bottom electrode is made of platinum (Pt), has a resistivity of 0.1 Ω & cm, a thickness of 200nm, a square with a side length of 5 μm, an inter-electrode isolation channel width of 1 μm, and an electrode pattern is made of square.
Example 2: adopting double-polishing indium phosphide (InP) as a p-type microstructure array substrate, wherein the resistivity is 15 Ω & cm, the thickness is 200 mu m, the diameter of the microstructure is 5 mu m, the period is 10 mu m, and the aspect ratio is 8:1; the top common electrode adopts aluminum doped zinc oxide (AZO), and the square resistance is 15 omega; the p-type infrared light absorbing material adopts mercury cadmium telluride (HgCdTe) with the thickness of 1 mu m; the n-type electron transport window material adopts fullerene (C60) with the thickness of 10nm; the n-type high-resistance semiconductor material adopts aluminum nitride (AlN) with the thickness of 500nm; the patterned bottom electrode is made of gold (Au), has a resistivity of 0.01Ω & cm, a thickness of 500nm, a square with a side length of 10 μm, and an isolation channel width between the electrodes of 5 μm, and the electrode pattern is made of square.
See fig. 2: the working principle of the backside illuminated microstructure array wide-spectrum imaging detector is as follows: visible-infrared light is incident on the surface of the p-type microstructure array substrate 2, and the visible light is absorbed by the p-type microstructure array substrate 2 and converted into electron-hole pairs. Infrared light is absorbed by the p-type infrared light absorbing material 3 after penetrating the p-type microstructure array substrate 2, and is converted into electron-hole pairs. The n-type electron transport window material 4 plays a role in collecting and transporting electrons, and can inhibit the generation of dark current on the premise of externally applying reverse bias. The n-type high-resistance semiconductor material 5 is an n-type layer in the p-n junction and also plays a role in pixel isolation. Negative voltage is added to the top common electrode 1, positive voltage is added to the patterned bottom electrode 6, and electron-hole pairs generated by visible light and infrared light are separated under the action of a built-in electric field of a p-n junction of the whole device and an external reverse bias voltage, so that photocurrent is formed, and wide spectrum detection of the visible light and the infrared light is realized. The current signal is derived by a read-out circuit (ROIC) and converted into image information.
See fig. 3: the preparation process flow of the backside illuminated microstructure array wide-spectrum imaging detector comprises the following steps:
step one, spin coating photoresist on a p-type doped silicon or germanium sheet; according to the designed microstructure graph, exposing photoresist in a graph area by adopting a mask plate under ultraviolet light, immersing an exposed sample wafer into a developing solution to remove the photoresist in an exposed part in the graph area, and then hardening the sample wafer; and processing the hardened sample wafer by adopting plasma or chemical wet etching, and etching the substrate in the pattern area to the designed depth by controlling the etching rate to form the p-type microstructure array substrate 2.
Step two, preparing an intermediate layer between the p-type microstructure array substrate 2 and the patterned bottom electrode 6: the UV glue is spin-coated on the p-type microstructure array substrate 2 to protect the microstructure; spin coating a photoresist sacrificial layer on the back of the p-type microstructure array substrate 2; according to the designed sacrificial layer pattern, exposing photoresist in the pattern area by using a mask under ultraviolet light, immersing the exposed sample wafer into a developing solution, and removing the photoresist in the exposed part in the pattern area; the back of the p-type micro-structure array substrate 2 is plated with p-type infrared light absorbing material 3, n-type electron transport window material 4 and n-type high-resistance semiconductor material 5 in sequence by adopting means of thermal evaporation, magnetron sputtering, ion beam sputtering, atomic layer deposition, continuous ion layer deposition, quantum dot spin coating or sol-gel method and the like, and the photoresist sacrificial layer is removed. In this example, a thermal evaporation method was used.
Step three, preparing a patterned bottom electrode 6: spin coating photoresist on the surface of the n-type high-resistance semiconductor material 5; according to the designed bottom electrode pattern, exposing photoresist in the pattern area by using a mask under ultraviolet light, immersing the exposed sample into a developing solution to remove the photoresist in the exposed part in the pattern area, and then hardening the sample; and depositing a bottom electrode material on the surface of the n-type high-resistance semiconductor material (5) by using methods such as thermal evaporation, magnetron sputtering, ion beam sputtering and the like, and removing the redundant photoresist to form a patterned bottom electrode 6. In this embodiment, a magnetron sputtering method is used.
Step four, preparing a top common electrode 1: the upper surface UV protective glue of the p-type microstructure array substrate 2 is removed, and an Atomic Layer Deposition (ALD) method is adopted to prepare the top common electrode 1.
See fig. 4: in example 1, the absorption rate of the p-type silicon substrate is obviously reduced after 1100nm, the light absorption is almost cut off, the light absorption rate is far lower than that of the other two structures, the absorption rate of the p-type silicon substrate with a light trapping microstructure in the visible-near infrared region is obviously increased, the light absorption rate of the device is further improved along with the recombination of the PbTe infrared absorption layer, and the spectral range covers 400-2500nm wave bands.
See fig. 5: the prepared detector of example 1 has a response and detection rate of 10.517 μA/W and 2.23×10 respectively under-0.5V bias 7 Jones. The spectrum response range is effectively widened, and the wavelength limit of 1100nm is successfully broken through.
The foregoing description is only of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention.
Claims (5)
1. A backside illuminated microstructure array broad spectrum imaging detector, characterized in that: the array substrate comprises a top common electrode (1), a p-type microstructure array substrate (2) and a patterned bottom electrode (6) which are stacked from top to bottom, and is characterized in that: the top common electrode (1) is deposited on the upper part of the p-type microstructure array substrate (2); a p-type infrared light absorbing material (3), an n-type electron transport window material (4) and an n-type high-resistance semiconductor material (5) are plated between the p-type microstructure array substrate (2) and the patterned bottom electrode (6) in sequence;
the p-type microstructure array substrate (2) is a columnar array structure arranged on a plane, the forbidden bandwidth of the p-type microstructure array substrate is 1-1.5eV, the resistivity is 0.001-50Ω & cm, the thickness is 100-200 mu m, the diameter of the microstructure is 500nm-10 mu m, the period is 1-20 mu m, and the aspect ratio is 1-10;
the n-type electron transport window material (4) is an n-type semiconductor material, the forbidden bandwidth is larger than 2eV, and particularly cadmium sulfide, fullerene C60, fullerene C70 or C60MC12 and the thickness is 10-50nm;
the n-type high-resistance semiconductor material (5) is an n-type wide-bandgap semiconductor material, the bandgap is larger than 3eV, and the thickness is 0.2-2 mu m, specifically tin oxide, gallium nitride or aluminum nitride.
2. A backside illuminated microstructure array wide spectrum imaging detector according to claim 1, wherein: the top common electrode (1) is a full-coverage visible-infrared transparent conductive film electrode, in particular to fluorine doped indium tin oxide or aluminum doped zinc oxide, and the sheet resistance is 10-100 omega.
3. A backside illuminated microstructure array wide spectrum imaging detector according to claim 2, wherein: the p-type infrared light absorbing material (3) is in a polycrystalline film or quantum dot film form, specifically, lead telluride, mercury cadmium telluride or lead tin tellurium, and the thickness is 100nm-2 mu m.
4. A backside illuminated microstructure array wide spectrum imaging detector according to claim 3, wherein: the patterned bottom electrode (6) is made of platinum, gold, silver or alloy electrode material, has resistivity of 0.001-10Ω & cm, thickness of 200nm-1 μm, and electrode area of 1-100 μm 2 The width of the isolation channel between the electrodes is 1-10 μm.
5. The method for preparing the backside illuminated microstructure array broad spectrum imaging detector according to claim 1, comprising the following steps:
step one, preparing a p-type microstructure array substrate (2): spin coating photoresist on the p-type substrate; according to the designed microstructure graph, exposing photoresist in a graph area by adopting a mask plate under ultraviolet light, immersing an exposed sample wafer into a developing solution to remove the photoresist in an exposed part in the graph area, and then hardening the sample wafer; processing the hardened sample wafer by adopting plasma or chemical wet etching, and etching the substrate in the pattern area to the designed depth by controlling the etching rate to form a p-type microstructure array substrate (2);
step two, preparing an intermediate layer between the p-type microstructure array substrate (2) and the patterned bottom electrode (6): the UV glue is spin-coated on the p-type microstructure array substrate (2) to protect the microstructure; spin coating a photoresist sacrificial layer on the back of the p-type microstructure array substrate (2); according to the designed sacrificial layer pattern, exposing photoresist in the pattern area by using a mask under ultraviolet light, immersing the exposed sample wafer into a developing solution, and removing the photoresist in the exposed part in the pattern area; plating a p-type infrared light absorbing material (3), an n-type electron transport window material (4) and an n-type high-resistance semiconductor material (5) on the back surface of the p-type microstructure array substrate (2) in sequence, and removing the photoresist sacrificial layer;
step three, preparing a patterned bottom electrode (6): spin-coating photoresist on the surface of an n-type high-resistance semiconductor material (5), exposing the photoresist in a pattern area by adopting a mask plate under ultraviolet light according to a designed bottom electrode pattern, immersing an exposed sample wafer in a developing solution, removing the photoresist in an exposed part in the pattern area, and then performing hardening treatment on the sample wafer; depositing a bottom electrode material on the surface of the n-type high-resistance semiconductor material (5), and removing redundant photoresist to form a patterned bottom electrode (6);
step four, preparing a top common electrode (1): and removing UV protective glue on the upper surface of the p-type microstructure array substrate (2), preparing a top common electrode (1) on the upper surface by adopting an atomic layer deposition technology, and finally completing the preparation of the detector.
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