CN115425065A - 一种碳化硅igbt器件及其制造方法 - Google Patents
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 34
- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 33
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 8
- 229910052751 metal Inorganic materials 0.000 claims abstract description 26
- 239000002184 metal Substances 0.000 claims abstract description 26
- 239000000758 substrate Substances 0.000 claims abstract description 18
- 238000003860 storage Methods 0.000 claims abstract description 15
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 13
- 229920005591 polysilicon Polymers 0.000 claims abstract description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 22
- 238000000151 deposition Methods 0.000 claims description 19
- 229910052782 aluminium Inorganic materials 0.000 claims description 16
- -1 aluminum ions Chemical class 0.000 claims description 16
- 238000000137 annealing Methods 0.000 claims description 16
- 238000005530 etching Methods 0.000 claims description 12
- 235000012239 silicon dioxide Nutrition 0.000 claims description 12
- 239000000377 silicon dioxide Substances 0.000 claims description 12
- MWUXSHHQAYIFBG-UHFFFAOYSA-N Nitric oxide Chemical compound O=[N] MWUXSHHQAYIFBG-UHFFFAOYSA-N 0.000 claims description 8
- 230000004888 barrier function Effects 0.000 claims description 6
- 238000002955 isolation Methods 0.000 claims description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 230000003213 activating effect Effects 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- 229910052757 nitrogen Inorganic materials 0.000 claims description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N nitrogen Substances N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 4
- 238000005468 ion implantation Methods 0.000 claims description 3
- 230000001590 oxidative effect Effects 0.000 claims description 2
- 230000000694 effects Effects 0.000 abstract description 9
- 230000005684 electric field Effects 0.000 abstract description 8
- 238000004220 aggregation Methods 0.000 abstract description 4
- 230000002776 aggregation Effects 0.000 abstract description 4
- 230000000903 blocking effect Effects 0.000 description 4
- 230000008021 deposition Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 230000001276 controlling effect Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
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Abstract
本发明提供了一种碳化硅IGBT器件及其制造方法,器件结构包括:发射极金属、发射极欧姆接触、P+接触区、N+接触区、P型基区、N型电荷存储层、P型屏蔽区、N型漂移区、N型缓冲层、P+衬底、集电极欧姆接触、集电极金属、多晶硅栅、栅介质、P型屏蔽区肖特基接触。本发明采用了沟槽碳化硅IGBT器件结构,沟槽底部的P型屏蔽区与肖特基接触电极连接。器件正向导通时,肖特基接触提高了P型屏蔽区的电势,从而抑制空穴被发射极收集,增强了漂移区的电导调制效应,降低了导通压降;器件关断时,P型屏蔽区能屏蔽槽栅倒角处的电场聚集,防止器件提前击穿;同时由于引入肖特基接触,减小了栅极面积,从而降低栅电荷,提高了开关速度,减少了关断损耗。
Description
技术领域
本发明属于功率半导体器件技术领域,具体是一种碳化硅IGBT器件及其制造方法。
背景技术
碳化硅(SiC)作为宽禁带半导体材料的典型代表之一,具有宽禁带、高临界击穿电场、高热导率以及高电子饱和漂移速度等良好的物理和电学特性。宽禁带半导体碳化硅电力电子器件,突破了传统硅基器件在耐压、工作频率以及转换效率等方面的性能极限,使得碳化硅器件在高压、大功率、高温电力电子领域有着广阔的应用前景。
碳化硅IGBT(绝缘栅双极晶体管)器件同时具备MOS场控结构的驱动电路简单和双极性开态导通能力强的优势,与相同耐压的碳化硅MOSFET器件相比,碳化硅IGBT器件具有较低的比导通电阻,适合应用于耐压10kV以上的领域,例如智能电网的高压直流输电系统。碳化硅IGBT主要有平面栅和沟槽栅两种:平面栅碳化硅IGBT相邻P阱区间存在JFET效应使其正向导通压降显著增大;沟槽栅碳化硅IGBT消除了JFET效应,使沟道密度增加,进一步提升了漂移区载流子浓度。与平面栅碳化硅IGBT相比,沟槽栅碳化硅IGBT更利于紧凑元胞的设计,从而有效增加沟道密度,在不增加开关损耗的前提下,大幅度地降低正向导通压降。
当器件处于阻断状态时,沟槽栅碳化硅IGBT由于沟槽底部栅氧化层电场强度远高于碳化硅中的电场强度,使得器件的耐压可靠性得到了极大的考验,因此通常采用在沟槽底部加屏蔽层来减弱栅氧化层的电场,屏蔽层分为浮空与接地两种状态。屏蔽层浮空状态时,屏蔽层电位受到栅极、集电极电压调控,使得电导调制效应增强,正向导通电压减小,但其不能有效保护栅氧化层。屏蔽层接地状态时可以有效降低沟槽栅氧化层的电场强度,但在导通状态时加速了漂移区空穴被发射极抽取,导致电导调制效应减弱,增大了导通压降。
发明内容
本发明提出一种碳化硅IGBT器件及其制造方法,在沟槽栅中间引入肖特基接触将发射极金属与P型屏蔽区连接。通过肖特基势垒抬高P型屏蔽区电位,空穴相比于传统沟槽栅IGBT更难从P型屏蔽区通过,从而增强电导调制效应,降低导通压降,还可以通过控制肖特基势垒来控制IGBT的导通压降;而且,当器件处于阻断状态时,沟槽底部的P型屏蔽区不仅抑制了槽栅倒角处的电场聚集,而且保护了槽底集成的肖特基接触界面,防止器件发生提前击穿;同时由于引入肖特基接触,减小了栅极面积,从而降低栅电荷,提高了开关速度,减少了关断损耗。
为实现上述发明目的,本发明技术方案如下:
一种碳化硅IGBT器件,包括:
P+衬底10、位于P+衬底10上方的N型缓冲层9、位于N型缓冲层9上方的N型漂移区8、位于N型漂移区8上方的N型电荷存储层6、N型电荷存储层6上方的P型基区5,位于P型基区5上方的P+接触区3和N+接触区4,位于P型基区5之间的沟槽,沟槽内包括栅介质14、栅介质14内部的多晶硅栅13,沟槽中间底部设有P型屏蔽区7,P型屏蔽区7在顶部形成P型屏蔽区肖特基接触15,N+接触区4和P+接触区3上方形成发射极欧姆接触2,一部分发射极金属1淀积于发射极欧姆接触2上方,一部分发射极金属1淀积于P型屏蔽区肖特基接触15上方的栅介质14中间,P+衬底10下方形成集电极欧姆接触11,集电极欧姆接触11下方淀积集电极金属12。
作为优选方式,所述栅介质14为二氧化硅SiO2。
作为优选方式,所述P+接触区3、N+接触区4、P型基区5、P型屏蔽区7均为多次离子注入形成。
作为优选方式,P+接触区3、N+接触区4、P型基区5、N型电荷存储层6、P型屏蔽区7、N型漂移区8、N型缓冲层9、P+衬底10的材料均为碳化硅。
本发明还提供一种所述的碳化硅IGBT器件的制造方法,包括以下步骤:
第一步:在P+衬底层上依次外延形成N型缓冲层、N型电压阻挡层、N型电荷存储层;
第二步:注入铝离子形成P型基区;
第三步:注入铝离子形成P+接触区;
第四步:注入氮离子形成N+接触区并激活退火;
第五步:刻蚀栅极沟槽;
第六步:在沟槽底部注入铝离子形成P型屏蔽区;
第七步:在沟槽内热氧化生成栅氧化层,随后在一氧化氮氛围下退火;
第八步:淀积多晶硅;
第九步:刻蚀多晶硅,淀积二氧化硅隔离层;
第十步:淀积发射极和集电极金属,退火形成欧姆接触;
第十一步:刻蚀二氧化硅隔离层形成肖特基接触孔,淀积金属后退火形成肖特基接触;
第十二步:淀积铝或者铜作为器件金属电极。
本发明的有益效果为:本发明在沟槽栅中间引入肖特基接触将发射极金属与P型屏蔽区连接。器件正向导通时,肖特基接触提高了P型屏蔽区的电势,从而抑制空穴被发射极收集,增强了漂移区的电导调制效应,降低了导通压降;器件关断时,P型屏蔽区能屏蔽槽栅倒角处的电场聚集,防止器件提前击穿;同时由于引入肖特基接触,减小了栅极面积,从而降低栅电荷,提高了开关速度,减少了关断损耗。
附图说明
图1为传统具有屏蔽层的碳化硅IGBT器件结构示意图;
图2为本发明实施例1的一种碳化硅IGBT器件结构示意图;
图3为本发明实施例2的在P+衬底层上依次外延形成N型缓冲层、N型电压阻挡层、N型电荷存储层的示意图;
图4为本发明实施例2的注入铝离子形成P型基区的示意图;
图5为本发明实施例2的注入铝离子形成P+接触区的示意图;
图6为本发明实施例2的注入氮离子形成N+接触区并激活退火的示意图;
图7为本发明实施例2的刻蚀栅极沟槽的示意图;
图8为本发明实施例2的在沟槽底部注入铝离子形成P型屏蔽区的示意图;
图9为本发明实施例2的在沟槽内热氧化生成栅氧化层,随后在一氧化氮氛围下退火的示意图;
图10为本发明实施例2的淀积多晶硅的示意图;
图11为本发明实施例2的刻蚀多晶硅,淀积二氧化硅隔离层的示意图;
图12为本发明实施例2的淀积发射极和集电极金属,退火形成欧姆接触的示意图;
图13为本发明实施例2的刻蚀二氧化硅隔离层形成肖特基接触孔,淀积金属后退火形成肖特基接触的示意图。
图14为本发明实施例2的淀积铝或者铜作为器件金属电极的示意。
图中:1为发射极金属、2为发射极欧姆接触、3为P+接触区、4为N+接触区、5为P型基区、6为N型电荷存储层、7为P型屏蔽区、8为N型漂移区、9为N型缓冲层、10为P+衬底、11为集电极欧姆接触、12为集电极金属、13为多晶硅栅、14为栅介质、15为P型屏蔽区肖特基接触。
具体实施方式
以下通过特定的具体实例说明本发明的实施方式,本领域技术人员可由本说明书所揭露的内容轻易地了解本发明的其他优点与功效。本发明还可以通过另外不同的具体实施方式加以实施或应用,本说明书中的各项细节也可以基于不同观点与应用,在没有背离本发明的精神下进行各种修饰或改变。
实施例
本实施例提供的一种碳化硅IGBT器件,如图2所示:
P+衬底10、位于P+衬底10上方的N型缓冲层9、位于N型缓冲层9上方的N型漂移区8、位于N型漂移区8上方的N型电荷存储层6、N型电荷存储层6上方的P型基区5,位于P型基区5上方的P+接触区3和N+接触区4,位于P型基区5之间的沟槽,沟槽内包括栅介质14、栅介质14内部的多晶硅栅13,沟槽中间底部设有P型屏蔽区7,P型屏蔽区7在顶部形成P型屏蔽区肖特基接触15,N+接触区4和P+接触区3上方形成发射极欧姆接触2,一部分发射极金属1淀积于发射极欧姆接触2上方,一部分发射极金属1淀积于P型屏蔽区肖特基接触15上方的栅介质14中间,P+衬底10下方形成集电极欧姆接触11,集电极欧姆接触11下方淀积集电极金属12。
优选的,所述栅介质14为二氧化硅SiO2。
优选的,P+接触区3、N+接触区4、P型基区5、P型屏蔽区7均为多次离子注入形成。
优选的,P+接触区3、N+接触区4、P型基区5、N型电荷存储层6、P型屏蔽区7、N型漂移区8、N型缓冲层9、P+衬底10的材料均为碳化硅。
本例的工作原理为:
当碳化硅IGBT器件正向导通时,肖特基势垒抬高P型屏蔽区电位,空穴相比于传统沟槽型IGBT更难从P型屏蔽区通过,从而增强电导调制效应,降低导通压降,还可以通过控制肖特基势垒来调节IGBT的导通压降;反向击穿时,沟槽底部的P型屏蔽区连接到发射极,不仅抑制了槽栅倒角处的电场聚集,而且保护了槽底集成的肖特基接触界面,防止器件发生提前击穿;同时由于引入肖特基接触,减小了栅极面积,从而降低栅电荷,提高了开关速度,减少了关断损耗。
实施例2
如图3-图14所示,本实施例提供一种碳化硅IGBT器件的制备方法,包括以下步骤:
第一步:在P+衬底层上依次外延形成N型缓冲层、N型电压阻挡层、N型电荷存储层,如图3所示;
第二步:注入铝离子形成P型基区,如图4所示;
第三步:注入铝离子形成P+接触区,如图5所示;
第四步:注入氮离子形成N+接触区并激活退火,如图6所示;
第五步:刻蚀栅极沟槽,如图7所示;
第六步:在沟槽底部注入铝离子形成P型屏蔽区,如图8所示;
第七步:在沟槽内热氧化生成栅氧化层,随后在一氧化氮氛围下退火,如图9所示;
第八步:淀积多晶硅,如图10所示;
第九步:刻蚀多晶硅,淀积二氧化硅隔离层,如图11所示;
第十步:淀积发射极和集电极金属,退火形成欧姆接触,如图12所示;
第十一步:刻蚀二氧化硅隔离层形成肖特基接触孔,淀积金属后退火形成肖特基接触,如图13所示;
第十二步:淀积铝或者铜作为器件金属电极,如图14所示。
所述器件栅介质层端为栅极,P+衬底端为集电极,P+接触区和N+接触区为发射极。
上述实施例仅例示性说明本发明的原理及其功效,而非用于限制本发明。任何熟悉此技术的人士皆可在不违背本发明的精神及范畴下,对上述实施例进行修饰或改变。因此,凡所属技术领域中具有通常知识者在未脱离本发明所揭示的精神与技术思想下所完成的一切等效修饰或改变,仍应由本发明的权利要求所涵盖。
Claims (5)
1.一种碳化硅IGBT器件,其特征在于包括:
P+衬底(10)、位于P+衬底(10)上方的N型缓冲层(9)、位于N型缓冲层(9)上方的N型漂移区(8)、位于N型漂移区(8)上方的N型电荷存储层(6)、N型电荷存储层(6)上方的P型基区(5),位于P型基区(5)上方的P+接触区(3)和N+接触区(4),位于P型基区(5)之间的沟槽,沟槽内包括栅介质(14)、栅介质(14)内部的多晶硅栅(13),沟槽中间底部设有P型屏蔽区(7),P型屏蔽区(7)在顶部形成P型屏蔽区肖特基接触(15),N+接触区(4)和P+接触区(3)上方形成发射极欧姆接触(2),一部分发射极金属(1)淀积于发射极欧姆接触(2)上方,一部分发射极金属(1)淀积于P型屏蔽区肖特基接触(15)上方的栅介质(14)中间,P+衬底(10)下方形成集电极欧姆接触(11),集电极欧姆接触(11)下方淀积集电极金属(12)。
2.根据权利要求1所述的一种碳化硅IGBT器件,其特征在于:所述栅介质(14)为二氧化硅(SiO2)。
3.根据权利要求1所述的一种碳化硅IGBT器件,其特征在于:所述P+接触区(3)、N+接触区(4)、P型基区(5)、P型屏蔽区(7)均为多次离子注入形成。
4.根据权利要求1所述的一种碳化硅IGBT器件,其特征在于:P+接触区(3)、N+接触区(4)、P型基区(5)、N型电荷存储层(6)、P型屏蔽区(7)、N型漂移区(8)、N型缓冲层(9)、P+衬底(10)的材料均为碳化硅。
5.权利要求1至4任意一项所述的碳化硅IGBT器件的制造方法,其特征在于包括以下步骤:
第一步:在P+衬底层上依次外延形成N型缓冲层、N型电压阻挡层、N型电荷存储层;
第二步:注入铝离子形成P型基区;
第三步:注入铝离子形成P+接触区;
第四步:注入氮离子形成N+接触区并激活退火;
第五步:刻蚀栅极沟槽;
第六步:在沟槽底部注入铝离子形成P型屏蔽区;
第七步:在沟槽内热氧化生成栅氧化层,随后在一氧化氮氛围下退火;
第八步:淀积多晶硅;
第九步:刻蚀多晶硅,淀积二氧化硅隔离层;
第十步:淀积发射极和集电极金属,退火形成欧姆接触;
第十一步:刻蚀二氧化硅隔离层形成肖特基接触孔,淀积金属后退火形成肖特基接触;
第十二步:淀积铝或者铜作为器件金属电极。
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