CN115356532A - Multi-channel frequency measuring system and method for microprocessor - Google Patents
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Abstract
The invention discloses a multi-path frequency measurement system of a microprocessor and a method thereof, wherein the system is realized by the microprocessor, an external crystal oscillator and a processor on-chip timer, and comprises a high-frequency clock module, a gate signal timer, a first full-period pulse counter, a second full-period pulse counter, a first gate signal timer capturing channel, a second gate signal timer capturing channel and a data processing module. The gate signal TIMER carries out periodic counting on high-frequency clock pulses and triggers a first TIMER TIMER1 to interrupt a service function; the first full-period pulse counter counts the rising edges of a detected signal 1, and the second full-period pulse counter counts the rising edges of a detected signal 2; channel 1 of the first TIMER1 captures signal under test 1, channel 2 captures signal under test 2, and the rising edge triggers. And the data processing module calculates the frequency of the detected signal according to the effective capture value and the pulse number. The invention effectively reduces the complexity of hardware circuits and saves the cost.
Description
Technical Field
The invention relates to a multi-channel frequency measurement system of a microprocessor and a frequency measurement method thereof, belonging to the technical field of electronic circuits.
Background
In the inertial navigation system, a vibration beam accelerometer is usually adopted for frequency measurement, the acceleration input by the vibration beam accelerometer in the frequency measurement process is represented by the frequency difference of two TTL square wave signals, the frequency measurement of the two TTL square wave signals needs to be carried out synchronously and continuously in order to truly reflect the input acceleration, and especially under the condition of large dynamic, the requirements on synchronization, continuity and high speed are stricter. In addition, the calculation accuracy of the inertial navigation system is favorably improved through the synchronous measurement of the multiple vibration beam accelerometers, and therefore, the large-dynamic high-accuracy FDC (frequency digital conversion) is generally adopted to simultaneously carry out synchronous, continuous, high-speed and accurate frequency measurement on TTL (transistor-transistor logic) square wave signals output by the multiple vibration beam accelerometers so as to continuously measure the input acceleration of the multiple vibration beam accelerometers in the same time interval, thereby ensuring the measurement accuracy of the single vibration beam accelerometer and the calculation accuracy of the inertial navigation system.
The traditional high-precision frequency measurement usually adopts an FPGA integrated circuit to complete a filtering module of a signal to be measured, a latch and zero clearing signal generating module, a full-period counter module, a filling pulse counter module and a counting latch module, so as to realize the measurement of multi-path frequency signals. With the advance of the process of localization, small size and low cost, the microprocessor gradually replaces an FPGA integrated circuit, and the traditional frequency measurement means can not meet the use requirements. If the high-precision frequency measurement can be realized by the microprocessor, the requirement in the inertial navigation system is met, the cost can be saved, and the complexity of a hardware circuit can be reduced.
Disclosure of Invention
The invention aims to provide a frequency measurement system based on a microprocessor and a frequency measurement method thereof aiming at the development requirements and the problems in the prior art, simultaneously measure the frequency of multiple paths of signals and ensure the accuracy of a frequency measurement result.
In order to realize the purpose of the invention, the multi-channel frequency measurement system of the microprocessor adopts the following technical scheme:
the frequency measurement system is realized by a microprocessor, an external crystal oscillator and a processor on-chip timer, and comprises a high-frequency clock module, a gate signal timer, a first full-period pulse counter, a second full-period pulse counter, a first gate signal timer capturing channel, a second gate signal timer capturing channel and a data processing module.
The high-frequency clock module is generated by frequency division and frequency multiplication of a clock of an external crystal oscillator by a clock control unit of the microprocessor;
the gate signal TIMER is realized by a first TIMER TIMER1 on the microprocessor chip, periodically counts high-frequency clock pulses, locks a counting result in a counter register of the first TIMER TIMER1, and triggers the first TIMER TIMER1 to interrupt a service function when a rising edge is effective and the first TIMER TIMER1 is triggered;
the first full-period pulse counter is realized by a second TIMER TIMER2 on the microprocessor chip, a trigger source is a filtered external trigger input signal 1 to be detected, a rising edge is effective, and a counting result is locked in a counter register of the second TIMER TIMER 2;
the second full-period pulse counter is realized by a third TIMER TIMER3 on the microprocessor chip, the trigger source is a filtered external trigger input signal to be detected 2, the rising edge is effective, and a counting result is locked in a counter register of the third TIMER TIMER 3;
the first gate signal TIMER capturing channel captures a signal 1 to be tested in a first channel of the first TIMER TIMER1, capturing a rising edge moment on a first channel input pin of the TIMER1, and latching a current value of a TIMER1 counter in a TIMER1 first channel capturing register;
the capturing channel of the second gate signal TIMER captures a signal 2 to be detected in a second channel of the first TIMER TIMER1, capturing a rising edge moment on a second channel input pin of the TIMER1, and latching a current value of a TIMER1 counter in a TIMER1 second channel capturing register;
and the data processing module calculates a register value of a second TIMER TIMER2 latched by the first full-period pulse counter, a register value of a third TIMER TIMER3 latched by the second full-period pulse counter, a register value of a first TIMER TIMER1 first channel latched by a first gate signal TIMER capturing channel, and a register value of a first TIMER TIMER1 second channel capturing latched by a second gate signal TIMER capturing channel to obtain the frequency of the measured signal.
According to another aspect of the invention, the provided microprocessor multi-path frequency measurement method adopts the following technical scheme:
the first gate signal TIMER capturing channel captures a signal 1 to be detected in a first channel of the first TIMER TIMER1, captures a current value of a TIMER1 counter at a rising edge moment on a first channel input pin of the TIMER1, and latches the current value in a TIMER1 first channel capturing register; the capturing channel of the second gate signal TIMER captures a signal 2 to be detected in a second channel of the first TIMER TIMER1, captures the current value of a TIMER1 counter at the rising edge moment on a second channel input pin of the TIMER1, and latches the current value in a TIMER1 second channel capturing register;
the first full-period pulse counter counts the rising edges of the tested signal 1 by a second TIMER TIMER2, and the second full-period pulse counter counts the rising edges of the tested signal 2 by a third TIMER TIMER 3;
in the first TIMER TIMER1 interrupt service function, the data processing module periodically reads count values of the second TIMER TIMER2 and the third TIMER TIMER3, and records that the pulse count numbers of the current period and the last period of the tested signal 1 and the tested signal 2 are respectively N1 i 、N1 i-1 And N2 i 、N2 i-1 (ii) a Reading the value of a first channel capture register of the first gate signal TIMER, recording the values of a first channel capture register of a first TIMER TIMER1 at the moment when the current period and the upper period of the tested signal are captured into the trigger edge moment as t1 respectively i 、t1 i-1 (ii) a Reading the value of a second channel capture register of the second gate signal TIMER, and recording the values of a first TIMER TIMER1 and a second channel capture register of a current period, an upper period and a trigger edge moment of a measured signal 2 as t2 respectively i 、t2 i-1 Then, the first step is executed,
the frequency of the detected signal 1 is:
the frequency of the signal 2 to be measured is:
further, the data processing module further corrects and processes the obtained data, and the method comprises the following steps:
taking the measured signal 1 as an example, in the first TIMER TIMER1 interrupt service function, the data processing module reads the pulse count number of the measured signal and the value of the first TIMER TIMER1 channel capture register capturing the trigger edge moment, and obtains the effective pulse count number and capture counter value N1 of the current period and the last period i 、N1 i-1 And t1 i 、t1 i-1 Then Δ N1 i ＝N1 i -N1 i-1 、Δt1 i ＝t1 i -t1 i-1 ,
If Δ N1 i If > 0, then Δ N1 i ＝ΔN1 i Otherwise Δ N1 i ＝ΔN1 i +65536；
If Δ t1 i ＜-T G 2, then Δ t1 i ＝Δt1 i +T G If Δ t1 i ＞T G 2, then Δ t1 i ＝Δt1 i -T G Otherwise Δ t1 i ＝Δt1 i ；
The data processing module calculates the frequency of the signal 1 to be measured
Periodic updating of Δ N1 in interrupt service function i 、Δt1 i The data processing module calculates the frequency f1 of the measured signal 1 in real time i ；
The measured signal 2 is processed by the same method, and the frequency of the measured signal 2 is calculated
The invention adopts a processor, realizes two paths of frequency measurement by applying three general timers in a chip and one path of timing interruption and applying a method of equal precision frequency measurement, and optimizes data through software. The frequency measurement method can be popularized and applied to a microprocessor with an on-chip timer, and the measured signals can be simultaneously carried out in multiple paths, so that the complexity of a hardware circuit is effectively reduced, and the cost is saved.
The invention is mainly characterized in that:
1. the multi-channel frequency measurement system provided by the invention is realized by the microprocessor, the external crystal oscillator and the timer on the processor chip, so that the complexity of a hardware circuit is effectively reduced, and the multi-channel frequency measurement system is easy to popularize;
2. the multichannel frequency measurement principle provided by the invention adopts the functions of rising edge counting and channel capturing, and avoids the use of multipath interruption and interruption nesting;
3. the multi-channel signal frequency measurement specific implementation method and the data processing module provided by the invention can be used for correcting the obtained data, so that the problems of asynchronous data periods, rising edge conflicts, hop counts and the like are solved, and the accuracy of frequency measurement precision is ensured.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention. It is obvious that the drawings in the following description are only some embodiments of the invention, and that for a person skilled in the art, other drawings can be derived from them without inventive effort.
Fig. 1 shows a schematic diagram of a multi-channel frequency measurement system of a microprocessor according to an embodiment of the present invention.
Fig. 2 is a schematic diagram illustrating a multi-channel frequency measurement principle provided according to an embodiment of the present invention.
Fig. 3 is a schematic flow chart illustrating the process of identifying the number of valid pulse counts and capturing register values by the data processing module of the signal under test 1 according to the embodiment of the present invention.
Detailed Description
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention provides a multi-path frequency measurement system of a microprocessor, which is realized by the microprocessor, an external crystal oscillator and a processor on-chip timer, and for two paths of frequency measurement, the frequency measurement system comprises a high-frequency clock module, a gate signal timer, a full-period pulse counter 1, a full-period pulse counter 2, a gate signal timer capturing channel 1, a gate signal timer capturing channel 2 and a data processing module, as shown in figure 1.
The high-frequency clock module is generated by frequency division and frequency multiplication of a clock of an external crystal oscillator by a clock control unit of the microprocessor (about 1Mhz to 200 Mhz).
The gate signal TIMER is implemented by a TIMER TIMER1 on the microprocessor chip, which performs a periodicity (period T) on the high frequency clock pulses G ) Count and latch the count result in the counter register of TIMER1, while TIMER1 generates a periodic interrupt (the rising edge is active), triggering TIMER1 to interrupt the service function.
The whole-period pulse counter 1 is realized by a TIMER TIMER2 on the microprocessor chip, the triggering source is a filtered External Trigger Input (ETI) signal to be detected 1, the rising edge is triggered, and the counting result is latched in a counter register of the TIMER TIMER 2.
The whole-period pulse counter 2 is realized by a TIMER TIMER3 on the microprocessor chip, the triggering source is a filtered External Trigger Input (ETI) signal to be detected 2, the rising edge is triggered, and the counting result is latched in a counter register of the TIMER TIMER 3.
The gate signal TIMER capturing channel 1 captures a signal 1 to be tested in a channel 1 of the TIMER TIMER1, captures a rising edge moment on an input pin of the TIMER1 channel 1, and latches the current value of a TIMER1 counter in a TIMER1 channel 1 capturing register.
And the gate signal TIMER capture channel 2 captures a signal 2 to be tested in a channel 2 of the TIMER TIMER1, captures a rising edge moment on an input pin of the TIMER1 channel 2, and latches the current value of the TIMER1 counter in a TIMER1 channel 2 capture register.
And the data processing module calculates, processes and corrects the channel 1 capture register value latched by the gate signal TIMER capture channel 1, the channel 2 capture register value latched by the gate signal TIMER capture channel 2, the TIMER2 counter register value and the TIMER3 counter register value, and calculates the frequency of the measured signal.
Based on the multi-path frequency measurement system of the microprocessor, the invention provides a multi-path frequency measurement method of the microprocessor, which comprises the following steps:
as shown in FIG. 2, the strobe signal is generated by the strobe signal TIMER TIMER1 for a period of time T G (rising edge triggered interrupts); the high-frequency clock is generated by frequency division and frequency multiplication of the clock of the external crystal oscillator by a clock control unit of the microprocessor. And the channel 1 of the TIMER TIMER1 captures a signal 1 to be tested, captures a rising edge moment on an input pin of the TIMER1 channel 1, and latches the current value of the TIMER1 counter in a TIMER1 channel 1 capture register. Channel 2 of TIMER1 captures signal under test 2 and latches the current value of TIMER1 counter in TIMER1 channel 2 capture register at the time of capturing the rising edge on the input pin of TIMER1 channel 2. TIMER2 of the whole period pulse counter 1 counts the rising edges of the tested signal 1, and TIMER3 of the whole period pulse counter 2 counts the rising edges of the tested signal 2. In the TIMER TIMER1 interrupt service function, the data processing module is periodically (period T) G ) Reading the count values of the TIMER TIMER2 and the TIMER TIMER3, and recording the number of the pulse counts in the current period and the last period of the tested signal 1 and the tested signal 2 as N1 respectively i 、N1 i-1 And N2 i 、N2 i-1 (ii) a Reading the value of a first channel capture register of the first gate signal timer, and recording a first timer for capturing the trigger edge moment of the 1-th cycle, the upper cycle and the trigger edge moment of the signal to be testedThe values of capture registers of a first channel of TIMER1 are t1 respectively i 、t1 i-1 (ii) a Reading the value of a second channel capture register of the second gate signal TIMER, recording the value of a first TIMER TIMER1 second channel capture register at the moment of capturing the trigger edge in the current period and the last period of the signal to be measured 2 as t2 i 、t2 i-1 . The frequency of the detected signal 1 is
The frequency of the measured signal 2 is
In an embodiment of the present invention, the data processing module processes the obtained data Δ N1 i 、Δt1 i Further correction processing is carried out, the problems of asynchronous data periods, rising edge conflicts, hop counts and the like are solved, and the method comprises the following steps:
taking the measured signal 1 as an example, the data processing module in the TIMER1 interrupt service function reads the pulse count number of the measured signal and the value of the channel 1 capture register at the time when the channel 1 captures the rising edge of the signal 1, and obtains the effective pulse count number of the period and the effective pulse count number of the last period and the value N1 of the capture register i 、N1 i-1 And t1 i 、t1 i-1 Then Δ N1 i ＝N1 i -N1 i-1 、Δt1 i ＝t1 i -t1 i-1 。
If Δ N1 i If > 0, then Δ N1 i ＝ΔN1 i Otherwise Δ N1 i ＝ΔN1 i +65536; if Δ t1 i ＜-T G /2, then Δ t1 i ＝Δt1 i +T G If Δ t1 i ＞T G 2, then Δ t1 i ＝Δt1 i -T G Otherwise Δ t1 i ＝Δt1 i . The data processing module calculates the frequency of the measured signal 1
Periodic updating of Δ N1 in interrupt service function i 、Δt1 i The data processing module calculates the frequency f1 of the measured signal 1 in real time i 。
The measured signal 2 is processed by the same method, and the frequency of the measured signal 2 is calculated
In an embodiment of the present invention, as shown in fig. 3, the method for obtaining the number of pulse counts in the present period and capturing the channel capture register at the time of rising edge is as follows:
taking a signal to be measured 1 as an example, the TIMER2 of the full-period pulse counter 1 counts the rising edges of the signal to be measured 1, and reads the number Sig1L1 of pulses;
the gate signal TIMER capturing channel 1 captures a signal 1 to be detected in a channel 1 of the TIMER TIMER1, captures a rising edge moment on an input pin of the TIMER1 channel 1, latches the current value of a TIMER1 counter in a TIMER1 channel 1 capturing register, and reads a capturing value Sig1H1;
after waiting for 200ns (the waiting time is determined by the frequency of the high-frequency clock pulse), the whole-period pulse counter 1 and the gate signal timer capture channel 1 respectively read the number of pulses Sig1L2 and the capture value Sig1H2;
judging whether the two captured values are equal, if Sig1H1= Sig1H2, then the effective captured value Sig1H = Sig1H1, and the effective count value Sig1L = Sig1L1; if Sig1H1 ≠ Sig1H2, and Sig1L1= Sig1L2, then the valid capture value Sig1H = Sig1H2, and the valid count value Sig1L = Sig1L1; if Sig1H1 ≠ Sig1H2, and Sig1L1 ≠ Sig1L2, then the valid capture value Sig1H = Sig1H2, and the valid count value Sig1L = Sig1L2. Then, the current effective capture value t1i = Sig1H, and the current effective number of pulses N1i = Sig1L.
For the measured signal 2, the same method is adopted, in the first TIMER1 interrupt service function, the data processing module reads the number of measured signal pulse counts of the third TIMER3 and captures a rising edge moment on an input pin of the TIMER1 channel 2, and the TIMER1 channel 2 captures a register value to obtain the number of pulse counts in the period and the capture register value at the time of capturing the rising edge moment.
The frequency measurement method applies three universal timers in a chip and one path of timing interruption, realizes two paths of frequency measurement, optimizes data through software, and effectively corrects and perfects the problems of asynchronous data periods, rising edge conflicts, hop counts and the like. The method can be popularized and applied to a microprocessor with an on-chip timer to carry out multi-channel signal frequency measurement, effectively reduce the complexity of a hardware circuit and save the cost.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (4)
1. A multi-channel frequency measurement system of a microprocessor is characterized in that the frequency measurement system is realized by the microprocessor, an external crystal oscillator and a timer on a processor chip and comprises a high-frequency clock module, a gate signal timer, a first full-period pulse counter, a second full-period pulse counter, a first gate signal timer capturing channel, a second gate signal timer capturing channel and a data processing module,
the high-frequency clock module is generated by frequency division and frequency multiplication of a clock of an external crystal oscillator by a clock control unit of the microprocessor;
the gate signal TIMER is realized by a first TIMER TIMER1 on the microprocessor chip, periodically counts high-frequency clock pulses, locks a counting result in a counter register of the first TIMER TIMER1, and triggers the first TIMER TIMER1 to interrupt a service function when a rising edge is effective and the first TIMER TIMER1 is triggered;
the first whole-period pulse counter is realized by a second TIMER TIMER2 on the microprocessor chip, a trigger source is a signal 1 to be tested, a rising edge is effective, and a counting result is locked in a counter register of the second TIMER TIMER 2;
the second full-period pulse counter is realized by a third TIMER TIMER3 on the microprocessor chip, the trigger source is a signal 2 to be measured, the rising edge is effective, and the counting result is locked in a counter register of the third TIMER TIMER 3;
the first gate signal TIMER capturing channel captures a signal 1 to be tested in a first channel of the first TIMER TIMER1, captures a rising edge moment on a first channel input pin of the TIMER1, and latches the current value of a TIMER1 counter in a TIMER1 first channel capturing register;
the capturing channel of the second gate signal TIMER captures a signal 2 to be detected in a second channel of the second TIMER TIMER1, a rising edge moment is captured on a second channel input pin of the TIMER1, and the current value of a TIMER1 counter is latched in a TIMER1 second channel capturing register;
and the data processing module calculates a register value of a second TIMER TIMER2 latched by the first full-period pulse counter, a register value of a third TIMER TIMER3 latched by the second full-period pulse counter, a register value of a first TIMER TIMER1 first channel latched by a first gate signal TIMER capturing channel, and a register value of a first TIMER TIMER1 second channel capturing latched by a second gate signal TIMER capturing channel to obtain the frequency of the measured signal.
2. A frequency measuring method of a multi-channel frequency measuring system based on a microprocessor is characterized in that,
the first gate signal TIMER capturing channel captures a signal 1 to be tested in a first channel of the first TIMER TIMER1, captures a rising edge moment on a first channel input pin of the TIMER1, and latches the current value of a TIMER1 counter in a TIMER1 first channel capturing register; and the capturing channel of the second gate signal TIMER captures a signal 2 to be detected in a second channel of the second TIMER TIMER1, captures a rising edge moment on a second channel input pin of the TIMER1, and latches the current value of the TIMER1 counter in a second channel capturing register of the TIMER 1.
The second TIMER TIMER2 of the first full-period pulse counter counts the rising edges of the measured signal 1, the third TIMER TIMER3 of the second full-period pulse counter 2 counts the rising edges of the measured signal 2,
in the first TIMER TIMER1 interrupt service function, the data processing module periodically reads the count values of the second TIMER TIMER2 and the third TIMER TIMER3, and records that the pulse count numbers of the current period and the last period of the tested signal 1 and the tested signal 2 are respectively N1 i 、N1 i-1 And N2 i 、N2 i-1 Reading the values of the capture register of the capture channel of the first gate signal TIMER, and recording the values of the capture register of the first channel of the first TIMER TIMER1 at the moment when the current period and the last period of the tested signal 1 capture the trigger edge as t1 respectively i 、t1 i-1 (ii) a Reading the values of the capture channel capture registers of the second gate signal TIMER, and recording the values of the capture channel capture registers of the first TIMER TIMER1 and the second TIMER TIMER2 which capture the trigger edge moment of the tested signal 2 in the current period and the upper period respectively as t2 i 、t2 i-1 Then, the first step is executed,
the frequency of the detected signal 1 is:
the frequency of the signal 2 to be measured is:
3. the frequency measurement method of the multi-channel frequency measurement system based on the microprocessor as claimed in claim 2, wherein the data processing module further modifies the obtained data by the following method:
taking the measured signal 1 as an example, in the first TIMER TIMER1 interrupt service function, the data processing module reads the pulse count number of the measured signal and the counter value of the first TIMER TIMER1 capturing the trigger edge moment, and obtains the effective pulse count number of the current period and the last period and the capture register value N1 i 、N1 i-1 And t1 i 、t1 i-1 Then Δ N1 i ＝N1 i -N1 i-1 、Δt1 i ＝t1 i -t1 i-1 ,
If Δ N1 i If > 0, then Δ N1 i ＝ΔN1 i Otherwise Δ N1 i ＝ΔN1 i +65536；
If Δ t1 i ＜-T G /2, then Δ t1 i ＝Δt1 i +T G If Δ t1 i ＞T G 2, then Δ t1 i ＝Δt1 i -T G Otherwise Δ t1 i ＝Δt1 i ,
The data processing module calculates the frequency of the measured signal 1
Periodic updating of Δ N1 in interrupt service function i 、Δt1 i The data processing module calculates the frequency f1 of the measured signal 1 in real time i ；
The measured signal 2 is processed by the same method, and the frequency of the measured signal 2 is calculated
4. The method as claimed in claim 3, wherein in the first TIMER TIMER1 interrupt service function, the data processing module reads the number of pulse counts of the signal to be measured and the channel capture register value for capturing the rising edge time, and the method for obtaining the number of pulse counts in the present period and the track capture register value for capturing the trigger edge time is as follows:
for the signal 1 to be measured, a second TIMER TIMER2 of the pulse counter in the whole first period counts the rising edge of the signal 1 to be measured, and the number of read pulses is Sig1L1;
the first gate signal TIMER capturing channel captures a signal 1 to be detected in a first channel of the first TIMER TIMER1, captures a rising edge moment on a first channel input pin of the TIMER1, latches the current value of a TIMER1 counter in a first channel capturing register of the TIMER1, and reads a capturing register value Sig1H1;
after waiting for t, the waiting time is determined by the frequency of the high-frequency clock pulse, and the first full-period pulse counter and the capturing channel of the first gate signal timer respectively read the number Sig1L2 of pulses and the value Sig1H2 of the capturing register;
judging whether the two captured values are equal, if Sig1H1= Sig1H2, then the effective captured value Sig1H = Sig1H1, and the effective count value Sig1L = Sig1L1; if Sig1H1 ≠ Sig1H2, and Sig1L1= Sig1L2, then the valid capture value Sig1H = Sig1H2, the valid count value Sig1L = Sig1L1; if Sig1H1 ≠ Sig1H2, and Sig1L1 ≠ Sig1L2, then the valid capture value Sig1H = Sig1H2, the valid count value Sig1L = Sig1L2,
then, the current effective capture value t1i = Sig1H, and the number of effective pulses N1i = Sig1L;
for the measured signal 2, the same method is adopted, in the first TIMER TIMER1 interrupt service function, the data processing module reads the number of the measured signal pulse counts and captures the trigger edge time of the third TIMER TIMER3, and the TIMER1 second channel captures the register to obtain the number of the pulse counts in the period and the capture register value for capturing the trigger edge time.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110001567A1 (en) * | 2009-07-06 | 2011-01-06 | Nortel Networks Limited | System and method for built in self test for timing module holdover |
| CN108333425A (en) * | 2018-01-16 | 2018-07-27 | 南昌大学 | A kind of digital frequency meter |
| CN108872702A (en) * | 2018-05-25 | 2018-11-23 | 中国科学院电子学研究所 | The frequency measuring system and method in adaptive period |
| CN110988468A (en) * | 2019-12-18 | 2020-04-10 | 北京自动化控制设备研究所 | Frequency measurement device and method applied to inertial navigation system |
| CN114866073A (en) * | 2022-04-29 | 2022-08-05 | 傲拓科技股份有限公司 | Pulse counting system for rapid full-range measurement and working method thereof |
-
2022
- 2022-08-26 CN CN202211033488.9A patent/CN115356532B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110001567A1 (en) * | 2009-07-06 | 2011-01-06 | Nortel Networks Limited | System and method for built in self test for timing module holdover |
| CN108333425A (en) * | 2018-01-16 | 2018-07-27 | 南昌大学 | A kind of digital frequency meter |
| CN108872702A (en) * | 2018-05-25 | 2018-11-23 | 中国科学院电子学研究所 | The frequency measuring system and method in adaptive period |
| CN110988468A (en) * | 2019-12-18 | 2020-04-10 | 北京自动化控制设备研究所 | Frequency measurement device and method applied to inertial navigation system |
| CN114866073A (en) * | 2022-04-29 | 2022-08-05 | 傲拓科技股份有限公司 | Pulse counting system for rapid full-range measurement and working method thereof |
Non-Patent Citations (1)
| Title |
|---|
| 曾文锋;李申鹏;田玉敏;: "微波测距仪频率测量的方法设计与实现", 电子测量技术, no. 08, 15 August 2009 (2009-08-15) * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116436588A (en) * | 2023-04-17 | 2023-07-14 | 北京中科昊芯科技有限公司 | High-precision signal capturing and measuring device |
| CN116436588B (en) * | 2023-04-17 | 2024-04-16 | 北京中科昊芯科技有限公司 | High-precision signal capturing and measuring device |
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