CN112730979B - STM 32-based equal-precision frequency measurement method - Google Patents
STM 32-based equal-precision frequency measurement method Download PDFInfo
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- CN112730979B CN112730979B CN202011555226.XA CN202011555226A CN112730979B CN 112730979 B CN112730979 B CN 112730979B CN 202011555226 A CN202011555226 A CN 202011555226A CN 112730979 B CN112730979 B CN 112730979B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
- G01R23/02—Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage
- G01R23/10—Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage by converting frequency into a train of pulses, which are then counted, i.e. converting the signal into a square wave
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
- G01L1/00—Measuring force or stress, in general
- G01L1/10—Measuring force or stress, in general by measuring variations of frequency of stressed vibrating elements, e.g. of stressed strings
Abstract
The invention belongs to the technical field of frequency testing, and relates to an equal-precision frequency measuring method based on STM32, wherein a PWM module of an MCU is adopted to generate a controllable software gate, the time of the controllable gate is set to be N measured signal period durations, and a standard signal and a measured signal are synchronously acquired by an MCU self-contained counter within the gate time; further calculating to obtain the frequency value of the detected signal; the high-speed high-precision frequency acquisition without software interruption intervention is realized, and the circuit has the advantages of simple structure, low cost and high-precision frequency acquisition.
Description
Technical Field
The invention belongs to the technical field of frequency testing, and relates to an equal-precision frequency measuring method based on STM 32.
Background
The silicon resonance pressure sensor with the precision superior to 0.02 percent FS is a top-grade product in the pressure sensor, is a core part of high-end instruments such as aviation, meteorological stations, pressure controllers and the like, and plays an important application in the national civilians such as aerospace, industrial control and the like. The characteristics of high precision, high stability and high reliability of the newly developed domestic high-precision silicon resonant pressure sensor can be more widely applied in the future. However, the output of the domestic silicon resonance pressure sensor is two paths of frequency signals, the variable quantities are equal in size and opposite in direction, so that higher requirements are provided for the acquisition precision and the synchronism of two paths of frequencies, and the faster data updating rate of aviation atmospheric data parameters requires a faster frequency acquisition speed.
In the current frequency acquisition method, a constant-precision measurement method can realize higher-precision frequency acquisition, and the realization modes include two types: one is realized by the MCU or the singlechip in combination with special FPGA chips, triggers, counters and other hardware; the other is realized by setting an interrupt through software by utilizing the capture function of the MCU self-contained counter. The former has complex technology and high cost, the latter needs to be specially provided with a plurality of capturing interrupts, and during high-speed acquisition, the capturing interrupts are easy to interfere with task interrupts, which not only causes measurement errors but also interferes with normal task execution.
Disclosure of Invention
The purpose of the invention is: the STM 32-based equal-precision frequency measurement method is provided to realize high-precision frequency acquisition with simple structure and low cost without software interrupt intervention.
In order to solve the technical problem, the technical scheme of the invention is as follows:
an equal-precision frequency measurement method based on STM32 is characterized in that a PWM module of an MCU is adopted to generate a controllable software gate, the time of the controllable gate is set to be N measured signal period durations, and a counter of the MCU is arranged in the gate time to synchronously acquire a standard signal and a measured signal; and then calculating to obtain the frequency value of the detected signal.
The measuring method comprises the following steps:
step one, setting a controllable software gate:
acquiring the frequency of a measured signal by using a first counter, and acquiring the frequency of a standard signal by using a second counter;
1.1, initializing a first counter, setting a gate control channel of the first counter to be in a PWM2 mode through software, and setting a PWM output gate control initial comparison value i of the gate control channel of the first counter; setting a gating channel of a first counter to close I/O output, and outputting low level to be effective;
1.2, setting the counting period of a first counter to be N + i, wherein N is preset gate time; the slave mode is set to an external clock mode, and the trigger source is set to an external clock; the master mode trigger output is set as a gating channel to output an effective signal, the output mode is set as a single pulse mode, and the master-slave mode is set as a closed mode;
step two, setting synchronous acquisition:
2.1, initializing a second counter of the timer:
setting a counting period of a second counter, wherein a clock source is an internal clock, a slave mode is a gating mode, and a trigger source is the first counter;
initializing a fourth counter to be used as a processing period task, setting an interrupt period of the second counter, setting the trigger output of a master mode to be trigger reset, and setting a master-slave mode to be closed;
step three: calculating the frequency value of the measured signal:
starting all counters;
reading the value of the counter;
according to N 0 f 0 = Nf, calculation f = N 0 f 0 /N；
Wherein: f-measured signal frequency, N-measured signal number, f 0 - -standard signal frequency, N 0 -number of standard signals.
In the first step, the third counter is used as the cascade of the first counter, the first counter is set to zero when the first counter is full of a fixed value, and the third counter is added by 1. To prevent overflow from occurring due to a small number of first counter bits.
When the third counter is used for cascading, the method further comprises the following initialization operation:
the master mode trigger output of the second counter is set as a full update trigger, and the master-slave mode is set as an enable;
initializing a third counter to set a counting period of the third counter, wherein the slave mode is an external clock mode, and a trigger source is a second counter; the master mode trigger output is set to trigger reset, and the master-slave mode is set to close.
The PWM output gating initial comparison value i is a natural number which is not less than 5, so that the instability of a starting signal is avoided, and preferably, the value is 10.
And setting the trigger polarity as rising edge trigger in the step one.
Calculating standard signal period number N in step three 0 The formula is as follows:
when cascaded, the third counter works to read the count value N of the third counter 2 ，N 0 ＝N 2 ×NP+N 1 ；
When there are no cascaded counters, N 0 ＝N 1 ；
Wherein NP is the counting period of the second counter; n is a radical of 1 Is the second counter count value.
Preferably, a first channel of the first counter is used for acquiring the signal under test and a second channel is used for gating.
The invention has the beneficial effects that:
the invention provides an equal-precision frequency measurement method for realizing pure hardware operation by utilizing the synchronization and cascade functions of an MCU counter and arranging a controllable gate through a PWM (pulse width modulation) module of the MCU. The method realizes high-speed high-precision frequency acquisition without software interruption intervention, does not need to add extra hardware, has simple circuit structure (does not need to add extra circuits such as a gate circuit, a synchronous circuit, a counting circuit, a timing circuit and the like), low cost (does not need a high-cost FPGA chip), high precision, and can realize more telling frequency acquisition because no extra software interruption is added in the frequency measurement process and the execution of normal task interruption is not interfered.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings used in the examples of the present invention will be briefly explained below. It is obvious that the drawings described below are only some embodiments of the invention, and that for a person skilled in the art, other drawings can be obtained from these drawings without inventive effort.
Fig. 1 is a schematic diagram of equal-precision frequency measurement.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention. It should be apparent that the described embodiments are only some of the embodiments of the present invention, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without any creative effort belong to the protection scope of the present invention.
Features of various aspects of embodiments of the invention will be described in detail below. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without these specific details. The following description of the embodiments is merely intended to better understand the present invention by illustrating examples thereof. The present invention is not limited to any particular arrangement or method provided below, but rather covers all product structures, any modifications, alterations, etc. of the method covered without departing from the spirit of the invention.
In the drawings and the following description, well-known structures and techniques are not shown to avoid unnecessarily obscuring the present invention.
The technical scheme adopted by the invention is that a PWM module carried by an MCU is adopted to generate a controllable software gate, the time of the controllable gate is the period duration of N measured signals, and a standard signal and the measured signal are simultaneously acquired by a counter carried by the MCU within the gate time, as shown in figure 1: one counter is started, when the measured signal f is started to be collected, the counter can simultaneously generate a PWM (pulse-width modulation) gating signal, the other counter synchronously starts to collect the standard signal f0 under the driving of the gating signal, and when the gating signal reaches the set N value, the two counters immediately stop counting to obtain the counting value N of the standard signal 0 。
From N 0 f 0 = Nf the frequency value of the measured signal can be calculated:
wherein:
f-measured signal frequency
N- -number of signals to be measured
f 0 -standard signal frequency
N 0 Number of standard signals
The embodiment is used for measuring two output frequencies of the silicon resonant pressure sensor, the MCU selects STM32F405RGT6, and the specific measurement steps are as follows:
step 1: by utilizing the synchronization and cascade functions of the MCU TIMER, TIMER3, TIMER1 and TIMER8 can work cooperatively, TIMER3 is utilized to collect the frequency of a measured signal, TIMER1 is utilized to collect the frequency of a standard signal, TIMER8 is used as the cascade of TIMER1 for preventing the overflow of the count of TIMER1 because TIMER1 is a 16-bit counter, and the count of TIMER8 is increased by 1 after the TIMER1 is set to be full of 60000;
and 2, step: a tested signal is connected to a CH1 channel of a TIMER3 of a counter of an STM32F405RGT6 chip after passing through a Schmidt inverter;
and 3, step 3: initializing a TIMER TIMER3, setting a CH2 (a channel 2 is a gating channel) of the TIMER3 into a PWM2 mode through software, and setting a PWM output gating initial comparison value of the CH2 of the TIMER3 to be 5; setting CH2 of TIMER3 to close I/O output, and outputting effective low level;
and 4, step 4: setting a counting period of TIMER3 to be N +10 (N is preset gate time and is set according to a task period), setting a slave mode to be an external clock mode, setting a trigger source to be an external clock, and setting trigger polarity to be rising edge trigger; the master mode trigger output is set to OC2REF synchronous trigger (the gated channel outputs a valid signal), the output mode is set to single pulse mode, and the master-slave mode is set to off.
Step 6: initializing a TIMER TIMER1, setting a counting period of TIMER1 to 60000, setting a clock source as an internal clock, setting a slave mode as a gating mode, and setting a trigger source as TIMER3.
And 7: and setting TIMER1 main mode trigger output as a full update trigger, and setting the main-slave mode as enable.
And step 8: initializing a TIMER TIMER8, setting the counting period of the TIMER8 to be full (0 xFFFF), setting the slave mode to be an external clock mode, and setting a trigger source to be TIMER1; the master mode triggering output is triggering reset, and the master mode and the slave mode are set to be closed.
And step 9: initializing TIMER TIMER6, setting the frequency division of TIMER1 to 16800 (MCU master frequency is 168 MHz), the counting period is 100 (namely 10 ms), the master mode trigger output is trigger reset, and the master-slave mode is set to be closed.
Step 10: starting TIMER1, TIMER3 and TIMER8 counts;
step 11: starting TIMER TIMER6 for periodic interruption to serve as a processing periodic task;
step 12: in the task of TIMER6Reading TIMER1 count value N in interrupt function 1 And count value N of TIMER8 2 And calculating the number N of standard signal cycles 0 ＝N 2 ×60000+N 1
Step 13: according to N 0 f 0 = Nf, calculation f = N 0 f 0 /N。
The TIMERs TIMER1, TIMER3 and TIMER8 are started again.
Through the description of the above embodiment, the method of the present invention can realize high-precision frequency acquisition by means of other different MCUs, singlechips or other hardware with counter synchronization and cascade functions, and simultaneously, when the different MCUs with counter synchronization and cascade functions have 32-bit counters, the above embodiment can also be adopted, and the synchronous acquisition of the two counters can be realized without depending on cascade to obtain the frequency of the measured signal.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solutions of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive various equivalent modifications or substitutions within the technical scope of the present invention, and these modifications or substitutions should be covered within the scope of the present invention.
Claims (7)
1. An STM 32-based equal-precision frequency measurement method is characterized by comprising the following steps: the measuring method comprises the steps that a PWM module of an MCU is used for generating a controllable software gate, the time of the controllable gate is set to be the period duration of N measured signals, and standard signals and the measured signals are synchronously collected through a counter of the MCU within the gate time; further calculating to obtain the frequency value of the detected signal; the measuring method comprises the following steps:
step one, setting a controllable software gate:
acquiring the frequency of a measured signal by using a first counter, and acquiring the frequency of a standard signal by using a second counter;
1.1, initializing a first counter of a timer, setting a gate control channel of the first counter to be in a PWM2 mode through software, and setting a PWM output gate control initial comparison value i of the gate control channel of the first counter; setting a gating channel of a first counter to close I/O output, and outputting low level to be effective;
1.2, setting the counting period of a first counter to be N + i, wherein N is preset gate time; the slave mode is set to an external clock mode, and the trigger source is set to an external clock; the master mode trigger output is set as a gating channel to output an effective signal, the output mode is set as a single pulse mode, and the master-slave mode is set as a closing mode;
step two, setting synchronous acquisition:
2.1, initializing a second counter of a timer:
setting a counting period of a second counter, wherein a clock source is an internal clock, a slave mode is a gating mode, and a trigger source is the first counter;
initializing a fourth counter to be used as a processing period task, setting an interrupt period of the second counter, setting the trigger output of the master mode to be trigger reset, and setting the master-slave mode to be closed;
step three: calculating the frequency value of the measured signal:
starting all counters;
reading the value of the counter;
according to N 0 f 0 = Nf, calculation f = N 0 f 0 /N；
Wherein: f-measured signal frequency, N-measured signal number, f 0 -standard signal frequency, N 0 -number of standard signals.
2. The measurement method according to claim 1, characterized in that: in the first step, the third counter is used as the cascade of the first counter, the first counter is set to zero when the first counter is full of fixed values, and the third counter is added by 1.
3. The measurement method according to claim 2, characterized in that: the method also comprises the following initialization operations:
the master mode trigger output of the second counter is set as a full update trigger, and the master-slave mode is set as an enable;
initializing a third counter, setting the counting period of the third counter, wherein the slave mode is an external clock mode, and the trigger source is a second counter; the master mode trigger output is set to trigger reset, and the master-slave mode is set to close.
4. The measurement method according to claim 1, characterized in that: the PWM output gating initial comparison value i is a natural number which is more than or equal to 5.
5. The measurement method according to claim 1, characterized in that: and setting the trigger polarity as rising edge trigger in the step one.
6. The measurement method according to claim 2, characterized in that: calculating standard signal period number N in step three 0 The formula is as follows:
when cascade-connected, the third counter operates to read the count value N of the third counter 2 ，N 0 ＝N 2 ×NP+N 1 ；
When there are no cascaded counters, N 0 ＝N 1 ；
Wherein NP is the counting period of the second counter; n is a radical of 1 Is the second counter count value.
7. The measurement method according to claim 1, characterized in that: the first channel of the first counter is used for collecting a signal to be measured, and the second channel is used for gating.
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