CN115332162B - 基于光刻技术的带屏蔽层金属化聚合物通孔制备方法 - Google Patents
基于光刻技术的带屏蔽层金属化聚合物通孔制备方法 Download PDFInfo
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Abstract
本发明提出了一种基于掩模光刻方法制造带有屏蔽层的导电聚合物通孔的方法，方法包括（1）通过掩模光刻方法使用可以固化的光刻胶制造通孔基柱并使其金属化，（2）通过溅射等方法在基柱外形成屏蔽层，（3）在通孔的基础上直接灌封封装聚合物形成聚合物通孔。这一方法制造的聚合物通孔适用于封装天线芯片与天线的键合，具有键合路径短、寄生电容小、抗干扰能力强的优点。
Description
技术领域
涉及电子封装领域，具体而言是涉及封装天线封装电子封装。
背景技术
在电子封装领域，特别是封装天线的封装领域中，如何缩短键合路径以缩小封装的体积并减弱寄生电容现象、屏蔽干扰以提高天线接收表现是重要的课题。
过去，相关领域中的封装技术都使用引线键合或使用侧面通孔的方式实现天线与芯片的键合，其键合路径长度较长，寄生电容现象较为明显且封装体积较大。使用聚合物通孔通过芯片正面完成键合能够显著缩短聚合键合路径。而过去的聚合物通孔技术通常没有整合在通孔上的屏蔽措施，在通孔上增加屏蔽层能够减少封装设计上抗干扰设计的复杂程度。
发明内容
本申请提出一种用于制造聚合物通孔制备方法，这一方法能够制备用于缩短封装天线芯片与天线键合距离的聚合物通孔及围绕通孔的屏蔽层。
所申请的方法是一种工艺方法，所述方法包含如下步骤：
（1）在带有金属化触点的硅晶片上涂覆光刻胶；
（2）使用掩膜光刻工艺制造光刻胶基柱；
（3）固化光刻胶基柱；
（4）清洁固化光刻胶基柱表面；
（5）使用气相沉积或溅射镀膜工艺在固化的基柱表面沉积金属使其金属化；
（6）使用气相沉积或溅射镀膜工艺在金属化的基柱立面先后沉积介电材料层和金属层形成屏蔽层；
（7）灌封封装材料完成封装。
这一方法能够制备出具有导电能力且带有屏蔽层的聚合物通孔。
本发明中，步骤（1）中，所使用的光刻胶应选用能够固化的环氧树脂基品类或其他可以固化的品类，优选SU-8光刻胶。
步骤（2）中，通过掩膜光刻应在晶片上有金属化触点的位置形成光刻胶柱。
步骤（3）中，应依照选用的光刻胶的固化方式完成固化。
步骤（4）中，灌封材料不应当导电，灌封方法以薄膜辅助塑封工艺为佳。
步骤（5）中，应使用相应固化光刻胶能够耐受的沉积或溅射方式，必要时可以在气相沉积或溅射过程中添加冷却步骤以防止固化光刻胶变形。气相沉积或溅射使用的金属可以选择铝、铜、银、金等导电性良好的金属。
步骤（6）中，介电材料层应选用介电系数高的材料，优选二氧化硅，金属层可以选用铝、铜、银、金等导电性良好的金属。
步骤（6）可以在实际应用中可以依需求省略而不影响金属化通孔的主要性能。
一般而言，这一工艺方法适用于制造竖直的聚合物通孔，且用于毫米波封装天线芯片与外部天线的键合。由于高频信号有强烈的趋肤效应，这一通孔中的用于传导信号的薄金属层仍能够有效的传递信号。
本发明方法制得的金属化通孔中的各镀层厚度能够依需要在溅射或沉积工艺的许可范围内变动以适应不同的键合需求。
附图说明
图1为本发明的方法实施概略流程图。
图2为聚合物通孔完成后的纵截面示意图。
图3为聚合物通孔完成后芯片封装表面的局部俯视示意图。
具体实施方式
以下结合实施例对本发明做进一步说明，但本发明要求保护的范围并不局限于实施例表达的范围。
实施例：
这一实施例是在有金属化触点的硅晶片上形成金属化的聚合物通孔，并在其上实现灌封的例子。
采用原料如下：
带有金触点的硅晶片；
SU-8光刻胶；
金靶材；
二氧化硅靶材；
环氧树脂。
制备步骤：
（1）清洁硅晶片表面；
（2）在硅晶片表面涂覆光刻胶；
（3）使用掩膜光刻蚀方法得到由光刻胶形成的基柱；
（4）固化基柱并去除多余的光刻胶；
（5）使用掩膜磁控溅射技术在基柱上形成金镀层，作为导电金属层；
（6）使用掩膜磁控溅射技术在金属化的基柱侧面上形成二氧化硅镀层，作为介电层；
（7）使用掩膜磁控溅射技术在二氧化硅镀层上形成金镀层，作为金属屏蔽层；
（8）使用薄膜辅助塑封技术灌封芯片；
（9）清洁封装表面触点得到可供进一步使用的金属化的聚合物通孔。
Claims (6)
1.一种制造聚合物通孔的方法，其步骤包括用可固化的光刻胶及光刻技术在有金属化触点的硅晶片上形成基柱；固化基柱；使用气相沉积技术沉积金属镀层实现基柱的金属化，此金属镀层与基柱共同组成导电通孔；使用气相沉积技术依次形成介电层和金属层，构成复合屏蔽层；对芯片灌封形成封装。
2.根据权利要求1所述方法，制成的聚合物通孔主体为光刻胶固化形成的基柱与金属镀层组成的复合导电物质形成的导电通孔及在导电通孔外由介电层和金属层构成的复合屏蔽层。
3.根据权利要求1所述方法，制成的聚合物通孔直径为45微米，深度取决于封装情况和光刻工艺限制。
4.根据权利要求1所述方法，聚合物通孔中，导电通孔中的金属镀层及复合屏蔽层中的金属层厚度均为3微米。
5.根据权利要求1所述方法，复合屏蔽层整体厚度为7微米。
6.根据权利要求1所述方法，制成的聚合物通孔在封装上形成裸露的触点。
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| KR20020053949A (ko) * | 2000-12-26 | 2002-07-06 | 박종섭 | 반도체 소자의 금속배선 형성방법 |
| CN101168435A (zh) * | 2007-11-29 | 2008-04-30 | 上海交通大学 | 三维神经微电极的制作方法 |
| CN106449573A (zh) * | 2016-11-16 | 2017-02-22 | 宁波麦思电子科技有限公司 | 一种具有垂直通孔互连的金属材质的转接板及其制作方法 |
| CN111261606A (zh) * | 2019-02-18 | 2020-06-09 | 长江存储科技有限责任公司 | 贯穿硅触点结构及其形成方法 |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20020053949A (ko) * | 2000-12-26 | 2002-07-06 | 박종섭 | 반도체 소자의 금속배선 형성방법 |
| CN101168435A (zh) * | 2007-11-29 | 2008-04-30 | 上海交通大学 | 三维神经微电极的制作方法 |
| CN106449573A (zh) * | 2016-11-16 | 2017-02-22 | 宁波麦思电子科技有限公司 | 一种具有垂直通孔互连的金属材质的转接板及其制作方法 |
| CN111261606A (zh) * | 2019-02-18 | 2020-06-09 | 长江存储科技有限责任公司 | 贯穿硅触点结构及其形成方法 |
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