CN115331601A

CN115331601A - Display panel and display device

Info

Publication number: CN115331601A
Application number: CN202210981564.2A
Authority: CN
Inventors: 周志伟; 林文欣
Original assignee: Xiamen Tianma Display Technology Co Ltd
Current assignee: Xiamen Tianma Display Technology Co Ltd
Priority date: 2022-08-15
Filing date: 2022-08-15
Publication date: 2022-11-11

Abstract

The invention discloses a display panel and a display device, belonging to the technical field of display, wherein the display panel comprises a display area and a non-display area which is at least partially arranged around the display area; the non-display area comprises a scanning driving circuit, and the scanning driving circuit at least comprises a plurality of cascaded shift register units; the display area comprises a plurality of scanning lines, and the output end of the shift register unit of each stage is connected with at least one scanning line; the shift register unit of the first stage is electrically connected with an initial potential signal line, and at least part of the initial potential signal line is positioned in the display area. The display device comprises the display panel. In the invention, the routing sections at partial positions are arranged in the display area in the initial potential signal line connected with the first-stage shift register unit, so that the number of routing in the non-display area of the display panel can be reduced, the size of a frame of the display panel can be reduced, the wiring difficulty in the non-display area can be reduced, and the processing efficiency can be improved.

Description

Display panel and display device

Technical Field

The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.

Background

The development direction of display technology aims to improve the use experience of users, including the improvement of display characteristics such as display color gamut, high resolution (Pixel Per inc, PPI), high contrast and the like. With the popularization of products such as mobile phones, televisions, tablet computers and the like, higher requirements are gradually put forward on the frame design of the display panel. Narrow-bezel display screens are gradually receiving attention from people due to the advantages of being concise, large in visible area and the like. The advantage of narrow frame demonstration is embodied in the proportion of display area and non-display area, and the display panel that the narrow frame showed seems that display area is bigger to user's use impression can be promoted.

The display panel of the present invention generally includes a plurality of sub-pixels located in a display area, and a driving circuit located in a non-display area for driving the sub-pixels to light up. However, the driving circuit needs to generate a plurality of signals for driving, and accordingly, a plurality of signal lines need to be configured in the frame region to provide signals for driving, so that a large space is required for disposing the signal lines and the driving circuit, which results in a large area of the frame region of the panel. With the development of display technology, more and more functions are integrated in the panel, and more signal lines are arranged in the corresponding display panel, so that the improvement of the screen occupation ratio of the display panel is limited.

Therefore, it is an urgent need to provide a display panel and a display device that can ensure display quality, reduce the area of the frame region, and further realize a narrower frame.

Disclosure of Invention

In view of the above, the present invention provides a display panel and a display device to solve the problem that the frame of the display panel cannot be further reduced in the prior art.

The invention discloses a display panel, comprising: a display area and a non-display area disposed at least partially around the display area; the non-display area comprises a scanning driving circuit, and the scanning driving circuit at least comprises a plurality of cascaded shift register units; the display area comprises a plurality of scanning lines, and the output end of the shift register unit of each stage is connected with at least one scanning line; the shift register unit of the first stage is electrically connected with an initial potential signal line, and at least part of the initial potential signal line is positioned in the display area.

Based on the same inventive concept, the invention also discloses a display device, which comprises the display panel.

Compared with the prior art, the display panel and the display device provided by the invention at least realize the following beneficial effects:

the display panel provided by the invention comprises a display area and a non-display area, the display panel comprises a scanning driving circuit, the scanning driving circuit is arranged in the range of the non-display area, the scanning driving circuit at least comprises a plurality of cascaded shift register units, the output end of each stage of shift register unit is connected with at least one scanning line in the display area, and the shift register unit is used for transmitting a generated scanning signal to each sub-pixel through the scanning line of the display area so as to realize display scanning. The display panel may include at least one start potential signal line electrically connected to the shift register unit of the first stage of the scan driving circuit for providing a start shift signal to the shift register unit of the first stage. The invention sets at least part of the initial potential signal lines in the display area, and it can be understood that at least part of the initial potential signal lines can be understood as a partial section of the initial potential signal lines, namely, the initial potential signal lines are arranged in the initial potential signal lines connected with the first-stage shift register unit, and routing sections of partial positions are arranged in the display area, namely, the initial potential signal lines can be led out from the first-stage shift register unit of the non-display area, and then led into the display area at a certain position on the periphery of the display area, and are routed from the display area, so that the number of routing in the non-display area of the display panel can be reduced, the size of the frame of the display panel can be reduced, the routing difficulty in the non-display area can be reduced, and the process efficiency can be improved.

Of course, it is not necessary for any product in which the present invention is practiced to specifically achieve all of the above-described technical effects simultaneously.

Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.

Fig. 1 is a schematic plan view of a display panel according to an embodiment of the present invention;

fig. 2 is a schematic plan view of another display panel according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of another planar structure of a display panel according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of another planar structure of a display panel according to an embodiment of the present invention;

FIG. 5 isbase:Sub>A schematic sectional view taken along line A-A' of FIG. 4;

FIG. 6 is a schematic diagram of another planar structure of a display panel according to an embodiment of the present invention;

FIG. 7 is a schematic diagram of another planar structure of a display panel according to an embodiment of the present invention;

FIG. 8 is a schematic diagram of another planar structure of a display panel according to an embodiment of the present invention;

FIG. 9 is a schematic diagram of another planar structure of a display panel according to an embodiment of the present invention;

fig. 10 is a schematic plan view of another display panel according to an embodiment of the present invention;

fig. 11 is a schematic plan view illustrating a display device according to an embodiment of the present invention.

Detailed Description

Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless it is specifically stated otherwise.

The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

Techniques, methods, and apparatus known to one of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.

In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be discussed further in subsequent figures.

Referring to fig. 1, fig. 1 is a schematic plan view of a display panel according to an embodiment of the present invention, where the display panel 000 includes: a display area AA and a non-display area NA disposed at least partially around the display area AA;

the non-display area NA includes a scan driving circuit 10, and the scan driving circuit 10 at least includes a plurality of cascaded shift register units 101;

the display area AA includes a plurality of scanning lines G, and the output end of the shift register unit 101 at each stage is connected to at least one scanning line G;

the shift register unit 1011 of the first stage is electrically connected to an initial potential signal line 20, and at least a part of the initial potential signal line 20 is located in the display area AA.

Specifically, the display panel 000 provided in this embodiment includes a display area AA and a non-display area NA, where the non-display area NA may be at least partially disposed around the display area AA, and optionally, the display area AA may be configured to dispose a plurality of sub-pixels, and the sub-pixels are illuminated by driving signals provided by a driving circuit and a plurality of signal lines included in the display panel 000 to achieve a display effect of the display panel 000. The display panel 000 includes a scan driving circuit 10, the scan driving circuit 10 is disposed in the non-display area NA, the scan driving circuit 10 at least includes a plurality of cascaded shift register units 101, an output end of each stage of the shift register unit 101 is connected to at least one scan line G in the display area AA, and the shift register unit 101 is configured to transmit a generated scan signal to each sub-pixel through the scan line G of the display area AA, so as to implement display scanning. It can be understood that the plurality of shift register units 101 in the present embodiment are cascaded to indicate that the plurality of shift register units are connected one by one, and the scan driving circuit 10 including the plurality of cascaded shift register units 101 in the present embodiment is configured to implement a shift register function, for consecutive three shift register units 101, for example, for the cascaded shift register unit 1011 of the first stage, the cascaded shift register unit 1012 of the second stage, and the cascaded shift register unit 1013 of the third stage, one output terminal of the shift register unit 1011 of the first stage may be connected to one input terminal of the shift register unit 1012 of the second stage for inputting the shift register unit 1012 of the second stage, and one output terminal of the shift register unit 1012 of the second stage may be connected to one input terminal of the shift register unit 1013 of the third stage for inputting the shift register unit 1013 of the third stage \8230, and 8230, so that the function of sequentially outputting the driving signals by sequentially transmitting the stages is implemented. Therefore, the shift register unit 1011 of the first stage in this embodiment needs to add an additional start shift signal STV for the initial input of each frame of the display. The display panel 000 of the present embodiment may include at least one start potential signal line 20, and the start potential signal line 20 is electrically connected to the shift register unit 1011 of the first stage of the scan driving circuit 10 for providing a start shift signal STV to the shift register unit 1011 of the first stage. Alternatively, the driving signal in the display panel 000 may be provided by a driving chip or a flexible circuit board (not shown) bound to the display panel 000 in the subsequent process, for example, the driving chip or the flexible circuit board bound to the display panel 000 in the subsequent process is electrically connected to the start potential signal line 20 fabricated in the display panel 000, and the start shift signal STV provided by the driving chip or the flexible circuit board is transmitted to the shift register unit 1011 at the first stage through the start potential signal line 20.

In a display panel in the prior art, each signal line for providing various signals to the scan driving circuit is generally disposed in a non-display area of a frame where the scan driving circuit is located, and is connected to a driving chip or a flexible circuit board bound on the display panel 000 in a subsequent process through a winding in the frame area, so as to implement transmission of driving signals. However, with the development of display technologies, the integrated functions in the panel are more and more, the number of signal lines in the corresponding display panel is more and more, and the space of the frame area is limited, so as to ensure the display quality and avoid short circuit crosstalk between the signal lines, the increase of the number of the signal lines completely limits the improvement of the screen occupation ratio of the display panel, and is not beneficial to the narrowing of the frame of the display panel.

In order to solve the above problem, at least a part of the start potential signal lines 20 are disposed in the display area AA in the present embodiment, and it is understood that at least a part of the start potential signal lines 20 in the present embodiment may be understood as a part of one start potential signal line 20, that is, at least a part of one start potential signal line 20 is disposed in the display area AA as shown in fig. 1. In the present embodiment, an initial potential signal line 20 connected to the first-level shift register unit 1011 is provided, a routing segment at a partial position is provided in the display area AA, that is, the initial potential signal line 20 can be led out from the first-level shift register unit 1011 of the non-display area NA, then the routing segment is led into the display area AA at a certain position on the periphery of the display area AA, and the routing segment is routed from the display area AA, so that the number of routing segments in the non-display area NA of the display panel 000 can be reduced, which is beneficial to reducing the size of the frame of the display panel 000, and can also reduce the wiring difficulty in the non-display area NA, and is beneficial to improving the process efficiency.

It can be understood that fig. 1 of this embodiment is a schematic structural diagram illustrating that at least a portion of the start potential signal lines 20 are located in the display area AA, and in particular, the routing manner of the start potential signal lines 20 includes, but is not limited to, other routing manners, and only needs to satisfy that at least a portion of one start potential signal line 20 is located in the display area AA.

It should be noted that, in the drawings of the present embodiment, the structure of the display panel 000 is only exemplarily shown, and in specific implementation, the structure of the display panel 000 includes, but is not limited to, and may also include other structures capable of implementing a display function, such as sub-pixels in a display area, a light-emitting control circuit in a non-display area, and the like.

It can be understood that, the shift register unit 101 in this embodiment may be further connected with other signal lines for providing various driving signals for the scan driving circuit 10, such as a clock signal line, an output enable signal line, a positive and negative scan control signal line, a power voltage input signal line, and the like, which are all required to be electrically connected with the shift register units 101 of each stage in the scan driving circuit 10 and provide corresponding signals for the shift register units 101 of each stage.

It should be understood that, in the drawings of the present embodiment, only the shift register unit 101 is illustrated by a block diagram, and in a specific implementation, the shift register unit 101 may be a circuit structure including a transistor, a capacitor, and the like that are electrically connected, which is not specifically limited in the present embodiment.

Optionally, please refer to fig. 1 and fig. 2 in combination, fig. 2 is another schematic plane structure diagram of a display panel according to an embodiment of the present invention, in which a plurality of cascaded shift register units 101 are arranged along a first direction Y;

the non-display area NA includes a first non-display area NA1 and a second non-display area NA2 located at opposite sides of the display area AA along the first direction Y;

the second non-display area NA2 includes a bonding area BA including a plurality of conductive pads 30;

the start potential signal line 20 includes a first subsection 20A, a second subsection 20B, and a third subsection 20C connected to each other;

one end of the first subsection 20A is connected to the shift register unit 1011 at the first stage, the other end of the first subsection 20A is connected to the second subsection 20B, and the first subsection 20A is located in the first non-display area NA1;

the second subsection 20B is located in the display area AA;

one end of the third sub section 20C is connected to the second sub section 20B, the other end of the third sub section 20C is connected to the conductive pad 30, and the third sub section 20C is located in the second non-display area NA2.

In the embodiment, it is explained that, in one start potential signal line 20 connected to the shift register unit 1011 of the first stage, when a routing segment at a partial position is disposed in the display area AA, the start potential signal line 20 may be led out from the position of the shift register unit 1011 of the first stage of the non-display area NA, and may be routed from the non-display area NA on one side of the top of the display panel 000 into the display area AA, specifically, along the first direction Y, that is, in the longitudinal direction illustrated in the drawing, the non-display area NA includes a first non-display area NA1 and a second non-display area NA2 located on two opposite sides of the display area AA, the first non-display area NA1 may be understood as a partial non-display area on the top of the display panel 000, the second non-display area NA2 may be understood as a partial non-display area on the bottom of the display panel 000, a driver chip or a flexible circuit board subsequently bound to the binding area BA of the second non-display area NA2, the binding area BA includes a plurality of conductive pads 30, pins of the driver chip or the flexible circuit board are electrically connected to the conductive pads 30 of the binding area, so as to achieve the effect of binding the driver chip or the flexible circuit board 000 to the binding area.

Since the start potential signal line 20 only needs to be electrically connected to the shift register unit 1011 of the first stage in the scan driving circuit 10 and supplied with the start shift signal STV, one start potential signal line 20 may be provided as the first subsection 20A, the second subsection 20B, and the third subsection 20C which are connected to each other. It can be understood that the first sub-section 20A, the second sub-section 20B, and the third sub-section 20C of the present embodiment are only to distinguish portions of one start potential signal line 20 located at different positions in the display panel 000 by different names, and are distinguished by different filling patterns in fig. 2, and it is not shown that the first sub-section 20A, the second sub-section 20B, and the third sub-section 20C of one start potential signal line 20 are made of different materials or located on different films or are different wires.

In this embodiment, one end of the first sub-segment 20A in the start potential signal line 20 is connected to the first-stage shift register unit 1011, that is, one end of the first sub-segment 20A is taken as a leading end of the start potential signal line 20, and is led out from the position of the first-stage shift register unit 1011 in the non-display area NA, and is arranged in the range of the first non-display area NA1, and then the second sub-segment 20B connected to the other end of the first sub-segment 20A is located in the display area AA, that is, the second sub-segment 20B of the start potential signal line 20 is rewound from the display area AA to the second non-display area NA2 at the bottom of the display panel 000, so that the third sub-segment 20C connected to the second sub-segment 20B is located in the second non-display area NA2, and is electrically connected to the conductive pad 30 in the bonding area BA of the second non-display area NA2, thereby forming a path between the conductive pad and the first-stage shift register unit 1011, and providing the shift register STV for the first-stage shift register unit 1011 of the scan driving circuit 10 by passing through the start potential signal line 20 passing through the display area AA. Since there are fewer conductive structures disposed in the first non-display area NA1 at the top of the display panel 000, the first sub-section 20A of the start potential signal line 20 is wound from the first non-display area NA1 to the display area AA, so that the first sub-section 20A has a sufficient layout space in the first non-display area NA1, and the original layout of the display panel 000 is not affected. And because the arrangement of the first subsegment 20A, the second subsegment 20B can penetrate through the display area AA at the middle position of the display panel 000 as much as possible, and finally the length of the third subsegment 20C connected between the second subsegment 20B and the conductive pad 30 in the second non-display area NA2 is as short as possible, that is, the third subsegment 20C does not need to occupy too much space in the second non-display area NA2, which is beneficial to reducing the layout difficulty of fan-out wiring in the second non-display area NA2, improving the process effect, and also reducing the width of the lower frame where the second non-display area NA2 of the display panel 000 is located.

It is to be understood that the fan-out traces in this embodiment may be understood as traces that electrically connect other traces, such as data lines or touch lines, in the display area AA of the display panel 000 with the conductive pads 30 of the bonding area BA.

In some alternative embodiments, please continue to refer to fig. 1 and fig. 2 in combination, in the present embodiment, the second sub-segment 20B extends along the first direction Y.

This embodiment explains that one end of the first sub-section 20A in the start potential signal line 20 is connected to the shift register unit 1011 of the first stage, one end of the first sub-section 20A is taken as a leading end of the start potential signal line 20, led out from the position of the shift register unit 1011 of the first stage in the non-display area NA, and laid out within the range of the first non-display area NA1, and then the second sub-section 20B connected to the other end of the first sub-section 20A is positioned in the display area AA, and the start shift signal STV is provided to the shift register unit 1011 of the first stage of the scan driving circuit 10 through the start potential signal line 20 which at least partially passes through the display area AA. The second subsection 20B located within the display area AA may extend in a first direction Y, i.e. in a longitudinal direction in the figure. Alternatively, the second sub-section 20B in the embodiment extends along the first direction Y, it can be understood that the overall extending direction of the second sub-section 20B is the first direction Y to be finally connected to the conductive pads 30 in the second non-display area NA2, but the second sub-section 20B may have a small-scale broken line structure in the display area, as shown in fig. 3, fig. 3 is another schematic plane structure diagram of the display panel provided in the embodiment of the present invention, for example, when it is necessary to avoid some structures (such as light emitting structures in the display area AA, etc.) in the display area AA, the second sub-section 20B may have a certain winding design to avoid affecting the display effect of the display area AA itself. In this embodiment, the overall extending direction of the second subsection 20B of the start potential signal line 20 located in the display area AA is set as the first direction Y, so that at least part of the start potential signal line 20 is located in the display area AA, the frame width is reduced, and meanwhile, the electrical connection path between the shift register unit 1011 of the first stage and the bonding pad 20 is designed to be as short as possible by adopting a structure in which the second subsection 20B is longitudinally extended as a whole, so as to reduce the length of the start potential signal line 20, which is beneficial to reducing the impedance of the start potential signal line 20, and improve the transmission effect of the start shift signal STV.

In some optional embodiments, please refer to fig. 4 and 5 in combination, fig. 4 is another schematic plan view ofbase:Sub>A display panel according to an embodiment of the present invention, fig. 5 isbase:Sub>A schematic sectional view along the directionbase:Sub>A-base:Sub>A' in fig. 4, in this embodiment, the display area AA includesbase:Sub>A plurality of first data lines S1 extending along the first direction Y;

the conductive pad 30 includes a first conductive pad 301, the first data line S1 is electrically connected to the first conductive pad 301 through at least one first connection line 401, and the first connection line 401 is located in the display area AA;

the second subsection 20B is arranged in a layer with the first connection line 401.

The present embodiment explains that the display panel 000 may include a plurality of data lines S extending along the first direction Y, wherein the data lines S may include a plurality of first data lines S1, the plurality of conductive pads 30 in the bonding area BA may include a first conductive pad 301, and the first conductive pad 301 may be connected to the first data line S1 through at least one first connection line 401 to provide the first data line S1 with a data voltage signal for driving the display panel 000 to display through the first conductive pad 301. As shown in fig. 4, the first data line S1 of the present embodiment may be understood as a data line in the frame region of the display panel 000 that is closer to the display panel 000. The first data line S1 in the display area AA and the first conductive pad 301 in the bonding area BA are electrically connected through a first connection line 401 located in the display area AA, that is, one end of the first connection line 401 may be connected to the first data line S1 in the display area AA, the other end of the first connection line 401 may be electrically connected to the first conductive pad 301 in the second non-display area NA, and optionally, the other end of the first connection line 401 may be connected to a fan-out lead 50, and connected to the first conductive pad 301 of the bonding area BA through the fan-out lead 50 located in the second non-display area NA. The first connecting line 401 is disposed in the range of the display area AA, so that the first connecting line 401 can be prevented from occupying a space of the second non-display area NA2, as shown in fig. 4, the first connecting line 401 can gradually extend in a direction close to a middle area of the display area AA in the range of the display area AA, and then is connected to the fan-out lead 50 of the second non-display area NA2, so that the fan-out lead 50 can be away from a frame area of the display panel 000 as far as possible in the second direction X (where the second direction X can be understood as a direction intersecting with the first direction Y or being perpendicular to each other in a direction parallel to a plane where the display panel 000 is located), which is beneficial to reducing a frame width occupied by the fan-out lead 50 in the second direction X, so that a width of a lower frame of the display panel 000 in the second direction X can be further reduced, and a lower frame can be advantageously reduced. In addition, in this embodiment, at least a part of the start potential signal line 20 passes through the display area AA, and the widths of the left and right frames at opposite sides of the display area AA in the second direction X can be reduced.

The first connecting line 401 of this embodiment may be partially located in a film layer where other metal conductive structures in the display panel 000 are located, that is, the first connecting line 401 is manufactured by multiplexing the existing metal conductive film layer of the display panel 000 itself. Or, in some other optional embodiments, the display panel 000 may further include a metal conductive film layer to form the first connection line 401, so as to avoid affecting the existing conductive structure of the display panel 000 itself, and reduce the wiring difficulty of the display panel.

As shown in fig. 4 and 5, the display panel 000 may include a substrate 01, a driving array layer 02 on one side of the substrate 01, and a light emitting function layer 03 on one side of the substrate 01 away from the driving array layer 02, and the light emitting function layer 03 may include a plurality of light emitting portions 031, which correspond to the sub-pixels. The driving array layer 02 of this embodiment is used to manufacture a pixel circuit having a structure that the driving light emitting part 031 emits light and includes a plurality of driving transistors T, and the driving array layer 02 at least includes a first metal layer 021, a second metal layer 022, and a third metal layer 023, where the first metal layer 021 may be used to manufacture a gate of the driving transistor T and a scan line G of the display panel 000, the second metal layer 022 may be used to manufacture a reference voltage signal line, a power signal line, and the like of the display panel 000 (not shown in the drawings, the reference voltage signal line and the power signal line may be respectively used to provide a reference voltage signal and a power signal for the pixel circuit), and the third metal layer 023 may be used to manufacture a source and a drain of the driving transistor T and a data line S of the display panel 000.

The display panel 000 of this embodiment may further include a fourth metal layer 024, where the fourth metal layer 024 may be another metal conductive layer additionally disposed in the driving array layer 02 of the display panel 000, and the first connection line 401 may be disposed in the additional fourth metal layer 024, so as to avoid affecting an existing conductive structure of the display panel 000 itself, and further reduce the wiring difficulty of the display panel 000. Since the display panel has fewer conductive structures in the fourth metal layer 024 used for manufacturing the first connection line 401, and the space is sufficient, the second sub-section 20B of the start potential signal line 20 in the display area AA of the present embodiment may be disposed in the same layer as the first connection line 401, that is, the second sub-section 20B is manufactured by using the original fourth metal layer 024 of the display panel 000 itself, so that the second sub-section 20B may have a sufficient space for layout, which is beneficial to reducing the manufacturing steps, reducing the process difficulty, and improving the manufacturing efficiency.

It should be understood that, in the drawings of the present embodiment, only the fourth metal layer 024 is located on the side of the third metal layer 023 away from the substrate 01, and in practice, the location where the fourth metal layer 024 is added includes but is not limited to, and the metal film layer can be added at any location in the driving array layer 02, such as between the substrate 01 and the first metal layer 021, which is not limited in the present embodiment.

In some optional embodiments, please refer to fig. 6, fig. 6 is a schematic plan view illustrating another structure of a display panel according to an embodiment of the present invention, in which the scan driving circuit 10 includes a first scan driving circuit 10A and a second scan driving circuit 10B, and the first scan driving circuit 10A and the second scan driving circuit 10B are respectively located at two opposite sides of the display area AA along the second direction X; wherein the first direction Y and the second direction X intersect in a direction parallel to a plane in which the display panel 000 is located; alternatively, in the present embodiment, the first direction Y and the second direction X are illustrated as being perpendicular to each other in a direction parallel to the plane of the display panel 000;

in the first scan driver circuit 10A, the start potential signal line 20 electrically connected to the shift register unit 1011 at the first stage is the first start potential signal line 201;

in the second scan driver circuit 10B, the start potential signal line 20 electrically connected to the shift register unit 1011 of the first stage is the second start potential signal line 202;

along the second direction X, the display area AA includes a first display area AA1, a second display area AA2 and a third display area AA3 respectively located at two opposite sides of the first display area AA 1;

the second display area AA2 is located on one side of the first display area AA1 close to the first scan driving circuit 10A, and the third display area AA3 is located on one side of the first display area AA1 close to the second scan driving circuit 10B;

the second subsegment 20B of the first start potential signal line 201 and the second subsegment 20B of the second start potential signal line 202 are both located in the first display area AA1.

This embodiment explains that the scan driving circuit 10 in the display panel 000 can be in a dual-edge driving mode, and specifically, the scan driving circuit 10 includes a first scan driving circuit 10A and a second scan driving circuit 10B, the first scan driving circuit 10A and the second scan driving circuit 10B are respectively located at two opposite sides of the display area AA in the second direction X (i.e. in the horizontal direction in the drawing), and the first scan driving circuit 10A and the second scan driving circuit 10B can be simultaneously connected to at least one scan line G to provide a scan driving signal for the same scan line G, which is beneficial to reducing the load of scan driving. In the first scan driving circuit 10A of the present embodiment, the start potential signal line 20 electrically connected to the shift register unit 1011 of the first stage is a first start potential signal line 201, and in the second scan driving circuit 10B, the start potential signal line 20 electrically connected to the shift register unit 1011 of the first stage is a second start potential signal line 202, that is, since the scan driving circuit 10 includes the first scan driving circuit 10A and the second scan driving circuit 10B, the first scan driving circuit 10A is correspondingly connected to a first start potential signal line 201, and the second scan driving circuit 10B is correspondingly connected to a second start potential signal line 202. When the first start potential signal line 201 and the second start potential signal line 202 are partially disposed in the display area AA, the present embodiment is disposed along the second direction X, the display area AA includes a first display area AA1, a second display area AA2 and a third display area AA3 respectively disposed at two opposite sides of the first display area AA1, and the second sub-section 20B of the first start potential signal line 201 located at the display area AA portion and the second sub-section 20B of the second start potential signal line 202 located at the display area AA portion are both located at the first display area AA1 at the middle portion, so that the overall lengths of the first start potential signal line 201 and the second start potential signal line 202 tend to be consistent as much as possible, that is, the lengths of the wire located at the first non-display area NA1 and the wire located at the display area AA portion are both kept consistent as much as possible, which is beneficial to reduce the impedance difference between the first start potential signal line 201 and the second start potential signal line 202, and improve the uniformity of the transmission signals provided for the first scan driving circuit 10A and the second scan driving circuit 10B respectively.

In some optional embodiments, please refer to fig. 7, fig. 7 is a schematic plane structure diagram of a display panel according to an embodiment of the present invention, in which the display panel 000 includes a plurality of clock signal lines 60, and the clock signal lines 60 are electrically connected to the scan driving circuit 10; at least a part of the clock signal line 60 is located in the display area AA.

The embodiment explains that the scan driving circuit 10 is further connected to a clock signal line 60, and optionally, the shift register unit 101 of each stage of the scan driving circuit 10 is connected to the clock signal line 60 to provide a clock control signal for the shift register unit 101 of each stage through the clock signal line 60, and the shift register unit 101 of each stage can sequentially transmit the signals thereof under the action of the clock control signal provided by the clock signal line 60. Optionally, the plurality of conductive pads 30 in the bonding area BA may include a conductive pad connected to the clock signal line 60, and the clock signal line 60 is transmitted with a clock control signal through a driver chip or a flexible circuit board subsequently bonded within the range of the bonding area BA. The present embodiment sets at least a part of the clock signal line 60 to be located in the display area AA. It is understood that at least a part of the clock signal lines 60 of the present embodiment can be understood as a part of one clock signal line 60, i.e. at least a part of one clock signal line 60 is located in the display area AA as shown in fig. 7. In the present embodiment, a clock signal line 60 connected to each stage of the shift register unit 101 is provided, the routing segments at some positions are provided in the display area AA, that is, the clock signal line 60 can be led out from the position of each stage of the shift register unit 101 of the non-display area NA, and then led into the display area AA at a certain position in the non-display area NA surrounding the display area AA, and then routed in the display area AA, so that the number of routing in the non-display area NA of the display panel 000 can be reduced, which is beneficial to reducing the size of the frame of the display panel 000, and can also reduce the difficulty of routing in the non-display area NA, thereby being beneficial to improving the process efficiency.

It can be understood that fig. 7 of this embodiment is a schematic structural diagram illustrating that at least part of the clock signal lines 60 are located in the display area AA, and in a specific implementation, the routing manner of the clock signal lines 60 includes, but is not limited to, other routing manners, and it is only necessary to satisfy that at least part of the segments of one clock signal line 60 are located in the display area AA.

It is understood that the number of the clock signal lines 60 included in the display panel 000 is not limited in the embodiment, and in the implementation, the clock signal lines 60 connected thereto may be set according to the actual design circuit of the scan driving circuit 10, and the embodiment is not limited herein.

In some alternative embodiments, please refer to fig. 7 and fig. 8 in combination, fig. 8 is a schematic plane structure diagram of a display panel according to an embodiment of the present invention, in which a plurality of cascaded shift register units 101 are arranged along a first direction Y;

the same clock signal line 60 includes a first sub-clock signal line 60A and a second sub-clock signal line 60B; it is understood that fig. 8 of the present embodiment only distinguishes the first sub-clock signal line 60A and the second sub-clock signal line 60B of the same clock signal line 60 by different filling patterns, and does not indicate the film structure and the manufacturing material of the first sub-clock signal line 60A and the second sub-clock signal line 60B;

the first sub-clock signal line 60A is located in the non-display area NA, and the first sub-clock signal line 60A extends in the first direction Y;

at least a part of the second sub-clock signal line 60B is located in the display area AA;

one end of the second sub-clock signal line 60B is connected to the first sub-clock signal line 60A, and the other end of the second sub-clock signal line 60B is connected to the conductive pad 30 of the bonding area BA.

It should be noted that, in the embodiment, it is specifically illustrated that at least a part of the clock signal lines 60 are disposed in the display area AA, because the shift register unit 101 of each stage in the scan driving circuit 10 needs the clock signal line 60 to provide a clock control signal to ensure that the clock control signal provides a driving signal for the shift register unit 101 of each stage, the same clock signal line 60 of the embodiment includes a first sub-clock signal line 60A and a second sub-clock signal line 60B connected to each other, wherein the first sub-clock signal line 60A is still disposed in the non-display area NA range, for example, the first sub-clock signal line 60A and the scan driving circuit 10 are both disposed in the non-display area NA range on the same side outside the display area AA of the display panel 000, and the first sub-clock signal line 60A may be disposed to extend along the first direction Y to ensure that the electrical connection path between the first sub-clock signal line 60A and the plurality of cascaded shift register units 101 arranged along the first direction Y is as short as possible, thereby improving the electrical connection effect between the first sub-clock signal line 60A and the shift register unit 101 of each stage. In the second sub-clock signal lines 60B of the same clock signal line 60, at least a portion of the second sub-clock signal lines 60B are located in the display area AA, that is, after one end of the second sub-clock signal line 60B is connected to the first sub-clock signal line 60A, the second sub-clock signal lines 60B are routed from the display area AA, so that the second sub-clock signal lines 60B pass through the display area AA and are then connected to the conductive pads 30 of the bonding area BA corresponding thereto, thereby implementing a path for transmitting clock control signals between the conductive pads 30 and the shift register units 101 of each stage. Since at least part of the second sub-clock signal lines 60B are located in the display area AA, the second sub-clock signal lines 60B may be connected to the conductive pads 30 in the area near the middle of the second non-display area NA2 of the display panel 000, and compared with the electrical connection structure of the clock signal lines and the conductive pads in the prior art, the two ends of the display panel are connected to the conductive pads in the second direction through the end of the first sub-clock signal line, this embodiment may be beneficial to avoiding that in the second direction X, the second sub-clock signal lines 60B occupy too much space at the two ends of the display panel 000, and is beneficial to reducing the frame width occupied by the second sub-clock signal lines 60B in the second direction X, and further may further reduce the width of the lower frame of the display panel 000 in the second direction X, and is beneficial to reducing the lower frame.

Alternatively, as shown in fig. 7, one end of the second sub-clock signal line 60B in the present embodiment is connected to the first sub-clock signal line 60A in the non-display area NA. In the same clock signal line 60, the connection point of the first sub-clock signal line 60A and the second sub-clock signal line 60B is located within the non-display area NA, that is, one end of the second sub-clock signal line 60B is connected to the first sub-clock signal line 60A in the non-display area NA, so that the display effect of the display area AA can be prevented from being affected when the connection point of the first sub-clock signal line 60A and the second sub-clock signal line 60B is disposed in the display area AA.

In some alternative embodiments, please refer to fig. 4, fig. 5, fig. 8 and fig. 9 in combination, fig. 9 is a schematic plan view of another display panel according to an embodiment of the present invention, in which the second sub-clock signal line 60B includes a first conductive line 60B1 extending along the second direction X and a second conductive line 60B2 extending along the first direction Y, one end of the first conductive line 60B1 is connected to the first sub-clock signal line 60A in the non-display area NA, the other end of the first conductive line 60B1 is connected to one end of the second conductive line 60B2, and the other end of the second conductive line 60B2 is connected to the conductive pad 30; wherein the first direction Y and the second direction X intersect in a direction parallel to a plane in which the display panel 000 is located; optionally, this embodiment is merely exemplified by the case where the first direction Y and the second direction X are perpendicular to each other in a direction parallel to the plane of the display panel 000;

the first conductive line 60B1 is disposed in different layers from the first sub-clock signal line 60A.

The present embodiment explains that, in the same clock signal line 60, the first sub-clock signal line 60A and at least a part of the second sub-clock signal line 60B may be disposed in different layers, and optionally, the second sub-clock signal line 60B may include a first conductive line 60B1 extending along the second direction X and a second conductive line 60B2 extending along the first direction Y, one end of the first conductive line 60B1 is connected to the first sub-clock signal line 60A in the non-display area NA, the other end of the first conductive line 60B1 is connected to one end of the second conductive line 60B2, the other end of the second conductive line 60B2 is used to be connected to the conductive pad 30 of the bonding area BA, the first sub-clock signal line 60A may be fabricated by using a metal film layer included in the display panel 000 itself, and at least a part of the second sub-clock signal line 60B disposed in the display area AA, for example, the first conductive line 60B1 may be fabricated by multiplexing an additional fourth metal layer 024 layer where the first connection line 401 is disposed (without attaching a film layer diagram, specifically referring to the schematic film layer diagram of fig. 5), so that the display panel structure may be disposed in the same layer of the display area AA, and the display panel structure of the display panel, thereby reducing the difficulty of the display panel, and the display panel structure of the display panel, which the display panel structure of the display panel 60B may be disposed in the display area AA. Since the display panel has fewer conductive structures in the fourth metal layer 024 used for manufacturing the first connection line 401, and the space is sufficient, the portion of the second sub-clock signal line 60B located in the display area AA of the embodiment may be disposed on the same layer as the first connection line 401, that is, the display panel 000 itself has the original fourth metal layer 024 used for manufacturing at least a partial second sub-clock signal line 60B, so that the second sub-clock signal line 60B may have a sufficient space for layout, and the metal film layer included in the display panel 000 itself is not occupied, which is beneficial to reducing the manufacturing steps, reducing the process difficulty, and improving the manufacturing efficiency.

In some optional embodiments, please refer to fig. 10, fig. 10 is a schematic plan view illustrating another planar structure of the display panel according to the embodiment of the present invention, in this embodiment, along the first direction Y, the display area AA includes a fourth display area AA4, and a fifth display area AA5 and a sixth display area AA6 respectively located at two opposite sides of the fourth display area AA 4;

at least a portion of the first conductive line 60B1 is located in the fourth display area AA4.

This embodiment explains that when at least a part of the second sub-clock signal lines 60B in the same clock signal line 60 are located in the display area AA, the second sub-clock signal lines can be usedAt least a portion of the first conductive lines 60B1 included in the sub-clock signal lines 60B are disposed in the fourth display area AA4, where the fourth display area AA4 may be understood as a middle area of the display area AA in the first direction Y, and optionally, at least a portion of the first conductive lines 60B1 extending along the second direction X may be located in the middle area of the display area AA in the first direction Y, so that the RC load difference at different positions of the shift register unit 101 may be reduced. It can be understood that the shift register unit 1011 at the first stage in this embodiment may be understood as a shift register unit at a far end (far from the bonding area BA), and the shift register unit 1011 at the last stage in this embodiment may be understood as a shift register unit at a near end (near to the bonding area BA), at this time, if the clock signal line still adopts the routing connection manner in the prior art, that is, the end of the first sub-clock signal line passing through the clock signal line is electrically connected to the conductive pad in the second non-display area range, because the clock control signal of the display panel 000 is easily affected by the resistance/capacitance (RC) of the clock signal line to generate a larger Delay (RC Delay), in the prior art, the RC Delay when the shift register unit at the far end and the shift register unit at the near end transmit the clock control signal through the same clock signal line is understood as a product of the resistance R of the clock signal line and the capacitance C of the clock signal line. Then, in the present embodiment, by disposing the first conductive line 60B1 of the partial segment of the second sub-clock signal line 60B in the fourth display area AA4 of the middle area, as the distance between the first conductive line 60B1 and the bonding area BA in the first direction Y is substantially reduced to half of that in the prior art, the RC Delay is also reduced to be

That is, the present embodiment can greatly reduce the delay of the clock control signal caused by the influence of the resistance/capacitance of the clock signal line, which is beneficial to improving the uniformity of signal transmission between the far-end shift register unit and the near-end shift register unit, thereby avoiding the display brightness of the display area from being significantly different, and being beneficial to improving the uniformity of the display imageAnd the display quality is ensured.

It can be understood that the scan driving circuit 10 of the present embodiment may also be connected to other signal lines, such as a power signal line and a reset signal line connected to the shift register unit 101 of each stage, and the setting manner of the signal line that needs to be connected to the shift register unit 101 of each stage may refer to the design structure of the clock signal line in the present embodiment, which is not described herein again.

In some alternative embodiments, please refer to fig. 11, where fig. 11 is a schematic plane structure diagram of a display device according to an embodiment of the present invention, and the display device 111 according to this embodiment includes the display panel 000 according to the above embodiment of the present invention. The embodiment of fig. 11 only uses a mobile phone as an example to describe the display device 111, and it should be understood that the display device 111 provided in the embodiment of the present invention may be other display devices 111 with a display function, such as a computer, a television, and a vehicle-mounted display device, and the present invention is not limited to this. The display device 111 provided in the embodiment of the present invention has the beneficial effects of the display panel 000 provided in the embodiment of the present invention, and specific reference may be made to the specific description of the display panel 000 in the above embodiments, which is not described herein again.

As can be seen from the above embodiments, the display panel and the display device provided by the present invention at least achieve the following beneficial effects:

Although some specific embodiments of the present invention have been described in detail by way of example, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the invention. It will be appreciated by those skilled in the art that modifications can be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims

1. A display panel, comprising: a display area and a non-display area disposed at least partially around the display area;

the non-display area comprises a scanning driving circuit, and the scanning driving circuit at least comprises a plurality of cascaded shift register units;

the display area comprises a plurality of scanning lines, and the output end of the shift register unit of each stage is connected with at least one scanning line;

the shift register unit of the first stage is electrically connected with an initial potential signal line, and at least part of the initial potential signal line is positioned in the display area.

2. The display panel according to claim 1, wherein a plurality of the shift register units which are cascade-connected are arranged in a first direction;

along the first direction, the non-display area comprises a first non-display area and a second non-display area which are positioned at two opposite sides of the display area;

the second non-display area includes a bonding area including a plurality of conductive pads;

the starting potential signal line comprises a first subsection, a second subsection and a third subsection which are connected with each other;

one end of the first subsection is connected with the shift register unit of the first stage, the other end of the first subsection is connected with the second subsection, and the first subsection is positioned in the first non-display area;

the second subsection is located in the display area;

one end of the third subsection is connected with the second subsection, the other end of the third subsection is connected with the conductive bonding pad, and the third subsection is located in the second non-display area.

3. The display panel of claim 2, wherein the second subsegment extends along the first direction.

4. The display panel according to claim 2, wherein the display region includes a plurality of first data lines extending in the first direction;

the conductive pads comprise first conductive pads, the first data lines are electrically connected with the first conductive pads through at least one first connecting line, and the first connecting line is positioned in the display area;

the second subsection and the first connecting line are arranged on the same layer.

5. The display panel according to claim 2, wherein the scan driving circuit comprises a first scan driving circuit and a second scan driving circuit, the first scan driving circuit and the second scan driving circuit being respectively located at opposite sides of the display area along the second direction; wherein the first direction and the second direction intersect in a direction parallel to a plane in which the display panel is located;

in the first scanning driving circuit, the initial potential signal line electrically connected with the shift register unit of the first stage is a first initial potential signal line;

in the second scanning driving circuit, the initial potential signal line electrically connected with the shift register unit of the first stage is a second initial potential signal line;

along the second direction, the display area comprises a first display area, a second display area and a third display area, wherein the second display area and the third display area are respectively positioned on two opposite sides of the first display area;

the second display area is positioned at one side of the first display area close to the first scanning driving circuit, and the third display area is positioned at one side of the first display area close to the second scanning driving circuit;

the second subsection of the first start potential signal line and the second subsection of the second start potential signal line are both located in the first display area.

6. The display panel according to claim 1, wherein the display panel comprises a plurality of clock signal lines electrically connected to the scan driving circuit;

at least a part of the clock signal lines are located in the display area.

7. The display panel according to claim 6,

the plurality of cascaded shift register units are arranged along a first direction;

the same clock signal line comprises a first sub-clock signal line and a second sub-clock signal line;

the first sub-clock signal line is positioned in the non-display area and extends along the first direction;

at least part of the second sub-clock signal lines are located in the display area;

one end of the second sub-clock signal line is connected with the first sub-clock signal line, and the other end of the second sub-clock signal line is connected with the conductive bonding pad of the bonding region.

8. The display panel according to claim 7, wherein one end of the second sub-clock signal line is connected to the first sub-clock signal line in the non-display region.

9. The display panel according to claim 7, wherein the second sub-clock signal line comprises a first conductive line extending in a second direction and a second conductive line extending in the first direction, one end of the first conductive line is connected to the first sub-clock signal line in the non-display area, the other end of the first conductive line is connected to one end of the second conductive line, and the other end of the second conductive line is connected to the conductive pad; wherein the first direction and the second direction intersect in a direction parallel to a plane in which the display panel is located;

the first conducting wire and the first sub-clock signal wire are arranged in different layers.

10. The display panel according to claim 9, wherein the display regions include a fourth display region, a fifth display region and a sixth display region on opposite sides of the fourth display region, respectively, along the first direction;

at least part of the first conducting wire is positioned in the fourth display area.

11. The display panel according to claim 6, wherein the clock signal line in the display region and the start potential signal line in the display region are provided in the same layer.

12. A display device characterized by comprising the display panel according to any one of claims 1 to 11.