CN115289923A - System and method for improving ignition reliability of electronic detonator, electronic detonator and medium - Google Patents
System and method for improving ignition reliability of electronic detonator, electronic detonator and medium Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 24
- 238000005474 detonation Methods 0.000 claims abstract description 42
- 238000004891 communication Methods 0.000 claims abstract description 24
- 239000003999 initiator Substances 0.000 claims abstract description 22
- 230000001052 transient effect Effects 0.000 claims abstract description 11
- 239000002360 explosive Substances 0.000 claims abstract description 8
- 230000006855 networking Effects 0.000 claims abstract description 7
- 230000001629 suppression Effects 0.000 claims abstract description 7
- 239000003990 capacitor Substances 0.000 claims description 14
- 238000007599 discharging Methods 0.000 claims description 10
- 238000004146 energy storage Methods 0.000 claims description 9
- 238000004880 explosion Methods 0.000 claims description 9
- 230000000977 initiatory effect Effects 0.000 claims description 9
- 238000012545 processing Methods 0.000 claims description 6
- 238000012795 verification Methods 0.000 claims description 4
- 238000004590 computer program Methods 0.000 claims description 3
- 238000012790 confirmation Methods 0.000 claims description 3
- 238000010304 firing Methods 0.000 claims description 3
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- 230000009286 beneficial effect Effects 0.000 description 1
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F42—AMMUNITION; BLASTING
- F42C—AMMUNITION FUZES; ARMING OR SAFETY MEANS THEREFOR
- F42C19/00—Details of fuzes
- F42C19/08—Primers; Detonators
- F42C19/12—Primers; Detonators electric
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F42—AMMUNITION; BLASTING
- F42C—AMMUNITION FUZES; ARMING OR SAFETY MEANS THEREFOR
- F42C11/00—Electric fuzes
- F42C11/06—Electric fuzes with time delay by electric circuitry
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F42—AMMUNITION; BLASTING
- F42C—AMMUNITION FUZES; ARMING OR SAFETY MEANS THEREFOR
- F42C19/00—Details of fuzes
- F42C19/08—Primers; Detonators
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Abstract
The invention provides a system and a method for improving the ignition reliability of an electronic detonator, the electronic detonator and a medium, which relate to the technical field of electronic detonators and comprise the following steps: a detonator and an electronic detonator module; an initiator: the main control equipment is used for finishing detonation control of the electronic detonator; an electronic detonator module: receiving an instruction of the detonator through the leg wire to finish detonating and detonating the explosive; the method comprises the following steps: an electronic detonator chip and a preceding stage protection circuit element; wherein, preceding stage protection circuit: the device comprises a transient high-voltage suppression tube and an electrostatic protection tube, wherein the transient high-voltage suppression tube suppresses a transient high-voltage signal entering from a leg wire; an electronic detonator chip: and the main control chip of the electronic detonator module receives the instruction, controls the delay and completes the detonation. The invention can thoroughly eliminate the problem of abnormal communication, avoids the time deviation between the detonation signals received by each detonator caused by communication waveform distortion under long-distance large-scale networking and achieves real complete synchronization.
Description
Technical Field
The invention relates to the technical field of electronic detonators, in particular to a system and a method for improving ignition reliability of an electronic detonator, the electronic detonator and a medium.
Background
Electronic detonators, also known as digital electronic detonators, digital detonators or industrial digital electronic detonators, generally adopt an electronic detonator blasting control system to control the electronic detonators to blast. The electronic detonator explosion control system basically comprises two parts, namely a detonator and an exploder, wherein a plurality of electronic detonator modules are connected with the exploder in a parallel connection mode, and the exploder can simultaneously control a plurality of electronic detonators to work.
And the electronic detonator explodes by receiving the detonation command of the detonator. At present, signal transmission between an electronic detonator and an initiator is generally completed in a two-bus wire transmission mode, but when the electronic detonator is used in complex working environments such as small sections, metal mines, underground wells, tunnels and the like, the signal transmission between the electronic detonator and the initiator is easily interfered by the outside, so that the electronic detonator has the problem of explosion rejection, and the safety of the electronic detonator is not facilitated.
The traditional detonation process comprises networking communication of the electronic detonator, delay configuration, detonation password verification, high-voltage capacitor charging and detonation after receiving a detonation command, the detonator has a corresponding confirmation mechanism to ensure that each step is correctly executed at each stage before the detonation command, but after the detonation command is sent, the electronic detonator immediately enters a delay mode and does not have any response to the detonation command, and meanwhile, the detonator also cuts off the power supply of a bus, so that if the electronic detonator is interfered in the process of receiving the detonation command and the detonation command is not correctly received, the electronic detonator cannot normally detonate. Therefore, a better detonation mechanism is needed to improve the reliability of the electronic detonator and avoid misfire.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides a system and a method for improving the ignition reliability of an electronic detonator, the electronic detonator and a medium.
According to the system, the method, the electronic detonator and the medium for improving the ignition reliability of the electronic detonator, the scheme is as follows:
in a first aspect, a system for improving the firing reliability of an electronic detonator is provided, the system comprising: the detonator is connected with the electronic detonator module;
an initiator: the main control equipment is used for finishing detonation control of the electronic detonator;
an electronic detonator module: receiving an instruction of the detonator through the leg wire to finish detonating and detonating the explosive; the method comprises the following steps: the electronic detonator chip element is connected with the preceding stage protection circuit;
wherein, preceding stage protection circuit: the device comprises a transient high voltage suppression tube and an electrostatic protection tube, wherein the transient high voltage suppression tube suppresses a transient high voltage signal entering from a leg wire;
an electronic detonator chip: and the main control chip of the electronic detonator module receives the instruction, controls the delay and completes the detonation.
Preferably, the electronic detonator module specifically includes:
a power supply module: converting the input high-voltage VDD, and outputting to provide stable working voltage for the electronic detonator chip, wherein the stable working voltage comprises a high-voltage VCCH and a low-voltage VCCL; the VCCH output by the power module is used as the input VIN of the charge-discharge path, and the output VCCL is used as the power supply input VIN of the reference voltage circuit, the power supply input VIN of the power-on reset circuit and the power supply input VIN of the oscillator circuit;
reference voltage circuit: the low-voltage reference power supply generated based on the low-voltage VCCL in the electronic detonator chip outputs a voltage reference of 1.8V: REF _1P8, REF _0P4; REF _1P8 output by the reference voltage circuit is connected with the power-on reset circuit and used as reference voltage of the internal circuit, and REF _0P4 output by the reference voltage circuit is connected with an input IN1 of the comparator;
a charge-discharge path: the input voltage VIN comes from VCCH of the power module, and the output end charges the energy storage capacitor; the charge and discharge control signals CHG _ EN and DSG _ EN of the charge and discharge channel are respectively controlled by the digital logic circuits CHG and DSG;
the power-on reset circuit comprises: implementing a chip reset based on the low voltage VCCL and the reference voltage REF _1P 8; the input VIN is connected with the VCCL of the power module; the output POR is connected with a RESET input of the digital logic circuit;
an oscillator circuit: generating a clock signal for the digital logic circuit, inputting a low-voltage power supply VCCL from the power supply module, and outputting CLK; the input VIN is connected with the VCCL of the power module; the output CLK is connected with the CLK input of the digital logic circuit;
a comparator: comparing the chip input power VDD with a reference voltage output REF _0P4 after one tenth of resistance voltage division sampling, and outputting a low level if the chip input power VDD is higher than the reference voltage, otherwise, outputting a high level; the input IN1 is connected with REF _0P4 of the reference voltage circuit, the input IN2 is from voltage of VDD after voltage division through R1 and R2, and the output OUT is connected with a START input of the digital logic circuit and used as an initiation starting signal;
a digital logic circuit: the digital logic control circuit in the detonator chip is responsible for processing the instruction analyzed by the communication circuit, controlling the charge and discharge path to charge and discharge the energy storage capacitor, and feeding back the detonation instruction to the detonator for confirmation after receiving the detonation instruction; the RESET of the digital logic circuit is from a power-on RESET circuit POR, the CLK is from an oscillator circuit CLK, the LIN is from a communication circuit OUT, the START is from a comparator output OUT, the CHG and the DSG are from CHG _ EN and DSG _ EN of a charge-discharge path, and the output of an ignition control signal FIRE is connected with the ignition control circuit OUT;
a communication circuit: the circuit which is used for completing the communication function between the inside of the electronic detonator and the initiator is responsible for receiving the instruction of the initiator and returning data to the initiator; the input A, B comes from the bus, and the output OUT is connected with the digital logic circuit LIN as an instruction input;
an ignition control circuit: the control signal FIRE from the digital logic circuit is input, the final ignition control signal OUT is generated after the processing, and the control signal FIRE is connected with the grid electrode of the ignition MOS switch externally connected with the chip.
Preferably, the voltage range of the VCCH in the power module is 6V to 40V, and after the chip is powered on stably, the output of the VCCL is fixed at about 3.3V.
Preferably, the charge and discharge path specifically includes: the control circuit for charging and discharging the energy storage capacitor has the input voltage VIN from the VCCH of the power module, the output end for charging the energy storage capacitor, and comprises a charging MOS tube, a discharging MOS tube and a charging and discharging current-limiting resistor, and switching signals CHG _ EN and DSG _ EN of the MOS tube are controlled by the logic control circuit.
Preferably, the power-on reset circuit further comprises: when the low voltage VCCL is lower than REF _1P8, the chip is in a reset state, the POR output is in a low level, otherwise, the chip reset is finished, and the POR output is in a high level.
Preferably, the digital logic circuit further comprises: the voltage of an input power supply VDD is monitored in real time, once the voltage is lower than a reference voltage REF _0P4, the chip enters a delay mode, a delay counter is started to count down, and an ignition control signal FIRE is output after the timing is finished.
In a second aspect, there is provided a method for improving the firing reliability of an electronic detonator, the method comprising:
step S1: after the electronic detonator chip is normally powered on, a power supply source of the chip is supplied with power from a leg wire, and after the electronic detonator chip is powered on, the reset circuit outputs an effective reset signal POR to reset the chip; the chip enters a standby state and waits for receiving an instruction;
step S2: the control system is used for controlling the initiator of the electronic detonator module to complete and confirm the normal related operations including communication networking, delay configuration, initiation password verification and high-voltage capacitor charging;
and step S3: after the exploder sends the detonation command, reading the state instruction of the detonator chip, reading the state of each electronic detonator chip, and confirming that each detonator chip receives all the detonation commands to wait for final detonation;
and step S4: the detonator closes the bus power supply, the electronic detonator chip detects that the bus power supply voltage is reduced below a threshold value, the main control logic control chip enters a delay mode of countdown before detonation, and starts a delay timer to start countdown;
step S5: and after the timer counts down to zero, outputting an ignition control signal to detonate the explosive head, automatically resetting the chip after 2ms, and reentering a normal communication mode.
Preferably, in the step S3, the hole position and state information of the corresponding detonator are read by reading the detonator chip state instruction, and only when all the flag bits are confirmed, it is indicated that all the electronic detonators are ready, and the initiator disconnects the bus power supply for initiation.
In a third aspect, there is provided an electronic detonator comprising:
one or more processors;
a storage device for storing one or more programs,
when executed by the one or more processors, cause the one or more processors to implement the steps in the method.
In a fourth aspect, a computer-readable storage medium is provided, in which a computer program is stored, which computer program, when being executed by a processor, carries out the steps of the method.
Compared with the prior art, the invention has the following beneficial effects:
1. the whole detonation flow of the electronic detonator does not need to be greatly adjusted, and the problem of detonator explosion rejection caused by abnormal communication can be completely avoided only by inserting an operation for confirming the correct receiving of the detonation command of the electronic detonator between the detonation command sending and the bus power supply cutting;
2. the electronic detonator chip only needs to be adjusted slightly, does not directly enter a delay mode after receiving a detonation command, or is in a normal communication mode, and the electronic detonator chip is used for confirming that each electronic detonator correctly receives the detonation command. A comparator is added in the chip to monitor the bus power supply voltage, and once the voltage is lower than a certain threshold value, the detonator can be controlled to enter a delay mode to start countdown. The reliability of the electronic detonator can be greatly improved at a very low cost;
3. the conditions for detonating the detonator chip are strict and the reliability is high. Even if the detonator is abnormally powered off, the explosive head cannot be mistakenly exploded. Only when all the state marks are confirmed to be correct, the detonation can be really realized;
4. the voltage change of the physically connected bus power supply is used as a real detonation signal, so that the problem of communication abnormity can be thoroughly solved, the time deviation among the detonation signals received by each detonator caused by communication waveform distortion under long-distance large-scale networking is avoided, and real complete synchronization is realized.
Drawings
Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:
FIG. 1 is a circuit composition structure of a detonation system;
FIG. 2 is a circuit component structure;
FIG. 3 illustrates two modes of operation of the electronic detonator;
FIG. 4 is a logic circuit implementation of a delay timer within an electronic detonator chip;
fig. 5 is an example of an operating waveform.
Detailed Description
The present invention will be described in detail with reference to specific examples. The following examples will assist those skilled in the art in further understanding the invention, but are not intended to limit the invention in any way. It should be noted that variations and modifications can be made by persons skilled in the art without departing from the concept of the invention. All falling within the scope of the present invention.
An embodiment of the present invention provides a system for improving the ignition reliability of an electronic detonator, and as shown in fig. 1, the system includes: the detonator and the electronic detonator module connected with the detonator.
An initiator: and the main control equipment is used for finishing detonation control of the electronic detonator.
An electronic detonator module: receiving an instruction of the detonator through the leg wire to finish detonating and detonating the explosive; the method comprises the following steps: electronic detonator chip and preceding stage protection circuit.
Wherein, preceding stage protection circuit: the device generally comprises a plurality of transient high voltage suppression tubes, electrostatic protection tubes and the like, and suppresses transient high voltage signals entering from a leg wire.
An electronic detonator chip: and the main control chip of the electronic detonator module receives the instruction, controls the delay and completes the detonation.
Referring to fig. 2, the specific circuit composition structure of the electronic detonator module comprises:
a power supply module: and converting the input high-voltage VDD, and outputting to provide stable working voltage comprising high-voltage VCCH and low-voltage VCCL for the electronic detonator chip. The output VCCH of the power module is used as the input VIN of the charging and discharging circuit, and the output VCCL is used as the power supply input VIN of the reference voltage circuit, the power supply input VIN of the power-on reset circuit and the power supply input VIN of the oscillator circuit. The voltage range of VCCH is 6V-40V, after the chip is electrified and stabilized, the output of VCCL is fixed at about 3.3V.
Reference voltage circuit: the low-voltage reference power supply generated based on the low-voltage VCCL in the electronic detonator chip outputs a voltage reference of 1.8V: REF _1P8, REF _0P4. The output REF _1P8 of the reference voltage circuit is connected with the power-on reset circuit and is used as the reference voltage of the internal circuit, and the output REF _0P4 of the reference voltage circuit is connected with the input IN1 of the comparator.
A charge-discharge path: the input voltage VIN comes from VCCH of the power module, and the output end charges the energy storage capacitor; the charge and discharge control signals CHG _ EN and DSG _ EN of the charge and discharge path are respectively controlled by the digital logic circuits CHG and DSG; the charging and discharging MOS tube mainly comprises a charging and discharging MOS tube and a charging and discharging current-limiting resistor (the charging and discharging current is limited below 10 mA), and switching signals CHG _ EN and DSG _ EN of the MOS tube are controlled by a logic control circuit.
The power-on reset circuit comprises: implementing a chip reset based on the low voltage VCCL and the reference voltage REF _1P 8; the input VIN is connected with the VCCL of the power module; the output POR is connected to the RESET input of the digital logic circuit. When the low voltage VCCL is lower than REF _1P8, the chip is in a reset state, the POR output is low level, otherwise, the chip reset is finished, and the POR output is high.
An oscillator circuit: the clock signal is generated to be used by the digital logic circuit, the low-voltage power supply VCCL from the power supply module is input, and the CLK is output. The input VIN is connected with the VCCL of the power module; the output CLK is coupled to the CLK input of the digital logic circuit.
A comparator: the chip input power VDD is sampled by one-tenth of the resistance voltage division (R1, R2) and then compared with the reference voltage output REF _0P4, and when the voltage is higher than the reference voltage, a low level (OUT = 0) is output, whereas a high level (OUT = 1) is output. The input IN1 is connected with REF _0P4 of the reference voltage circuit, the input IN2 is from VDD voltage after R1 and R2 voltage division, and the output OUT is connected with START input of the digital logic circuit as a detonation starting signal.
A digital logic circuit: and the digital logic control circuit in the detonator chip is responsible for processing the instruction analyzed by the communication circuit, controlling the charge and discharge path to charge and discharge the energy storage capacitor, and giving correct feedback to the initiator to confirm after receiving the detonation command. And the voltage of an input power supply VDD is monitored in real time, once the voltage is lower than a reference voltage REF _0P4, the chip enters a delay mode, a delay counter is started to count down, and an ignition control signal FIRE is output after the timing is finished. The RESET of the digital logic circuit comes from a power-on RESET circuit POR, the CLK comes from an oscillator circuit CLK, the LIN comes from a communication circuit OUT, the START comes from a comparator output OUT, the CHG and the DSG come from CHG _ EN and DSG _ EN of a charge-discharge path, and an ignition control signal FIRE output is connected with an ignition control circuit OUT.
A communication circuit: the circuit which is arranged in the electronic detonator and has the communication function with the initiator is mainly responsible for receiving the instruction of the initiator and returning data to the initiator. Input A, B is from the bus and output OUT is connected to digital logic circuit LIN as a command input.
An ignition control circuit: the control signal FIRE from the digital logic circuit is input, the final ignition control signal OUT is generated after the processing, and the control signal FIRE is connected with the grid electrode of the ignition MOS switch externally connected with the chip.
The invention also provides a method for improving the ignition reliability of the electronic detonator, which comprises the following steps:
step S1: after the electronic detonator chip is normally powered on, a power supply source of the chip is supplied with power from a leg wire, and after the electronic detonator chip is powered on, the reset circuit outputs an effective reset signal POR to reset the chip; the chip enters a standby state and waits for receiving an instruction.
Step S2: the control system is used for controlling the detonator of the electronic detonator module to complete normal operations such as communication networking, delay configuration, detonation password verification, high-voltage capacitor charging and the like and confirm the operations.
And step S3: after the exploder sends the explosion command, the state of each electronic detonator chip is read through a 'read detonator chip state' instruction, and each detonator is confirmed to be in a state of receiving all the explosion commands to wait for final explosion.
And step S4: the initiator closes the bus power supply, the electronic detonator chip detects that the bus power supply voltage is reduced below a threshold value, the main control logic control chip enters a delay mode of countdown before initiation, and starts a delay timer to start countdown.
Step S5: and after the timer counts down to zero, outputting an ignition control signal to detonate the explosive head, automatically resetting the chip after 2ms, and reentering a normal communication mode.
Two working modes of the electronic detonator are shown in FIG. 3, and the instruction of reading the state of the detonator chip is as follows:
the hole position and state information of the corresponding detonator can be read by reading the state command of the detonator chip, and the detonator can disconnect the bus power supply for real detonation only when all the zone bits are confirmed to indicate that all the electronic detonators are ready.
Referring to fig. 4, the logic circuit implementation of the internal delay timer of the electronic detonator chip is as follows:
CLOCK and POR are CLOCK and reset input signals of the delay timer;
CNT _ INIT is a delay value, which is determined by the detonator chip after receiving an initiator delay configuration command;
START is an output from the comparator, and is used for comparing the chip input power supply VDD after being subjected to resistance one-tenth voltage division sampling with the reference voltage output REF _0P4, and outputting a low level if the voltage is higher than the reference voltage, otherwise, outputting a high level;
the CNT _ START signal is a signal for starting the latency counter after synchronizing the START signal by two stages of flip-flops;
CNT _ LOAD is a pulse signal generated based on CNT _ START for loading CNT _ INIT into the counter as an initial count value.
CNT is a 24-bit latency counter;
CNT _ DONE is to realize the judgment whether all bits of the counter count to zero through a NOR gate with 24 bits, when the count reaches zero, the output is high, otherwise, the output is low;
SCAN _ DONE represents a networking completed mark; DELAY _ CFG indicates that the deferred value has configured the flag; PASSSWD _ MATCH represents a verified sign of the initiation code; CAP _ FULL indicates that the storage capacitor is FULL; CMD _ DONE indicates that the detonation command has received a flag.
The six signals are latched by a first-stage trigger after being processed by an AND gate, and then are used as input signals FIRE of the ignition control circuit.
The above processing logic ensures that even if the initiator is abnormally powered down, i.e. the delay counter starts counting, the charge head will not be fired in the end. Only when all the states have been confirmed to be correct is the detonation actually achieved, the working wave form is shown in fig. 5.
The embodiment of the invention provides a system, a method, an electronic detonator and a medium for improving the ignition reliability of the electronic detonator, wherein the electronic detonator does not enter a delay mode immediately after receiving an ignition command, but allows an initiator to confirm that each electronic detonator correctly receives the ignition command, then the initiator closes a power supply for a detonator network, each electronic detonator really starts a delay timer to count by detecting the change of the power supply, and once the counter counts down to zero, the ignition switch is opened to ignite the detonator.
Those skilled in the art will appreciate that, in addition to implementing the system and its various devices, modules, units provided by the present invention as pure computer readable program code, the system and its various devices, modules, units provided by the present invention can be fully implemented by logically programming method steps in the form of logic gates, switches, application specific integrated circuits, programmable logic controllers, embedded microcontrollers and the like. Therefore, the system and various devices, modules and units thereof provided by the invention can be regarded as a hardware component, and the devices, modules and units included in the system for realizing various functions can also be regarded as structures in the hardware component; means, modules, units for realizing various functions can also be regarded as structures in both software modules and hardware components for realizing the methods.
The foregoing description of specific embodiments of the present invention has been presented. It is to be understood that the present invention is not limited to the specific embodiments described above, and that various changes or modifications may be made by one skilled in the art within the scope of the appended claims without departing from the spirit of the invention. The embodiments and features of the embodiments of the present application may be combined with each other arbitrarily without conflict.
Claims (9)
1. A system for improving the ignition reliability of an electronic detonator is characterized by comprising: the detonator comprises a detonator and an electronic detonator module connected with the detonator;
an initiator: the main control equipment is used for finishing detonation control of the electronic detonator;
an electronic detonator module: receiving an instruction of the detonator through the leg wire to finish detonating and detonating the explosive; the method comprises the following steps: the electronic detonator chip element is connected with the preceding stage protection circuit;
wherein, preceding stage protection circuit: the device comprises a transient high-voltage suppression tube and an electrostatic protection tube, wherein the transient high-voltage suppression tube suppresses a transient high-voltage signal entering from a leg wire;
an electronic detonator chip: the main control chip of the electronic detonator module receives the instruction, controls the delay and completes the detonation;
the electronic detonator module specifically comprises: the ignition control circuit comprises a power module, a reference voltage circuit, a charge-discharge path, a power-on reset circuit, an oscillator circuit, a comparator, a digital logic circuit, a communication circuit and an ignition control circuit;
wherein the power module: converting an input high-voltage VDD (voltage-regulated power supply) to include a high-voltage VCCH (voltage-regulated power supply) and a low-voltage VCCL (voltage-regulated power supply), wherein the VCCH output by a power supply module is used as an input VIN of a charge-discharge path, and the output VCCL is used as a power supply input VIN of a reference voltage circuit, a power supply input VIN of a power-on reset circuit and a power supply input VIN of an oscillator circuit;
the power supply module is respectively connected with the charge-discharge passage, the reference voltage circuit, the power-on reset circuit and the oscillator circuit; the reference voltage circuit is also respectively connected with the power-on reset circuit and the comparator, and the output voltage reference comprises: REF _1P8, REF _0P4; the charge and discharge path is also connected with the energy storage capacitor and the digital logic circuit respectively; the oscillator circuit is also connected with the digital logic circuit;
the power-on reset circuit: realizing chip reset based on the low voltage VCCL and the reference voltage REF _1P 8; the input VIN is connected with the VCCL of the power module; the output POR is connected with the RESET input of the digital logic circuit;
the comparator is used for: comparing the chip input power VDD with a reference voltage output REF _0P4 after one tenth of resistance voltage division sampling, and outputting a low level if the chip input power VDD is higher than the reference voltage, otherwise, outputting a high level; the input IN1 is connected with a REF _0P4 of the reference voltage circuit, the input IN2 is from a voltage obtained by dividing VDD through resistors R1 and R2, and the output OUT is connected with a START input of the digital logic circuit and used as an initiation starting signal;
the digital logic circuit: processing the command analyzed by the communication circuit, controlling the charge-discharge path to charge and discharge the energy storage capacitor, and feeding back to the initiator for confirmation after receiving the initiation starting signal; the digital logic circuit is also connected with the communication circuit and the ignition control circuit respectively.
2. The system for improving the ignition reliability of the electronic detonator according to claim 1, wherein the VCCH voltage in the power module ranges from 6V to 40V, and after the chip is powered on and stabilized, the VCCL output is fixed at about 3.3V.
3. The system for improving the ignition reliability of the electronic detonator according to claim 1, wherein the charge and discharge path specifically comprises: the output end of the control circuit charges the energy storage capacitor, and comprises a charging MOS tube, a discharging MOS tube and a charging and discharging current-limiting resistor, wherein switching signals CHG _ EN and DSG _ EN of the MOS tube are controlled by a logic control circuit.
4. The system for improving the ignition reliability of the electronic detonator according to claim 1, wherein the power-on-reset circuit further comprises: when the low voltage VCCL is lower than REF _1P8, the chip is in a reset state, the POR output is in a low level, otherwise, the chip reset is finished, and the POR output is in a high level.
5. The system for improving the firing reliability of electronic detonators according to claim 1, wherein the digital logic circuit further comprises: the voltage of an input power supply VDD is monitored in real time, once the voltage is lower than a reference voltage REF _0P4, the chip enters a delay mode, a delay counter is started to count down, and an ignition control signal FIRE is output after the timing is finished.
6. A method for improving the ignition reliability of an electronic detonator, which is based on the system for improving the ignition reliability of the electronic detonator in any one of claims 1 to 5, and comprises the following steps:
step S1: after the electronic detonator chip is normally powered on, a power supply source of the chip is supplied with power from a leg wire, and after the electronic detonator chip is powered on, the reset circuit outputs an effective reset signal POR to reset the chip; the chip enters a standby state and waits for receiving an instruction;
step S2: the control system is used for controlling an initiator of the electronic detonator module to complete and confirm the related operations including normal communication networking, delay configuration, initiation password verification and high-voltage capacitor charging;
and step S3: after the exploder sends the explosion command, reading the state instruction of the chip of the exploder, reading the state of the chip of each electronic detonator, and confirming that each exploder completely receives the explosion command to wait for final explosion;
and step S4: the detonator closes the bus power supply, the electronic detonator chip detects that the bus power supply voltage is reduced below a threshold value, the main control logic control chip enters a delay mode of countdown before detonation, and starts a delay timer to start countdown;
step S5: and after the timer counts down to zero, outputting an ignition control signal to detonate the explosive head, automatically resetting the chip after 2ms, and reentering a normal communication mode.
7. The method for improving the ignition reliability of the electronic detonators according to claim 6, wherein in the step S3, the hole position and state information of the corresponding detonators are read by reading the state instructions of the detonator chips, and only when all the flag bits are confirmed, the fact that all the electronic detonators are ready is indicated, and the detonator disconnects the bus power supply for initiation.
8. An electronic detonator, characterized in that it comprises:
one or more processors;
a storage device to store one or more programs,
when executed by the one or more processors, cause the one or more processors to implement the steps of the method of any one of claims 6 to 7.
9. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method of any one of claims 6 to 7.
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| WO2009146645A1 (en) * | 2008-06-04 | 2009-12-10 | 北京铱钵隆芯科技有限责任公司 | An electronic detonator control chip and a detecting method of its connection correctness |
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| WO2009146645A1 (en) * | 2008-06-04 | 2009-12-10 | 北京铱钵隆芯科技有限责任公司 | An electronic detonator control chip and a detecting method of its connection correctness |
| JP2011163746A (en) * | 2010-02-10 | 2011-08-25 | Wonhwa Corporation Co Ltd | Electronic delay detonation apparatus and electronic detonation blasting system |
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