CN115224132A - Back contact heterojunction solar cell capable of reducing front surface damage and manufacturing method thereof - Google Patents
Back contact heterojunction solar cell capable of reducing front surface damage and manufacturing method thereof Download PDFInfo
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- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/02168—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
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Abstract
The invention relates to a method for manufacturing a back contact heterojunction solar cell capable of reducing front surface damage, which comprises a manufacturing step of an anti-reflection and anti-reflection wear-resistant layer, wherein a layer of liquid enhancing liquid is covered on the front surface of a silicon wafer which is sequentially provided with a front surface passivation layer and a front surface anti-reflection layer, and then the anti-reflection and anti-reflection wear-resistant layer is formed through high-temperature curing. The invention aims to provide a back contact heterojunction solar cell capable of reducing front damage and a manufacturing method thereof, which can greatly reduce the risk of damage caused by friction between the front of the solar cell and a printing platform, a transmission belt and the like, and can make testing and sorting more convenient.
Description
Technical Field
The invention relates to a back contact heterojunction solar cell capable of reducing front damage and a manufacturing method thereof.
Background
The solar cell is a semiconductor device capable of converting solar energy into electric energy, and photo-generated current is generated in the solar cell under the illumination condition, and the electric energy is output through an electrode. In recent years, the production technology of solar cells is continuously advanced, the production cost is continuously reduced, the conversion efficiency is continuously improved, and the solar cell power generation is widely applied and becomes an important energy source for power supply.
The back contact heterojunction solar cell (HBC) is a back contact solar cell manufactured based on a silicon-based high-efficiency heterojunction process, and positive and negative electrodes are arranged on the back of a cell piece. Because the positive and negative electrodes are arranged on the back of the cell piece, the front of the cell piece is not provided with any electrode to shield light, the maximum light absorption area can be achieved, and the efficiency of the solar cell is effectively improved. The highest laboratory efficiency of the back contact heterojunction solar cell can reach 26.63%, which is the highest conversion efficiency of the current silicon-based single-junction solar cell laboratory and is concerned by the industry.
However, since the front surface of the back contact heterojunction battery has no grid lines, the back contact heterojunction battery is easily damaged in the production and transportation processes, so that the production yield and the product stability of the back contact heterojunction battery are reduced.
Disclosure of Invention
The invention aims to provide a back contact heterojunction solar cell capable of reducing front damage and a manufacturing method thereof, which can greatly reduce the risk of damage caused by friction between the front of the solar cell and a printing platform, a transmission belt and the like, and can make testing and sorting more convenient.
The purpose of the invention is realized by the following technical scheme:
a back contact heterojunction solar cell capable of reducing front damage comprises a silicon wafer, a front passivation layer arranged on the front of the silicon wafer, a front antireflection layer arranged on the front passivation layer, and an antireflection wear-resistant layer arranged on the front antireflection layer.
A back contact heterojunction solar cell manufacturing method capable of reducing front surface damage comprises a manufacturing step of an anti-reflection wear-resistant layer, namely covering a layer of permeation enhancing liquid on the front surface of a silicon wafer on which a front surface passivation layer and a front surface anti-reflection layer are sequentially formed, and then forming the anti-reflection wear-resistant layer through high-temperature curing.
Compared with the prior art, the invention has the advantages that:
the anti-reflection wear-resistant layer is formed on the front surface of the back contact heterojunction solar cell, so that the anti-reflection wear-resistant layer can play a wear-resistant role, the contact damage of the front surface of the cell and the transmission damage of a finished cell in the subsequent manufacturing process of the cell are reduced, the stability and the production yield of a product are improved, the light absorption of the cell can be increased, and the short-circuit current and the conversion efficiency of the cell are improved.
Drawings
FIG. 1 shows steps for fabricating a solar cell according to an embodiment of the present invention;
FIG. 2 is a cross-sectional view of an n-type silicon wafer with a passivation layer formed on the front surface and a first semiconductor region, an isolation region and a second semiconductor region formed on the back surface and arranged crosswise with respect to the anti-reflection layer according to an embodiment of the present invention;
FIG. 3 is a cross-sectional view of a transparent conductive film deposited on the back surface of a silicon wafer in accordance with embodiment 1 of the present invention;
FIG. 4 is a cross-sectional view of a silicon wafer with an anti-reflection, anti-reflection and anti-wear layer formed on the front surface in example 1 of the present invention;
FIG. 5 is a cross-sectional view of a pattern of isolation trenches formed by printing a protective ink on the back surface of a silicon wafer according to example 1 of the present invention;
FIG. 6 is a sectional view of an isolation trench formed in the back surface of a silicon wafer according to example 1 of the present invention;
FIG. 7 is a cross-sectional view of a metal gate line formed on the back surface of a silicon wafer in accordance with embodiment 1 of the present invention;
FIG. 8 is a cross-sectional view of a composite film of transparent conductive and metal conductive deposited on the back surface of a silicon wafer in accordance with embodiment 2 of the present invention;
FIG. 9 is a sectional view of a silicon wafer with an anti-reflection and anti-wear layer formed on the front surface thereof in example 2 of the present invention;
FIG. 10 is a sectional view of a pattern of isolation trenches printed with a protective ink on the back surface of a silicon wafer in accordance with example 2 of the present invention;
FIG. 11 is a sectional view of a silicon wafer having isolation trenches formed in its backside in accordance with example 2 of the present invention;
FIG. 12 is a cross-sectional view of a plated metal electrode pattern formed by printing a protective ink on the back surface of a silicon wafer in accordance with example 2 of the present invention;
fig. 13 is a cross-sectional view of a metal gate line formed on the back surface of a silicon wafer in accordance with embodiment 2 of the present invention;
fig. 14 is a cross-sectional view of the protective ink after the metal gate line is formed on the back surface of the silicon wafer in example 2 of the present invention.
Detailed Description
A back contact heterojunction solar cell with reduced front side damage, comprising: the silicon wafer comprises a silicon wafer, a front passivation layer arranged on the front surface of the silicon wafer, a front antireflection layer arranged on the front passivation layer and an anti-reflection and antireflection wear-resistant layer arranged on the front antireflection layer.
The anti-reflection and anti-reflection wear-resistant layer is made of nano silicon oxide.
The back surface of the silicon wafer is provided with a first semiconductor region, a second semiconductor region and an isolation groove which is arranged between the first semiconductor region and the second semiconductor region and used for insulating isolation.
An isolation region is arranged between the first semiconductor region and the second semiconductor region, and the isolation groove is arranged on the isolation region.
First semiconductor district includes first type semiconductor film layer and the first conductive film layer that forms in proper order from the end to the face as the basement with the first principal of semiconductor substrate, the second semiconductor district includes second type semiconductor film layer and the second conductive film layer that forms in proper order from the end to the face as the basement with the first principal of semiconductor substrate, the isolation region includes first type semiconductor film layer, isolation film layer, second type semiconductor film layer and the isolation conductive film layer that forms in proper order from the end to the face as the basement with the first principal of semiconductor substrate, the isolation groove separates the conductive film layer of isolation into two parts about.
The first type semiconductor film layer comprises a first passivation layer and a first semiconductor layer which are sequentially formed from bottom to surface by taking a first main surface of a semiconductor substrate as a substrate; the second type semiconductor film layer comprises a second passivation layer and a second semiconductor layer which are sequentially formed from bottom to surface by taking the first main surface of the semiconductor substrate as a bottom surface; the first conductive film layer, the second conductive film layer and the isolation conductive film layer respectively comprise transparent conductive layers which are sequentially formed from bottom to top by taking the corresponding semiconductor layers as substrates; the isolation film layer comprises an isolation insulating layer formed on the isolation region by taking the first semiconductor layer as a substrate.
The surface hardness of the anti-reflection wear-resistant layer is more than 3H, the refractive index is 1.2-1.8, and the transmittance under the AM1.5 spectrum condition is more than 95%.
A back contact heterojunction solar cell manufacturing method capable of reducing front surface damage comprises a manufacturing step of an anti-reflection wear-resistant layer, namely covering a layer of permeation enhancing liquid on the front surface of a silicon wafer on which a front surface passivation layer and a front surface anti-reflection layer are sequentially formed, and then forming the anti-reflection wear-resistant layer through high-temperature curing.
The specific method for manufacturing the anti-reflection wear-resistant layer comprises the steps of covering an anti-reflection liquid with the thickness of 10-50 microns on the front anti-reflection layer, and curing for 2-15min at 100-200 ℃ to form the anti-reflection wear-resistant layer with the thickness of 5-40 microns. In a preferable scheme, the liquid increasing agent comprises 2-10% of ethyl silicate, 5-40% of ethanol and the balance of water, and the mass percentage of the components is; the anti-reflection and anti-reflection wear-resistant layer is made of nano silicon oxide.
In the manufacturing steps of the anti-reflection, anti-reflection and wear-resistant layer, a layer of liquid enhancing liquid is formed on the front anti-reflection layer through spraying, spin coating, blade coating or printing technologies.
The surface hardness of the anti-reflection wear-resistant layer is more than 3H, the refractive index is 1.2-1.8, and the transmittance under the AM1.5 spectrum condition is more than 95%.
The manufacturing method of the back contact heterojunction solar cell for reducing the damage of the front surface comprises the following steps,
A. manufacturing a silicon wafer, wherein the front side of the silicon wafer is provided with a front passivation layer and a front antireflection layer from the inside and the outside, and the back side of the silicon wafer is provided with a first semiconductor region, an isolation region and a second semiconductor region;
B. forming a conductive film layer on the back of the silicon wafer;
C. making an anti-reflection and anti-reflection wear-resistant layer;
D. forming an isolation groove for insulating and isolating the first semiconductor region and the second semiconductor region on the isolation region;
E. and forming conductive grid lines on the surfaces of the first semiconductor region and the second semiconductor region respectively.
The specific method of the step B is that a transparent conducting layer is deposited on the back of the silicon wafer processed in the step A through a Physical Vapor Deposition (PVD) or a Reactive Plasma Deposition (RPD) technology; or sequentially depositing a transparent conductive layer and a metal conductive layer on the back of the silicon wafer processed in the step A by Physical Vapor Deposition (PVD) or Reactive Plasma Deposition (RPD) technology.
The invention is described in detail below with reference to the drawings and examples of the specification:
as shown in fig. 1, the solar cell manufacturing steps according to the embodiment of the invention are as follows:
s1, providing an n-type silicon wafer 10 with a front surface formed with a front passivation layer 33 and a front anti-reflection layer 34, and a back surface formed with a first semiconductor region 01, an isolation region 02, a second semiconductor region 03 and the isolation region 02 which are arranged in a crossed manner;
s2, depositing a conductive film layer 40 on the back of the silicon wafer 10 by Physical Vapor Deposition (PVD) or Reactive Plasma Deposition (RPD) technology;
s3, forming a layer of permeation liquid on the front surface of the silicon wafer 10 through an ink-jet printing technology, and then forming an anti-reflection wear-resistant layer 50 through high-temperature curing;
s4, forming an isolation groove pattern in the isolation area 02 by printing the protective ink 41, and forming an isolation groove 42 after cleaning by chemical corrosion;
and S5, forming metal grid lines 61/62 alternately arranged at intervals on the surfaces of the first semiconductor region 01 and the second semiconductor region 02 through a silk-screen technology or an electroplating technology.
Example 1, as shown in figures 2-7:
as shown in fig. 2, a cross-sectional view of an n-type silicon wafer 10 is provided in S1. The front passivation layer 33 formed on the front surface of the silicon wafer 10 is an intrinsic microcrystalline silicon layer with a thickness of 5-15nm, and the front anti-reflection layer 34 is a silicon nitride layer with a thickness of 80-150nm, and is formed by Plasma Enhanced Chemical Vapor Deposition (PECVD). The first semiconductor region is provided with a first passivation amorphous silicon layer 21, an N-type doped amorphous silicon and microcrystalline silicon composite layer 22 on the surface of the silicon wafer 10 in sequence. The second semiconductor region is provided with a second passivation amorphous layer 31, a P-type doped amorphous silicon and microcrystalline silicon composite semiconductor layer 32 on the surface of the silicon wafer 10 in sequence. The isolation region is provided with a first passivation amorphous silicon layer 21, an N-type doped amorphous silicon and microcrystalline silicon composite semiconductor layer 22, a silicon nitride isolation layer 23, a second passivation amorphous layer 31 and a P-type doped amorphous silicon and microcrystalline silicon composite semiconductor layer 32 on the surface of a silicon wafer 10 in sequence, the first passivation amorphous silicon layer 21, the N-type doped amorphous silicon and microcrystalline silicon composite semiconductor layer 22, the second passivation amorphous layer 31, the P-type doped amorphous silicon and microcrystalline silicon composite semiconductor layer 32 are 5-15nm in thickness, the silicon nitride isolation layer 23 is 80-150nm in thickness, and the first passivation amorphous silicon layer 21, the N-type doped amorphous silicon and microcrystalline silicon composite semiconductor layer 22, the silicon nitride isolation layer 23, the second passivation amorphous layer 31, the P-type doped amorphous silicon and microcrystalline silicon composite semiconductor layer 32 are formed by PECVD deposition. The silicon wafer 10 may be a cast monocrystalline silicon wafer or a monocrystalline silicon wafer.
As shown in fig. 3, a cross-sectional view of a transparent conductive film layer 40 deposited on the back surface of the silicon wafer 10 in S2 is shown. The transparent conductive film layer 40 is Indium Tin Oxide (ITO) with the thickness of 80-100nm and the sheet resistance of 30-40 omega/\9633.
As shown in fig. 4, a cross-sectional view of a silicon wafer 10 with a liquid-permeable layer formed on the front surface by ink-jet printing technique and then cured at a high temperature to form an antireflection wear-resistant layer 50 in S3 is shown. The thickness of the anti-reflection liquid is 20-30 micrometers, the thickness of the anti-reflection and anti-reflection wear-resistant layer after curing is 10-25 micrometers, the high-temperature curing temperature is 150 ℃, the time is 8M, the surface hardness of the anti-reflection and anti-reflection wear-resistant layer is 4H, the refractive index is 1.35, and the transmittance under the AM1.5 spectrum condition is 96.5%.
Fig. 5 is a cross-sectional view of the silicon wafer 10 with a pattern of isolation grooves formed in the isolation regions by printing the protective ink 41 in S4, and fig. 6 is a cross-sectional view of the silicon wafer 10 with the isolation grooves 42 formed after the silicon wafer is etched and cleaned by a chemical solution in S4. The protective printing ink is formed by thermal curing after printing, the thermal curing temperature is 150 ℃, the time is 5M, the corrosive chemical solution is a hydrochloric acid solution with the solubility of 5% -15%, the corrosion time is 30-120S, the chemical solution for cleaning is a KOH solution with the concentration of 1% -5%, and the cleaning time is 60-120S.
As shown in fig. 7, a cross-sectional view of metal gate lines 61/62 arranged at intervals formed by printing low-temperature silver paste on the surfaces of the first semiconductor region and the second semiconductor region on the back surface of the silicon wafer in S5 is shown. The low-temperature silver paste is formed by curing at 200 ℃ for 10-15M, the thickness of the metal grid line 61/62 is 9-13um, and the width of the metal grid line is 35-55um.
Example 2, as shown in fig. 8 to 12, differs from the first example in that:
as shown in fig. 8, a cross-sectional view of the transparent conductive film 401 and the metal conductive film 402 deposited on the back surface of the silicon wafer 10 in S2 is shown. The transparent conductive film layer 401 is Indium Tin Oxide (ITO), the thickness is 80-100nm, and the sheet resistance is 30-40 omega/\9633. The metal conductive film layer 402 is a composite layer of metal copper and Indium Tin Oxide (ITO), wherein the thickness of the metal copper is 100nm, and the thickness of the Indium Tin Oxide (ITO) is 20nm.
FIG. 9 is a cross-sectional view of a silicon wafer 10 having a front surface coated with a liquid-permeable coating and then cured at a high temperature to form an anti-reflective, anti-reflective and anti-wear layer 50 in S3. The thickness of the anti-reflection liquid is 20-30 micrometers, the thickness of the anti-reflection and anti-reflection wear-resistant layer after curing is 10-25 micrometers, the high-temperature curing temperature is 150 ℃, the time is 8M, the surface hardness of the anti-reflection and anti-reflection wear-resistant layer is 4H, the refractive index is 1.35, and the transmittance under the AM1.5 spectrum condition is 96.5%.
As shown in fig. 10, a cross-sectional view of the silicon wafer 10 in S4 is patterned with isolation grooves by printing a protective ink 41, and as shown in fig. 11, a cross-sectional view of the silicon wafer 10 is etched and cleaned by a chemical solution to form isolation grooves 42. The protective ink 41 is formed by thermal curing after printing, the thermal curing temperature is 150 ℃, the time is 5M, the corrosive chemical solution is a mixed solution of hydrochloric acid with the solubility of 5% -15% and ferric trichloride with the solubility of 10% -30%, the corrosion time is 60-180S, the chemical solution for cleaning is 1% -5% of NAOH solution, and the cleaning time is 60-120S.
As shown in fig. 12, which is a cross-sectional view of a plated metal electrode pattern formed by printing a protective ink 60 on the back surface of the silicon wafer 10 in S5, the protective ink 60 is formed by thermal curing after printing, the thermal curing temperature is 150 ℃, the time is 5M, and the thickness is 5-15um. As shown in fig. 13, a cross-sectional view of a metal gate line 61/62 formed on the back surface of the silicon wafer 10 by electroplating in S5 is shown, where the metal gate line 61/62 is a copper gate line with a surface covered with metal tin, and a width of the copper gate line is 100-200um, a thickness of the copper is 20-50um, and a thickness of the tin is 5-10um. As shown in fig. 14, the cross-sectional view of the protective ink 60 cleaned after the metal gate line 61/62 is formed in S5, the chemical solution for cleaning after the metal gate line 61/62 is 1% -5% NAOH solution, and the cleaning time is 60-120S.
By adopting the technical scheme, the anti-reflection wear-resistant layer is formed on the front surface of the back contact heterojunction solar cell, so that the anti-reflection wear-resistant layer can play a wear-resistant role, and the contact damage of the front surface of the cell and the transmission damage of a finished cell in the subsequent manufacturing process of the cell are reduced, so that the stability and the production yield of products are improved, the light absorption of the cell can be increased, and the short-circuit current and the conversion efficiency of the cell are improved.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
Claims (10)
1. A back contact heterojunction solar cell with reduced front side damage, comprising: the silicon wafer comprises a silicon wafer, a front passivation layer arranged on the front surface of the silicon wafer, a front antireflection layer arranged on the front passivation layer and an anti-reflection and antireflection wear-resistant layer arranged on the front antireflection layer.
2. The front side damage reduction back contact heterojunction solar cell of claim 1, wherein: the anti-reflection and anti-reflection wear-resistant layer is made of nano silicon oxide.
3. The front side damage reduction back contact heterojunction solar cell of claim 1 or 2, wherein: the surface hardness of the anti-reflection wear-resistant layer is more than 3H, the refractive index is 1.2-1.8, and the transmittance under the AM1.5 spectrum condition is more than 95%.
4. The method for fabricating a back contact heterojunction solar cell with reduced front surface damage according to any of claims 1 to 3, wherein: the method comprises the steps of manufacturing an anti-reflection and anti-reflection wear-resistant layer, namely covering a layer of permeation liquid on the front surface of a silicon wafer on which a front passivation layer and a front anti-reflection layer are sequentially formed, and then forming the anti-reflection and anti-reflection wear-resistant layer through high-temperature curing.
5. The method of fabricating a back contact heterojunction solar cell with reduced front side damage of claim 4, wherein: the specific method for manufacturing the anti-reflection and anti-reflection wear-resistant layer comprises the steps of covering an anti-reflection liquid with the thickness of 10-50 microns on the front anti-reflection layer, and curing for 2-15min at 100-200 ℃ to form the anti-reflection and anti-reflection wear-resistant layer with the thickness of 5-40 microns.
6. The method for manufacturing a back contact heterojunction solar cell with reduced front side damage according to claim 4, wherein: in the manufacturing steps of the anti-reflection, anti-reflection and wear-resistant layer, a layer of liquid enhancing liquid is formed on the front anti-reflection layer through spraying, spin coating, blade coating or printing technologies.
7. The method of fabricating a back contact heterojunction solar cell with reduced front side damage of claim 4, wherein: the liquid contains 2-10% of ethyl silicate, 5-40% of ethanol and the balance of water, and the contents of the components are in percentage by mass.
8. The method for manufacturing a back contact heterojunction solar cell with reduced front side damage according to claim 4, wherein: the surface hardness of the anti-reflection wear-resistant layer is more than 3H, the refractive index is 1.2-1.8, and the transmittance under the AM1.5 spectrum condition is more than 95%.
9. The method for manufacturing a back contact heterojunction solar cell with reduced front surface damage according to any one of claims 4 to 8, wherein: the method comprises the following steps of (a) preparing,
A. manufacturing a silicon wafer, wherein the front side of the silicon wafer is provided with a front passivation layer and a front antireflection layer from the inside and the outside, and the back side of the silicon wafer is provided with a first semiconductor region, an isolation region and a second semiconductor region;
B. forming a conductive film layer on the back of the silicon wafer;
C. making an anti-reflection and anti-reflection wear-resistant layer;
D. forming an isolation groove for insulating and isolating the first semiconductor region and the second semiconductor region on the isolation region;
E. and forming conductive grid lines on the surfaces of the first semiconductor region and the second semiconductor region respectively.
10. The method of fabricating a back contact heterojunction solar cell with reduced front-side damage of claim 9, wherein: the specific method of the step B is that a transparent conducting layer is deposited on the back of the silicon wafer processed in the step A through Physical Vapor Deposition (PVD) or Reactive Plasma Deposition (RPD) technology; or sequentially depositing a transparent conductive layer and a metal conductive layer on the back surface of the silicon wafer processed in the step A by Physical Vapor Deposition (PVD) or Reactive Plasma Deposition (RPD) technology.
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