CN115207116A - Gallium oxide transistor and polarization regulation method for concentration of two-dimensional electron gas thereof - Google Patents

Gallium oxide transistor and polarization regulation method for concentration of two-dimensional electron gas thereof Download PDF

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CN115207116A
CN115207116A CN202210774324.5A CN202210774324A CN115207116A CN 115207116 A CN115207116 A CN 115207116A CN 202210774324 A CN202210774324 A CN 202210774324A CN 115207116 A CN115207116 A CN 115207116A
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epsilon
algao
gallium oxide
layer
polarization
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裴艳丽
成声亮
卢星
陈梓敏
王钢
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Sun Yat Sen University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
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    • H01L29/26Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys
    • H01L29/267Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, elements provided for in two or more of the groups H01L29/16, H01L29/18, H01L29/20, H01L29/22, H01L29/24, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66969Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET

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Abstract

The invention discloses a gallium oxide transistor and a polarization regulation and control method for two-dimensional electron gas concentration thereof. The epsilon phase gallium oxide has a large spontaneous polarization and is considered to be a ferroelectric material, and two-dimensional electron gas is formed at the interface of epsilon phase gallium oxide aluminum/epsilon phase gallium oxide heterostructure. The invention uses grid electrode and substrate to make gate-lower epsilon-AlGaO 3 /ε‑Ga 2 O 3 And applying a vertical electric field to the heterostructure to change the polarization direction of the heterostructure, and removing the vertical electric field to realize two-dimensional electron gas depletion of the heterojunction interface under the gate. The method has the advantages that the state of the 2DEG of the heterojunction interface can be maintained after polarization regulation, and the normally-off increase is realizedStrong low power transistors provide a new approach. The normally-off and normally-on types of the gallium oxide device can be switched as required, and the type of the device can be flexibly regulated and controlled.

Description

Gallium oxide transistor and polarization regulation method for concentration of two-dimensional electron gas thereof
Technical Field
The invention relates to a gallium oxide transistor and a polarization regulation method of two-dimensional electron gas concentration of the gallium oxide transistor.
Background
Gallium oxide Ga 2 O 3 The crystal phase of the semiconductor material generally comprises five crystal phases of alpha, beta, gamma, delta and epsilon, wherein the beta phase is most stable thermodynamically. beta-Ga 2 O 3 The ultra-wide bandgap semiconductor material is a novel ultra-wide bandgap semiconductor material, has excellent characteristics of an ultra-wide bandgap of 4.8eV, an ultra-high theoretical breakdown electric field of 8MV/cm, an ultra-high low loss index of Baliga excellent value and the like, and is more and more attracted by people as a next-generation high-power device material. However, the mobility of gallium oxide is low at present, about 120-200cm 2 V · s, to some extent, limits its application. In the prior art, by beta-Ga 2 O 3 /β-(Al x Ga 1-x ) 2 O 3 The mobility is expected to be improved by inducing two-dimensional electron gas 2DEG by modulation doping of the heterostructure, but the mobility improvement of the modulation doping method is limited due to the effect of impurity scattering, and in addition, the preparation method is relatively complex.
Currently, the mainstream high mobility transistor HEMT is an AlGaN/GaN system HEMT, such as CN111799326A, CN 113066863A. In practical applications, normally off operation is usually required for the purpose of low power consumption, such as CN110190116a. There are many ways to realize enhancement devices in AlGaN/GaN HEMT devices, such as releasing polarization stress by notching the AlGaN layer under the gate, introducing p-type GaN gate, and depletion by doping F ions in the AlGaN layer under the gate. The trench gate technology, the P-GaN cap layer and the F doping method have the defects of damaging a channel or influencing the gate voltage regulation and control capability.
Epsilon phase gallium oxide epsilon-Ga 2 O 3 Is considered as a ferroelectric material and has a spontaneous polarization (P) greater than that of the existing group III-nitride semiconductor SP About 0.23C/m 2 ) And 2DEG with high concentration is expected to be obtained by constructing a heterostructure. epsilon-Ga 2 O 3 10 can be obtained without modulation doping 14 cm -2 High concentration of 2DEG, compared with the existing AlGaN/GaN hetero-structureThe architecture is an order of magnitude larger. Although ε -Ga 2 O 3 High concentrations of 2DEG can be achieved, but a larger negative gate voltage is required to turn off, which causes additional power consumption in practical applications, so that it is critical to realize normally-off transistor devices.
Disclosure of Invention
The invention aims to provide a gallium oxide transistor and a polarization regulation method of two-dimensional electron gas concentration thereof, so as to solve the problems in the prior art.
The invention relates to a polarization regulation method for two-dimensional electron gas concentration of a gallium oxide transistor, which utilizes a gate electrode and a substrate to carry out pair-gate epsilon-AlGaO 3 /ε-Ga 2 O 3 The heterostructure applies a vertical electric field to change its polarization direction, then the vertical electric field is removed;
in the epsilon-AlGaO 3 /ε-Ga 2 O 3 In the heterostructure, two-dimensional electron gas is formed in epsilon-AlGaO 3 Layer and ε -Ga 2 O 3 The interface of the layers.
When the epsilon-AlGaO 3 /ε-Ga 2 O 3 And when the polarization directions of the heterostructure face upwards to the surface, applying a vertical electric field pointing to the substrate from the grid electrode to change the polarization direction of the heterostructure below the grid electrode to point downwards to the substrate, wherein the two-dimensional electron gas at the interface of the heterostructure below the grid electrode is in a depletion state.
When the epsilon-AlGaO is under the gate 3 /ε-Ga 2 O 3 When the polarization directions of the heterostructure point to the substrate downwards, a vertical electric field pointing to the grid from the substrate is applied, so that the polarization direction of the heterostructure under the grid is changed into a direction pointing to the surface upwards, and at the moment, the heterojunction interface under the grid gathers high-concentration two-dimensional electron gas.
The invention relates to a gallium oxide transistor, which comprises epsilon-AlGaO which are sequentially laminated 3 Layer of epsilon-Ga 2 O 3 A layer and a conductive substrate; the epsilon-AlGaO 3 Layer and epsilon-Ga 2 O 3 Layer composition epsilon-AlGaO 3 /ε-Ga 2 O 3 A heterostructure having an interface forming a two-dimensional electron gas;
providing drain through epsilon-AlGaO 3 The layer extending to epsilon-Ga 2 O 3 Layer, the drain and epsilon-AlGaO 3 /ε-Ga 2 O 3 Forming ohmic contact on the heterostructure;
providing source penetrations of epsilon-AlGaO 3 The layer extending to epsilon-Ga 2 O 3 Layer of the source and epsilon-AlGaO 3 /ε-Ga 2 O 3 Forming an ohmic contact on the heterostructure;
a gate electrode is also provided between the source electrode and the drain electrode, the gate electrode being connected with the epsilon-AlGaO 3 Forming a Schottky contact on the upper surface of the layer;
the grid and the conductive substrate are used for being externally connected with a vertical electric field.
The epsilon-AlGaO 3 The layer thickness is 5nm to 30nm.
The epsilon-Ga 2 O 3 The layer thickness is 200nm to 1000nm.
The epsilon-AlGaO 3 Having spontaneous polarization along the c-axis direction; the lattice constant can be selected as
Figure BDA0003726052710000021
The epsilon-Ga 2 O 3 Having spontaneous polarization along the c-axis direction; the lattice constant can be selected as
Figure BDA0003726052710000022
The gallium oxide transistor and the polarization regulation method for the concentration of the two-dimensional electron gas of the gallium oxide transistor have the advantages that the 2DEG state of the heterojunction interface can be maintained after polarization regulation, and a new way is provided for realizing normally-off low-power-consumption transistors. The normally-off and normally-on types of the gallium oxide device can be switched as required, and the type of the device can be flexibly regulated and controlled.
Drawings
Fig. 1 is a schematic structural diagram of a gallium oxide transistor according to the present invention.
Fig. 2 is a schematic diagram of the distribution and polarization direction of 2DEG when the gallium oxide transistor is depletion mode.
Fig. 3 is a graph of an energy band curve and a 2DEG concentration profile of a gallium oxide transistor according to the present invention in a depletion mode.
Fig. 4 is a graph showing a simulation curve of the transfer characteristics of a gallium oxide transistor of the present invention in a depletion mode.
Fig. 5 is a circuit diagram of the polarization control method according to the present invention.
FIG. 6 is a schematic diagram of the polarization modulation method of the present invention.
FIG. 7 is a graph of the band of a gallium oxide transistor of the present invention in enhancement mode.
Fig. 8 is a graph of the band curve and 2DEG concentration profile for a gallium oxide transistor of the present invention in enhancement mode biased at 1.2V.
Fig. 9 is a graph showing a simulation curve of transfer characteristics when a gallium oxide transistor according to the present invention is an enhancement type transistor.
Reference numerals:
1-conductive substrate, 2-epsilon-Ga 2 O 3 Layer, 3-epsilon-AlGaO 3 Layer, 4-drain, 5-gate, 6-source;
P SP spontaneous polarization, P PZ -piezoelectric polarization.
Detailed Description
As shown in FIG. 1, a gallium oxide transistor according to the present invention includes epsilon-AlGaO layers stacked in this order 3 Layer of epsilon-Ga 2 O 3 A layer and a conductive substrate. Wherein epsilon-AlGaO 3 Layer and ε -Ga 2 O 3 The layers being epitaxially grown to form epsilon-AlGaO 3 /ε-Ga 2 O 3 Heterostructures, the interface of which produces 2DEG. In epsilon-AlGaO 3 The upper surface of the layer is provided with a grid, epsilon-AlGaO 3 /ε-Ga 2 O 3 The two ends of the heterostructure are respectively provided with a penetrating epsilon-AlGaO 3 A drain and a source of the layer.
In the present embodiment, the conductive substrate may be selected from a hexagonal Si, siC or GaN material, and may be replaced with a high work function metal layer, such as Pt metal. The effect of which is to interact with the grid electrode to epsilon-AlGaO under the grid 3 /ε-Ga 2 O 3 The heterostructure is applied with a vertical electric field to change its polarization direction.
ε-Ga 2 O 3 The thickness of the layer is 200nm to 1000nm. ε -Ga 2 O 3 Is a polar semiconductor material having a spontaneous polarization P along the c-axis SP ~0.23C/m 2 . On the other hand ε -Ga 2 O 3 While being a ferroelectric material, which indicates ε -Ga 2 O 3 Can be changed under the action of an applied electric field.
ε-AlGaO 3 The thickness of the layer is 5nm to 30nm. With ε -Ga 2 O 3 Like epsilon-AlGaO 3 Also a ferroelectric semiconductor having a spontaneous polarization P along the c-axis SP ~0.13C/m 2 The polarization direction can also be changed under the action of an applied electric field.
The drain and source cross-over epsilon-AlGaO 3 Layer is deposited on epsilon-Ga 2 O 3 Upper surface of layer, with epsilon-AlGaO 3 /ε-Ga 2 O 3 The heterostructure forms an ohmic contact to reduce the series resistance between the channel and the electrode, increasing the device current. Gate growth in epsilon-AlGaO 3 Upper surface of the layer and epsilon-AlGaO 3 A schottky contact is formed. The drain electrode, the source electrode and the grid electrode can all adopt metal materials, such as aluminum, gold and platinum, and the specific selection is irrelevant to the concept of the invention. A silicon nitride insulating layer is formed among the drain, the source and the gate to prevent leakage and breakdown between the electrodes.
ε-AlGaO 3 Layer and ε -Ga 2 O 3 The layer has strong spontaneous polarization and generates large piezoelectric polarization under epitaxial stress, epsilon-AlGaO 3 /ε-Ga 2 O 3 The polarization charge density at the heterostructure interface is much higher than that of AlGaN/GaN heterostructures. In the present embodiment of the invention 3 Layer and ε -Ga 2 O 3 The lattice constants of the layers can be respectively set
Figure BDA0003726052710000041
And
Figure BDA0003726052710000042
belonging to the orthorhombic system.
After epitaxial growth, the polarization direction of the original state is as shown in fig. 2, the position under the gate and the position outside the gate both point to the surface upwards, and residual polarization positive charges exist at the interface. The polarized positive charge attracts the electrons in the body region to collect at the interface, forming a high density 2DEG, where the device is a depletion mode device. epsilon-AlGaO 3 /ε-Ga 2 O 3 The band diagram of the heterostructure, the interface 2DEG concentration profile is shown in fig. 3. epsilon-AlGaO 3 /ε-Ga 2 O 3 Heterostructure interface formation 1 × 10 20 cm -2 The two-dimensional electron gas of (2) forms a high-quality conduction channel. Fig. 4 shows a transfer characteristic curve of the depletion type field effect transistor obtained by simulation calculation. After the device is started, the working current of the device is 0.93A/mm, the maximum transconductance value is 820mS/mm, and the turn-off voltage is about-2V.
If the normally-on depletion mode device needs to be regulated into a normally-off enhancement mode device or vice versa, the normally-off enhancement mode device can be realized only by adding a vertical electric field with certain strength between the grid and the conductive substrate. And is obviously different from the prior art, the vertical electric field can be completely removed after the regulation and control are finished, and the regulation and control effect can be permanently maintained without keeping external voltage. The circuit for the application of the vertical electric field is shown in fig. 5.
Normally-on depletion mode devices are regulated to normally-off enhancement mode devices as examples: the grid is externally connected with the anode of a power supply, and the conductive substrate is externally connected with the cathode of the power supply. After applying the vertical electric field, the polarization direction is reversed at the location below the gate as shown in fig. 6, the polarization direction pointing down towards the substrate. There is a remnant polarized negative charge at the interface, which repels electrons. After the vertical electric field is removed, the 2DEG in the channel under the gate is still in a depletion state under zero bias, and the device is in an off state at the moment.
When the device works, after +1.2V grid voltage is applied, the energy band moves downwards to induce and generate 2DEG, and the conduction of the device is realized. As shown in FIG. 8, the epsilon-AlGaO under the gate 3 /ε-Ga 2 O 3 Heterostructure interface formation 3.6 × 10 18 cm -2 The two-dimensional electron gas of (2) well restores the conduction channel. FIG. 9 shows transfer characteristics of an enhancement type FET obtained by simulation calculationAnd (4) a sexual curve. The starting voltage of the device is about 0.5V, the working current of the device after starting is close to 0.89A/mm, and the maximum transconductance value is 890mS/mm.
If the normally-off enhancement type device needs to be regulated into a normally-on depletion type device, the state shown in fig. 2 can be recovered by applying the reverse vertical electric field again, and the external vertical electric field can be removed after the regulation is finished.
It will be apparent to those skilled in the art that various other changes and modifications may be made in the above-described embodiments and concepts and all such changes and modifications are intended to be within the scope of the appended claims.

Claims (8)

1. A polarization control method for two-dimensional electron gas concentration of gallium oxide transistor is characterized by using a gate electrode and a substrate to align epsilon-AlGaO under the gate 3 /ε-Ga 2 O 3 The heterostructure applies a vertical electric field to change its polarization direction, then the vertical electric field is removed;
in the epsilon-AlGaO 3 /ε-Ga 2 O 3 In the heterostructure, a two-dimensional electron gas can be formed at the interface.
2. The method of claim 1 wherein the concentration of the epsilon-AlGaO electrons is adjusted by polarization 3 /ε-Ga 2 O 3 When the polarization directions of the heterostructures are all upward and point to the surface, a vertical electric field pointing to the substrate from the grid electrode is applied, so that the polarization direction of the heterostructures under the grid electrode is changed to be downward and point to the substrate.
3. The method of claim 1, wherein epsilon-AlGaO is applied under the gate 3 /ε-Ga 2 O 3 When the polarization directions of the heterostructures are all downward pointing to the substrate, a vertical electric field pointing to the grid electrode from the substrate is applied, so that the polarization direction of the heterostructures under the grid electrode is changed into an upward pointing surface.
4. A gallium oxide transistor comprising [ epsilon ] -AlGaO stacked in this order 3 Layer of epsilon-Ga 2 O 3 A layer and a conductive substrate; the epsilon-AlGaO 3 Layer and ε -Ga 2 O 3 Layer composition epsilon-AlGaO 3 /ε-Ga 2 O 3 A heterostructure having an interface forming a two-dimensional electron gas;
providing drain through epsilon-AlGaO 3 The layer extending to epsilon-Ga 2 O 3 Layer, the drain and epsilon-AlGaO 3 /ε-Ga 2 O 3 Forming an ohmic contact on the heterostructure;
providing source penetrations of epsilon-AlGaO 3 The layer extending to epsilon-Ga 2 O 3 Layer of the source and epsilon-AlGaO 3 /ε-Ga 2 O 3 Forming an ohmic contact on the heterostructure;
a gate electrode is arranged between the source electrode and the drain electrode, and the gate electrode is connected with the epsilon-AlGaO 3 Forming a Schottky contact on the upper surface of the layer;
the grid and the conductive substrate are used for being externally connected with a vertical electric field.
5. The gallium oxide transistor according to claim 4, wherein the epsilon-AlGaO 3 The layer thickness is 5nm to 30nm.
6. A gallium oxide transistor according to claim 4, wherein ε -Ga 2 O 3 The layer thickness is 200nm to 1000nm.
7. The gallium oxide transistor according to claim 4, wherein the epsilon-AlGaO 3 Having a spontaneous polarization along the c-axis.
8. A gallium oxide transistor according to claim 4, wherein ε -Ga 2 O 3 Having a spontaneous polarization along the c-axis.
CN202210774324.5A 2022-07-01 2022-07-01 Gallium oxide transistor and polarization regulation method for concentration of two-dimensional electron gas thereof Pending CN115207116A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117038711A (en) * 2023-07-20 2023-11-10 湖北九峰山实验室 Polar gallium oxide polarized heterojunction multichannel Fin-HEMT device and preparation method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117038711A (en) * 2023-07-20 2023-11-10 湖北九峰山实验室 Polar gallium oxide polarized heterojunction multichannel Fin-HEMT device and preparation method thereof

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