CN115150004B - Narrow pulse generator - Google Patents
Narrow pulse generator Download PDFInfo
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- CN115150004B CN115150004B CN202210769530.7A CN202210769530A CN115150004B CN 115150004 B CN115150004 B CN 115150004B CN 202210769530 A CN202210769530 A CN 202210769530A CN 115150004 B CN115150004 B CN 115150004B
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- data storage
- narrow pulse
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- 238000013500 data storage Methods 0.000 claims abstract description 22
- 238000004891 communication Methods 0.000 claims abstract description 21
- 230000002457 bidirectional effect Effects 0.000 claims abstract description 3
- 230000005540 biological transmission Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/50—Transmitters
- H04B10/508—Pulse generation, e.g. generation of solitons
Abstract
The invention provides a narrow pulse generator, which comprises a communication module, a waveform data storage module, a waveform playing module and a high-speed output interface module, wherein the communication module is connected with the waveform data storage module and is in bidirectional connection with the waveform playing module, the waveform data storage module is connected with the waveform playing module, the waveform playing module is connected with the high-speed output interface module, and the narrow pulse generator establishes data communication with an upper computer through the communication module. The invention outputs the narrow pulse signal through the high-speed output interface module, the narrowest pulse width and time precision are irrelevant to the clock period, and are only relevant to the transmission rate of the high-speed output interface module, meanwhile, in order to increase the dynamic range, the invention saves the storage space when combining the coding design and outputs the wide pulse signal, and the sequence length is not limited.
Description
Technical Field
The invention relates to the technical field of pulse generators, in particular to a narrow pulse generator.
Background
The existing high-precision pulse signal generation is realized by adjusting the signal edge position. Although the method can realize high precision, the shortest pulse width is limited, and the method can not output narrow pulse signals.
Disclosure of Invention
Aiming at the problem that the existing pulse signal generation technology cannot output a narrow pulse signal, the invention provides a narrow pulse generator.
The narrow pulse generator comprises a communication module, a waveform data storage module, a waveform playing module and a high-speed output interface module, wherein the communication module is connected with the waveform data storage module and is in bidirectional connection with the waveform playing module;
when the narrow pulse generator is in a waveform storage mode, the upper computer encodes a waveform and packages the waveform encoding according to a communication protocol rule, the waveform encoding is input into the waveform data storage module through the communication module, and the waveform data storage module stores the waveform encoding according to an address in a data packet sent by the upper computer;
when the narrow pulse generator is in a waveform playing mode, the upper computer sends a playing command to the waveform playing module through the communication module, the waveform playing module reads waveform codes from the waveform data storage module according to a playing address in the playing command, performs corresponding decoding according to a coding rule, and outputs a target waveform through the high-speed output interface module.
Further, the waveform data storage module checks whether the waveform codes are compliant before storing the waveforms, and only stores the compliant waveform codes.
Further, the waveform encoding rule is: each group of 16-bit data is a group, and when the highest bit [15] =0 and the next highest bit [14] =0, continuous high level is indicated; when the highest bit [15] =0 and the next highest bit [14] =1, the continuous low level exists, and the continuous level duration bit [13:0] is determined by the numerical value, wherein the unit is 8ns; when the highest bit [15] =1, the data represented by bit [7:0] is directly output.
The invention outputs the narrow pulse signal through the high-speed output interface module, the narrowest pulse width and time precision are irrelevant to the clock period, and are only relevant to the transmission rate of the high-speed output interface module, meanwhile, in order to increase the dynamic range, the invention saves the storage space when combining the coding design and outputs the wide pulse signal, and the sequence length is not limited.
Drawings
FIG. 1 is a block diagram of a narrow pulse generator;
fig. 2 is an exemplary waveform diagram of embodiment 1.
Detailed Description
The invention will be described in further detail with reference to the drawings and the detailed description. The embodiments of the invention have been presented for purposes of illustration and description, and are not intended to be exhaustive or limited to the invention in the form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, and to enable others of ordinary skill in the art to understand the invention for various embodiments with various modifications as are suited to the particular use contemplated.
Example 1
The utility model provides a narrow pulse generator, as shown in fig. 1, includes communication module, waveform data storage module, waveform play module and high-speed output interface module, communication module connects waveform data storage module, and two-way connection waveform play module, waveform data storage module connects waveform play module, waveform play module connects high-speed output interface module, narrow pulse generator passes through communication module and upper computer establish data communication.
When the narrow pulse generator is in a waveform storage mode, the upper computer encodes the waveform and packages the waveform encoding according to the communication protocol rule, the waveform encoding is input into the waveform data storage module through the communication module, and the waveform data storage module stores the waveform encoding according to the address in the data packet sent by the upper computer.
When the narrow pulse generator is in a waveform playing mode, the upper computer sends a playing command to the waveform playing module through the communication module, the waveform playing module reads waveform codes from the waveform data storage module according to a playing address in the playing command, performs corresponding decoding according to a coding rule, and outputs a target waveform through the high-speed output interface module.
The waveform data storage module checks whether the waveform codes are compliant before waveform storage, and only stores the compliant waveform codes.
The waveform encoding rule is not unique, and one of the waveform encoding rules is given in this embodiment: each set of 16-bit data is one set. When the highest bit [15] =0, the next highest bit [14] =0, indicating that there is a continuous high level; when the highest bit [15] =0 and the next highest bit [14] =1, the continuous low level exists, and the continuous level duration bit [13:0] is determined by the numerical value, wherein the unit is 8ns; when the highest bit [15] =1, the data represented by bit [7:0] is directly output.
Taking the waveform shown in fig. 2 as an example, where data is the waveform code sent by the host computer, and signal is the target waveform output by the high-speed output interface module.
The first complete 16-bit data is 0001 (0000,0000,0000,0001), the highest bit [15] =0, the next highest bit [14] =0, and the bit [13:0] has a value of 1, and the output waveform is 1 high of 8 ns.
The second complete 16-bit data is 8055 (1000,0000,0101,0101), the most significant bit [15] =1, and the data 01010101 represented by bit [7:0] is directly output.
It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art and which are included in the embodiments of the present invention without the inventive step, are intended to be within the scope of the present invention. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art and which are included in the embodiments of the present invention without the inventive step, are intended to be within the scope of the present invention.
Claims (3)
1. The narrow pulse generator is characterized by comprising a communication module, a waveform data storage module, a waveform playing module and a high-speed output interface module, wherein the communication module is connected with the waveform data storage module and is in bidirectional connection with the waveform playing module;
when the narrow pulse generator is in a waveform storage mode, the upper computer encodes a waveform and packages the waveform encoding according to a communication protocol rule, the waveform encoding is input into the waveform data storage module through the communication module, and the waveform data storage module stores the waveform encoding according to an address in a data packet sent by the upper computer;
when the narrow pulse generator is in a waveform playing mode, the upper computer sends a playing command to the waveform playing module through the communication module, the waveform playing module reads waveform codes from the waveform data storage module according to a playing address in the playing command, performs corresponding decoding according to a coding rule, and outputs a target waveform through the high-speed output interface module.
2. The narrow pulse generator of claim 1, wherein the waveform data storage module checks whether the waveform codes are compliant prior to waveform storage, and only stores compliant waveform codes.
3. The narrow pulse generator of claim 1 or 2, wherein the waveform encoding rule is: each group of 16-bit data is a group, and when the highest bit [15] =0 and the next highest bit [14] =0, continuous high level is indicated; when the highest bit [15] =0 and the next highest bit [14] =1, the continuous low level exists, and the continuous level duration bit [13:0] is determined by the numerical value, wherein the unit is 8ns; when the highest bit [15] =1, the data represented by bit [7:0] is directly output.
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CN202210769530.7A CN115150004B (en) | 2022-07-01 | 2022-07-01 | Narrow pulse generator |
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CN202210769530.7A CN115150004B (en) | 2022-07-01 | 2022-07-01 | Narrow pulse generator |
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CN115150004B true CN115150004B (en) | 2024-02-13 |
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010288122A (en) * | 2009-06-12 | 2010-12-24 | National Institute Of Advanced Industrial Science & Technology | Method for transmitting high speed serial signal, and modulator, demodulator |
CN103488244A (en) * | 2013-09-09 | 2014-01-01 | 中国电子科技集团公司第四十一研究所 | Arbitrary waveform generation system and method |
CN105718404A (en) * | 2016-01-18 | 2016-06-29 | 中国科学技术大学 | Square-wave generator and generating method based on FPGA |
CN106301296A (en) * | 2015-06-26 | 2017-01-04 | 飞思卡尔半导体公司 | Two-integrator impulse wave reshaper equipment, system and method |
CN108769572A (en) * | 2018-04-26 | 2018-11-06 | 国政通科技股份有限公司 | Monitor video file generated, device and terminal device |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7250784B2 (en) * | 2005-06-29 | 2007-07-31 | Marvell International Ltd. | Integrated systems testing |
TWI330563B (en) * | 2007-11-28 | 2010-09-21 | Ind Tech Res Inst | Programmable laser device and method for controlling the same |
US9203391B2 (en) * | 2014-04-22 | 2015-12-01 | Qualcomm Incorporated | Pulse-width modulation data decoder |
US10733126B2 (en) * | 2016-01-18 | 2020-08-04 | University Of Science And Technology Of China | FPGA-based square-wave generator and square-wave generation method |
CN111965405B (en) * | 2020-08-12 | 2021-08-13 | 电子科技大学 | Digital three-dimensional oscilloscope data mapping storage system based on FPGA |
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2022
- 2022-07-01 CN CN202210769530.7A patent/CN115150004B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010288122A (en) * | 2009-06-12 | 2010-12-24 | National Institute Of Advanced Industrial Science & Technology | Method for transmitting high speed serial signal, and modulator, demodulator |
CN103488244A (en) * | 2013-09-09 | 2014-01-01 | 中国电子科技集团公司第四十一研究所 | Arbitrary waveform generation system and method |
CN106301296A (en) * | 2015-06-26 | 2017-01-04 | 飞思卡尔半导体公司 | Two-integrator impulse wave reshaper equipment, system and method |
CN105718404A (en) * | 2016-01-18 | 2016-06-29 | 中国科学技术大学 | Square-wave generator and generating method based on FPGA |
CN108769572A (en) * | 2018-04-26 | 2018-11-06 | 国政通科技股份有限公司 | Monitor video file generated, device and terminal device |
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