CN115150004B - Narrow pulse generator - Google Patents

Narrow pulse generator Download PDF

Info

Publication number
CN115150004B
CN115150004B CN202210769530.7A CN202210769530A CN115150004B CN 115150004 B CN115150004 B CN 115150004B CN 202210769530 A CN202210769530 A CN 202210769530A CN 115150004 B CN115150004 B CN 115150004B
Authority
CN
China
Prior art keywords
waveform
module
playing
data storage
narrow pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202210769530.7A
Other languages
Chinese (zh)
Other versions
CN115150004A (en
Inventor
黄斌
吴亚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Guoyi Quantum Technology Hefei Co ltd
Original Assignee
Guoyi Quantum Technology Hefei Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Guoyi Quantum Technology Hefei Co ltd filed Critical Guoyi Quantum Technology Hefei Co ltd
Priority to CN202210769530.7A priority Critical patent/CN115150004B/en
Publication of CN115150004A publication Critical patent/CN115150004A/en
Application granted granted Critical
Publication of CN115150004B publication Critical patent/CN115150004B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B10/00Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
    • H04B10/50Transmitters
    • H04B10/508Pulse generation, e.g. generation of solitons

Abstract

The invention provides a narrow pulse generator, which comprises a communication module, a waveform data storage module, a waveform playing module and a high-speed output interface module, wherein the communication module is connected with the waveform data storage module and is in bidirectional connection with the waveform playing module, the waveform data storage module is connected with the waveform playing module, the waveform playing module is connected with the high-speed output interface module, and the narrow pulse generator establishes data communication with an upper computer through the communication module. The invention outputs the narrow pulse signal through the high-speed output interface module, the narrowest pulse width and time precision are irrelevant to the clock period, and are only relevant to the transmission rate of the high-speed output interface module, meanwhile, in order to increase the dynamic range, the invention saves the storage space when combining the coding design and outputs the wide pulse signal, and the sequence length is not limited.

Description

Narrow pulse generator
Technical Field
The invention relates to the technical field of pulse generators, in particular to a narrow pulse generator.
Background
The existing high-precision pulse signal generation is realized by adjusting the signal edge position. Although the method can realize high precision, the shortest pulse width is limited, and the method can not output narrow pulse signals.
Disclosure of Invention
Aiming at the problem that the existing pulse signal generation technology cannot output a narrow pulse signal, the invention provides a narrow pulse generator.
The narrow pulse generator comprises a communication module, a waveform data storage module, a waveform playing module and a high-speed output interface module, wherein the communication module is connected with the waveform data storage module and is in bidirectional connection with the waveform playing module;
when the narrow pulse generator is in a waveform storage mode, the upper computer encodes a waveform and packages the waveform encoding according to a communication protocol rule, the waveform encoding is input into the waveform data storage module through the communication module, and the waveform data storage module stores the waveform encoding according to an address in a data packet sent by the upper computer;
when the narrow pulse generator is in a waveform playing mode, the upper computer sends a playing command to the waveform playing module through the communication module, the waveform playing module reads waveform codes from the waveform data storage module according to a playing address in the playing command, performs corresponding decoding according to a coding rule, and outputs a target waveform through the high-speed output interface module.
Further, the waveform data storage module checks whether the waveform codes are compliant before storing the waveforms, and only stores the compliant waveform codes.
Further, the waveform encoding rule is: each group of 16-bit data is a group, and when the highest bit [15] =0 and the next highest bit [14] =0, continuous high level is indicated; when the highest bit [15] =0 and the next highest bit [14] =1, the continuous low level exists, and the continuous level duration bit [13:0] is determined by the numerical value, wherein the unit is 8ns; when the highest bit [15] =1, the data represented by bit [7:0] is directly output.
The invention outputs the narrow pulse signal through the high-speed output interface module, the narrowest pulse width and time precision are irrelevant to the clock period, and are only relevant to the transmission rate of the high-speed output interface module, meanwhile, in order to increase the dynamic range, the invention saves the storage space when combining the coding design and outputs the wide pulse signal, and the sequence length is not limited.
Drawings
FIG. 1 is a block diagram of a narrow pulse generator;
fig. 2 is an exemplary waveform diagram of embodiment 1.
Detailed Description
The invention will be described in further detail with reference to the drawings and the detailed description. The embodiments of the invention have been presented for purposes of illustration and description, and are not intended to be exhaustive or limited to the invention in the form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, and to enable others of ordinary skill in the art to understand the invention for various embodiments with various modifications as are suited to the particular use contemplated.
Example 1
The utility model provides a narrow pulse generator, as shown in fig. 1, includes communication module, waveform data storage module, waveform play module and high-speed output interface module, communication module connects waveform data storage module, and two-way connection waveform play module, waveform data storage module connects waveform play module, waveform play module connects high-speed output interface module, narrow pulse generator passes through communication module and upper computer establish data communication.
When the narrow pulse generator is in a waveform storage mode, the upper computer encodes the waveform and packages the waveform encoding according to the communication protocol rule, the waveform encoding is input into the waveform data storage module through the communication module, and the waveform data storage module stores the waveform encoding according to the address in the data packet sent by the upper computer.
When the narrow pulse generator is in a waveform playing mode, the upper computer sends a playing command to the waveform playing module through the communication module, the waveform playing module reads waveform codes from the waveform data storage module according to a playing address in the playing command, performs corresponding decoding according to a coding rule, and outputs a target waveform through the high-speed output interface module.
The waveform data storage module checks whether the waveform codes are compliant before waveform storage, and only stores the compliant waveform codes.
The waveform encoding rule is not unique, and one of the waveform encoding rules is given in this embodiment: each set of 16-bit data is one set. When the highest bit [15] =0, the next highest bit [14] =0, indicating that there is a continuous high level; when the highest bit [15] =0 and the next highest bit [14] =1, the continuous low level exists, and the continuous level duration bit [13:0] is determined by the numerical value, wherein the unit is 8ns; when the highest bit [15] =1, the data represented by bit [7:0] is directly output.
Taking the waveform shown in fig. 2 as an example, where data is the waveform code sent by the host computer, and signal is the target waveform output by the high-speed output interface module.
The first complete 16-bit data is 0001 (0000,0000,0000,0001), the highest bit [15] =0, the next highest bit [14] =0, and the bit [13:0] has a value of 1, and the output waveform is 1 high of 8 ns.
The second complete 16-bit data is 8055 (1000,0000,0101,0101), the most significant bit [15] =1, and the data 01010101 represented by bit [7:0] is directly output.
It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art and which are included in the embodiments of the present invention without the inventive step, are intended to be within the scope of the present invention. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art and which are included in the embodiments of the present invention without the inventive step, are intended to be within the scope of the present invention.

Claims (3)

1. The narrow pulse generator is characterized by comprising a communication module, a waveform data storage module, a waveform playing module and a high-speed output interface module, wherein the communication module is connected with the waveform data storage module and is in bidirectional connection with the waveform playing module;
when the narrow pulse generator is in a waveform storage mode, the upper computer encodes a waveform and packages the waveform encoding according to a communication protocol rule, the waveform encoding is input into the waveform data storage module through the communication module, and the waveform data storage module stores the waveform encoding according to an address in a data packet sent by the upper computer;
when the narrow pulse generator is in a waveform playing mode, the upper computer sends a playing command to the waveform playing module through the communication module, the waveform playing module reads waveform codes from the waveform data storage module according to a playing address in the playing command, performs corresponding decoding according to a coding rule, and outputs a target waveform through the high-speed output interface module.
2. The narrow pulse generator of claim 1, wherein the waveform data storage module checks whether the waveform codes are compliant prior to waveform storage, and only stores compliant waveform codes.
3. The narrow pulse generator of claim 1 or 2, wherein the waveform encoding rule is: each group of 16-bit data is a group, and when the highest bit [15] =0 and the next highest bit [14] =0, continuous high level is indicated; when the highest bit [15] =0 and the next highest bit [14] =1, the continuous low level exists, and the continuous level duration bit [13:0] is determined by the numerical value, wherein the unit is 8ns; when the highest bit [15] =1, the data represented by bit [7:0] is directly output.
CN202210769530.7A 2022-07-01 2022-07-01 Narrow pulse generator Active CN115150004B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210769530.7A CN115150004B (en) 2022-07-01 2022-07-01 Narrow pulse generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210769530.7A CN115150004B (en) 2022-07-01 2022-07-01 Narrow pulse generator

Publications (2)

Publication Number Publication Date
CN115150004A CN115150004A (en) 2022-10-04
CN115150004B true CN115150004B (en) 2024-02-13

Family

ID=83409334

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210769530.7A Active CN115150004B (en) 2022-07-01 2022-07-01 Narrow pulse generator

Country Status (1)

Country Link
CN (1) CN115150004B (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010288122A (en) * 2009-06-12 2010-12-24 National Institute Of Advanced Industrial Science & Technology Method for transmitting high speed serial signal, and modulator, demodulator
CN103488244A (en) * 2013-09-09 2014-01-01 中国电子科技集团公司第四十一研究所 Arbitrary waveform generation system and method
CN105718404A (en) * 2016-01-18 2016-06-29 中国科学技术大学 Square-wave generator and generating method based on FPGA
CN106301296A (en) * 2015-06-26 2017-01-04 飞思卡尔半导体公司 Two-integrator impulse wave reshaper equipment, system and method
CN108769572A (en) * 2018-04-26 2018-11-06 国政通科技股份有限公司 Monitor video file generated, device and terminal device

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7250784B2 (en) * 2005-06-29 2007-07-31 Marvell International Ltd. Integrated systems testing
TWI330563B (en) * 2007-11-28 2010-09-21 Ind Tech Res Inst Programmable laser device and method for controlling the same
US9203391B2 (en) * 2014-04-22 2015-12-01 Qualcomm Incorporated Pulse-width modulation data decoder
US10733126B2 (en) * 2016-01-18 2020-08-04 University Of Science And Technology Of China FPGA-based square-wave generator and square-wave generation method
CN111965405B (en) * 2020-08-12 2021-08-13 电子科技大学 Digital three-dimensional oscilloscope data mapping storage system based on FPGA

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010288122A (en) * 2009-06-12 2010-12-24 National Institute Of Advanced Industrial Science & Technology Method for transmitting high speed serial signal, and modulator, demodulator
CN103488244A (en) * 2013-09-09 2014-01-01 中国电子科技集团公司第四十一研究所 Arbitrary waveform generation system and method
CN106301296A (en) * 2015-06-26 2017-01-04 飞思卡尔半导体公司 Two-integrator impulse wave reshaper equipment, system and method
CN105718404A (en) * 2016-01-18 2016-06-29 中国科学技术大学 Square-wave generator and generating method based on FPGA
CN108769572A (en) * 2018-04-26 2018-11-06 国政通科技股份有限公司 Monitor video file generated, device and terminal device

Also Published As

Publication number Publication date
CN115150004A (en) 2022-10-04

Similar Documents

Publication Publication Date Title
US7995696B1 (en) System and method for deskewing data transmitted through data lanes
CA2126598C (en) Waveform shaping method and equipment
CN111339003B (en) Universal multichannel data transmission system and method based on FPGA
US7493423B2 (en) Data transfer control device and electronic instrument
CN105306062A (en) Encoding and storing method and device for infrared data, and decoding method
CN115150004B (en) Narrow pulse generator
CN115549773B (en) Bidirectional data isolator with dynamic communication
US7986251B2 (en) Input/output (IO) interface and method of transmitting IO data
US4647925A (en) Circuit employing intercoupled state machines for transmitting and receiving multiformatted sequences of voice and data characters
JPH1065545A (en) Binary counter read circuit
CN201918981U (en) Dual-phase harvard code bus signal coding-decoding circuit
CN114756498A (en) Chip, master control chip, chip communication method, chip array and related equipment
CN112306919A (en) Data alignment method, device, equipment and medium based on FPGA
CN102457431B (en) Cell transmission method and device
CN107222218B (en) Parallel data generation circuit and method and electronic equipment
CN101556572A (en) Interface control circuit
CN113760795B (en) Asynchronous FIFO memory read-write control method, device and equipment
KR102414408B1 (en) Control integrated circuit for heterogeneous serial communication protocol and system control apparatus including same
CN110086472B (en) Digital timer topological structure and control method thereof
CN112036196A (en) Encoding module suitable for ISO14443 protocol reader
US20220163936A1 (en) Serial isolation communication method, device and system
CN112953475B (en) Multi-bit data clock domain crossing synchronization circuit
CN110515419B (en) Device for realizing clock domain crossing by optimizing Gray code encoding mode
CN110489373B (en) Serial isolation communication method, device and system
CN117193473A (en) Data interaction method, system, terminal and storage medium for ignoring clock error

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
CB02 Change of applicant information

Address after: 1-4 / F, zone a, 3-4 / F, zone B, E2 building, phase II, innovation industrial park, 2800 innovation Avenue, high tech Zone, Hefei City, Anhui Province, 230000

Applicant after: Guoyi Quantum Technology (Hefei) Co.,Ltd.

Address before: 4th Floor, Block B, Building E2, Phase 2, Innovation Industrial Park, High-tech Zone, Hefei City, Anhui Province, 230088

Applicant before: Guoyi Quantum (Hefei) Technology Co.,Ltd.

CB02 Change of applicant information
GR01 Patent grant
GR01 Patent grant