CN115148834B

CN115148834B - Solar cell and photovoltaic module

Info

Publication number: CN115148834B
Application number: CN202110351174.2A
Authority: CN
Inventors: 童洪波; 张洪超; 李华; 刘继宇
Original assignee: Taizhou Longi Solar Technology Co Ltd
Current assignee: Taizhou Longi Solar Technology Co Ltd
Priority date: 2021-03-31
Filing date: 2021-03-31
Publication date: 2023-09-15
Anticipated expiration: 2041-03-31
Also published as: CN115148834A

Abstract

The application provides a solar cell and a photovoltaic module, and relates to the technical field of solar photovoltaics. The solar cell includes: a semiconductor substrate, and a main gate electrode and a thin gate electrode electroplated on the semiconductor substrate; the main gate electrode extends along a first direction of the surface of the semiconductor substrate, the thin gate electrode extends along a second direction of the surface of the semiconductor substrate, and the first direction is not parallel to the second direction; the cross section of the main gate electrode and the cross section of the thin gate electrode are both mushroom-shaped. In the application, the cross sections of the main gate electrode and the thin gate electrode are of mushroom-shaped structures, so that when the main gate electrode and the thin gate electrode are connected with each other to realize current convergence, the main gate electrode and the thin gate electrode are prevented from being connected with each other to form right-angle contact, thereby improving the connection reliability between the electrodes, reducing the current density of the connection part and improving the efficiency of the solar cell.

Description

Solar cell and photovoltaic module

Technical Field

The application relates to the technical field of solar photovoltaics, in particular to a solar cell and a photovoltaic module.

Background

The crystalline silicon solar cell has high energy conversion efficiency, and is the solar cell with the highest market share at present.

At present, a large-scale silicon solar cell manufacturing technology is generally adopted to prepare a metal grid electrode of a silicon solar cell in a screen printing mode, namely, metal electrode slurry is printed on the surface of a silicon substrate in a screen printing mode, a main grid electrode and a thin grid electrode which are mutually connected are prepared on the silicon substrate after sintering, and the solar cell is obtained, wherein the thin grid electrode is mainly used for collecting current generated in the silicon substrate and transmitting the collected current to the main grid electrode connected with the thin grid electrode, the main grid electrode is mainly used for converging the current collected by each thin grid electrode, and the main grid electrode and the thin grid electrode which are prepared in the screen printing mode are generally rectangular in shape.

However, in the course of transmitting current, the portion where the main gate electrode and the thin gate electrode having a rectangular structure are connected to each other belongs to a right angle contact, which may generate a stress concentration and a current concentration phenomenon, resulting in a decrease in connection reliability between the electrodes, and at the same time, an increase in current density may cause an increase in resistance, thereby decreasing efficiency of the solar cell.

Disclosure of Invention

The invention provides a solar cell and a photovoltaic module, which aim to solve the problems of reduced connection reliability between electrodes and reduced efficiency of the solar cell caused by right-angle contact formed by connecting a main gate electrode and a thin gate electrode in the solar cell.

In a first aspect, embodiments of the present invention provide a solar cell, the solar cell comprising:

a semiconductor substrate, and a main gate electrode and a fine gate electrode electroplated on a backlight surface and/or a light-facing surface of the semiconductor substrate;

the main gate electrode extends along a first direction of the surface of the semiconductor substrate, the thin gate electrode extends along a second direction of the surface of the semiconductor substrate, and the first direction is not parallel to the second direction;

the cross section of the main gate electrode and the cross section of the thin gate electrode are both mushroom-shaped.

Optionally, the mushroom-like structure comprises a mushroom stem portion and a mushroom umbrella portion connected to each other;

the mushroom handle part is of a rectangular structure, the mushroom handle part is connected with the semiconductor substrate, the mushroom handle part is of an arc structure, and the mushroom handle part is arranged on one side of the mushroom handle part far away from the semiconductor substrate.

Optionally, the curvature of the mushroom umbrella portion of the main gate electrode is greater than the curvature of the mushroom umbrella portion of the thin gate electrode.

Optionally, the main gate electrode includes a plurality of first main gate electrode subsections and a plurality of second main gate electrode subsections;

The first main gate electrode subsections are arranged in a punctiform structure, and a plurality of the first main gate electrode subsections are arranged at intervals along the first direction;

the second main gate electrode subsection is arranged in a strip-shaped structure, extends along the first direction, and two ends of the second main gate electrode subsection are connected with two adjacent first main gate electrode subsections;

the dimension of the second main gate electrode subsection in a third direction perpendicular to the surface of the semiconductor substrate is equal to the dimension of the first main gate electrode subsection in the third direction, and the dimension of the second main gate electrode subsection in the second direction is smaller than the dimension of the first main gate electrode subsection in the second direction.

Optionally, the main gate electrode further comprises a third main gate electrode subsection;

the third main gate electrode subsection is arranged in a strip-shaped structure, and the third main gate electrode subsection extends along the second direction;

one end of the third main gate electrode subsection is connected with the first main gate electrode subsection or the second main gate electrode subsection, and the other end of the third electrode subsection is connected with the thin gate electrode;

the third main gate electrode subsection has a dimension in the third direction equal to a dimension of the first main gate electrode subsection in the third direction, the third main gate electrode subsection has a dimension in the first direction smaller than a dimension of the second main gate electrode subsection in the second direction, and the third main gate electrode subsection has a dimension in the first direction larger than the dimension of the thin gate electrode.

Optionally, the dimension of the third main gate electrode subsection in the first direction gradually decreases in a direction away from the first main gate electrode subsection or the second main gate electrode subsection.

Optionally, the curvature of the mushroom umbrella portion of the second main gate electrode subsection is smaller than the curvature of the mushroom umbrella portion of the first main gate electrode subsection.

Optionally, the shape of the first main gate electrode subsection is any one of a circle, a rectangle, an ellipse, a ring and an irregular pattern, and the area of the first main gate electrode subsection is 0.1-10 square millimeters.

Optionally, the main gate electrode includes a coating electrode subsection and a plating electrode subsection;

the coating electrode subsection is used as a mushroom handle part of the main gate electrode, and the electroplating electrode subsection is used as a mushroom umbrella part of the main gate electrode;

the coating electrode part is an electrode part prepared by a coating technology, and the electroplating electrode part is an electrode part prepared by electroplating, wherein at least part of the coating electrode part is electrically connected with electroplating equipment when electroplating is performed.

Optionally, the thickness of the coating electrode subsection is 5-30 microns, and the thickness of the electroplating electrode subsection is 1-15 microns.

Optionally, the electroplated electrode subsection includes a first main gate metal electrode layer, a second main gate metal electrode layer, and a third main gate metal electrode layer;

the first main gate metal electrode layer is arranged on one surface of the coating electrode subsection, which is far away from the semiconductor substrate, the second main gate metal electrode layer is arranged on one surface of the first main gate metal electrode layer, which is far away from the coating electrode subsection, and the third main gate metal electrode layer is arranged on one surface of the second main gate metal electrode layer, which is far away from the first main gate metal electrode layer;

the first main gate metal electrode layer contains nickel, tungsten, titanium or cobalt, the second main gate metal electrode layer comprises an alloy component formed by aluminum, copper, silver and gold and/or an alloy component formed by nickel, tungsten, titanium and cobalt, and the third main gate metal electrode layer comprises tin or silver.

Optionally, the thickness of the second main gate metal electrode layer is greater than the sum of the thicknesses of the first main gate metal electrode layer and the third main gate metal electrode layer;

the thickness of the first main gate metal electrode layer is 1-3 micrometers, the thickness of the second main gate metal electrode layer is 5-10 micrometers, and the thickness of the third main gate metal electrode layer is 1-5 micrometers.

Optionally, the solar cell further includes: a passivation layer;

the passivation layer is arranged on the backlight surface and/or the light-facing surface of the semiconductor substrate;

the passivation layer is provided with a main gate opening structure and a fine gate opening structure, a mushroom stem part of the main gate electrode is arranged in the main gate opening structure and is connected with the semiconductor substrate, and a mushroom stem part of the main gate electrode is arranged at one side of the mushroom stem part far away from the semiconductor substrate, extends out of the passivation layer and covers one side of the passivation layer far away from the semiconductor substrate;

the mushroom stem part of the fine gate electrode is arranged in the fine gate opening structure and is connected with the semiconductor substrate, the mushroom stem part of the fine gate electrode is arranged on one side of the mushroom stem part far away from the semiconductor substrate, extends out of the passivation layer and covers one side of the passivation layer far away from the semiconductor substrate.

In a second aspect, an embodiment of the present application provides a photovoltaic module, where the photovoltaic module includes any one of the solar cells described above.

Based on the solar cell and the photovoltaic module, the application has the following beneficial effects: in the solar cell, the cross sections of the main gate electrode and the thin gate electrode are of mushroom structures, so that when the main gate electrode and the thin gate electrode are connected with each other to realize current convergence, the main gate electrode and the thin gate electrode can be prevented from being connected with each other to form right-angle contact, the connection reliability between the electrodes is improved, the current density of a connection part is reduced, in addition, the contact area of the main gate electrode and the thin gate electrode can be increased, the current density of the connection part is further reduced, and the efficiency of the solar cell is improved.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the description of the embodiments of the present invention will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 shows a schematic structure of a solar cell according to an embodiment of the present invention;

FIG. 2 shows a cross-sectional view of a solar cell in the E-E direction in an embodiment of the invention;

FIG. 3 shows a cross-sectional view of a solar cell in the D-D direction in an embodiment of the invention;

fig. 4 shows a schematic structural diagram of another solar cell in an embodiment of the present invention;

FIG. 5 is a flow chart showing steps of a method for fabricating a solar cell in an embodiment of the invention;

FIG. 6 shows a schematic structural diagram of a solar cell precursor in an embodiment of the invention;

FIG. 7 is a flow chart showing steps of another method for fabricating a solar cell in an embodiment of the invention;

FIG. 8 shows a resulting piece diagram of a first thin gate electrode in an embodiment of the invention;

FIG. 9 shows a resulting piece diagram of a second thin gate electrode in an embodiment of the invention;

fig. 10 shows a resulting piece diagram of a third thin gate electrode in an embodiment of the invention.

Description of the drawings:

10-semiconductor substrate, 20-main gate electrode, 21-first main gate electrode subsection, 22-second main gate electrode subsection, 23-third main gate electrode subsection, 24-coating electrode subsection, 241-contact, 242-coating metal layer, 25-plating electrode subsection, 251-first main gate metal electrode layer, 252-second main gate metal electrode layer, 253-third main gate metal electrode layer, 30-fine gate electrode, 31-first fine gate metal electrode layer, 32-second fine gate metal electrode layer, 33-third fine gate metal electrode layer, 40-passivation layer, 50-main gate plating region, 60-fine gate plating region.

Detailed Description

The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.

The following describes in detail a solar cell and a photovoltaic module provided by the present invention by listing several specific examples.

Fig. 1 shows a schematic structural diagram of a solar cell according to an embodiment of the present invention, and referring to fig. 1, the solar cell may include: a semiconductor substrate 10, and a main gate electrode 20 and a thin gate electrode 30 electroplated on the back and/or light facing surface of said semiconductor substrate 10.

The main gate electrode 20 extends along a first direction a on the surface of the semiconductor substrate 10, and the thin gate electrode 30 extends along a second direction B on the surface of the semiconductor substrate 10, wherein the first direction is not parallel to the second direction, so that the main gate electrode 20 and the thin gate electrode 30 are connected to each other.

Specifically, the semiconductor substrate 10 may be made of monocrystalline silicon or polycrystalline silicon, and the surface of the semiconductor substrate 10 may have a textured structure with a regular or irregular shape, so as to scatter incident light and reduce the amount of light reflected from the surface of the solar cell, thereby increasing the radiation collecting effect of the solar cell. After the solar rays are irradiated on the semiconductor substrate 10, a current may be generated on the semiconductor substrate 10 by a photovoltaic effect, and the thin gate electrode 30 disposed on the light facing surface and/or the back surface of the semiconductor substrate 10 may collect the current generated on the semiconductor substrate 10 and concentrate the current to the main gate electrode 20 through the interconnection of the thin gate electrode 30 and the main gate electrode 20, thereby completing the collection and concentration of the current of the solar cell.

Fig. 2 shows a cross-sectional view of a solar cell in an E-E direction, as shown in fig. 2, where the cross-sectional shape of a main gate electrode is in a mushroom structure, fig. 3 shows a cross-sectional view of a solar cell in a D-D direction, as shown in fig. 3, where the cross-sectional shape of a thin gate electrode is also in a mushroom structure, so that when the main gate electrode and the thin gate electrode are connected to each other to achieve current convergence, it is possible to avoid the main gate electrode 20 and the thin gate electrode 30 being connected to each other to form a right angle contact, and reduce stress concentration and current concentration at a portion where the main gate electrode 20 and the thin gate electrode 30 are connected to each other, thereby improving connection reliability between the electrodes and reducing current density at a connection portion; in addition, under the condition that the surface area of the solar cell and the number of the main gate electrode and the thin gate electrode are unchanged, the contact area of the main gate electrode and the thin gate electrode can be increased, and the current density of a connecting part is further reduced, so that the efficiency of the solar cell is improved.

In an embodiment of the present application, a solar cell includes: a semiconductor substrate, and a main gate electrode and a fine gate electrode plated on a backlight surface and/or a light-facing surface of the semiconductor substrate; the main gate electrode extends along a first direction of the surface of the semiconductor substrate, the thin gate electrode extends along a second direction of the surface of the semiconductor substrate, and the first direction is not parallel to the second direction; the cross section of the main gate electrode and the cross section of the thin gate electrode are both mushroom-shaped. In the solar cell, the cross sections of the main gate electrode and the thin gate electrode are of mushroom structures, so that when the main gate electrode and the thin gate electrode are connected with each other to realize current convergence, the main gate electrode and the thin gate electrode can be prevented from being connected with each other to form right-angle contact, the connection reliability between the electrodes is improved, the current density of a connection part is reduced, in addition, the contact area of the main gate electrode and the thin gate electrode can be increased, the current density of the connection part is further reduced, and the efficiency of the solar cell is improved.

Alternatively, referring to fig. 2 and 3, the mushroom structure may include a mushroom stem portion and a mushroom umbrella portion connected to each other.

The mushroom handle portion can be of a rectangular structure and connected with the semiconductor substrate, the mushroom umbrella portion can be of an arc structure and is arranged on one side, far away from the semiconductor substrate, of the mushroom handle portion.

In the embodiment of the invention, if the surface of the semiconductor substrate is provided with the passivation layer, the main gate electrode and the thin gate electrode of the mushroom-shaped structure can be arranged in the passivation layer in a penetrating way, one end of the main gate electrode and one end of the thin gate electrode are in contact with the semiconductor substrate, and the other end of the main gate electrode and one end of the thin gate electrode extend out of the surface of the passivation layer.

In addition, the height of the mushroom handle part and the curvature of the mushroom umbrella part in the mushroom-shaped structure can be adjusted to change the structures of the main gate electrode and the thin gate electrode and adjust the structure of the connection part of the main gate electrode and the thin gate electrode, so that the connection reliability between the electrodes is further improved, and the current density of the connection part is reduced.

Alternatively, the curvature of the mushroom portion of the main gate electrode may be greater than the curvature of the mushroom portion of the thin gate electrode.

Specifically, since the thin gate electrode mainly serves to collect the current generated on the semiconductor substrate, the number of thin gate electrodes distributed on the surface of the semiconductor substrate is large, but the transmitted current is small. Correspondingly, a smaller curvature can be arranged for the mushroom umbrella part of the thin gate electrode, so that the mushroom umbrella part of the thin gate electrode is steeper, the area of the cross section of the mushroom umbrella part is smaller, the shielding of the thin gate electrode to solar rays is reduced, the incident solar rays are absorbed by the solar cell again after being reflected for many times on the surface of the mushroom umbrella part of the thin gate electrode, and the light utilization rate of the solar cell can be improved. The main grid electrodes are mainly used for converging the current collected by each thin grid electrode and are connected with the connecting wires so as to realize the connection of the adjacent solar cells, so that the number of the main grid electrodes is small, and the transmitted current is large. Correspondingly, a larger curvature can be arranged for the mushroom umbrella part of the main gate electrode, so that the mushroom umbrella part of the main gate electrode is more gentle, the area of the cross section of the mushroom umbrella part is larger, the current density in the main gate electrode is reduced, the contact area of connecting wires such as a main gate electrode and a welding strip is increased, the welding strength between the main gate electrode and the connecting wires is improved, and the connection reliability between adjacent solar cells is ensured.

Alternatively, referring to fig. 1, the main gate electrode 20 may include a plurality of first main gate electrode subsections 21 and a plurality of second main gate electrode subsections 22.

The first main gate electrode segments 21 may be arranged in a dot structure, the plurality of first main gate electrode segments 21 are arranged at intervals along the first direction a, the second main gate electrode segments 22 may be arranged in a strip structure, the second main gate electrode segments 22 extend along the first direction a of the surface of the semiconductor substrate 10, two ends of the second main gate electrode segments 22 are connected with two adjacent first main gate electrode segments 21, and a dimension of the second main gate electrode segments 22 in a third direction C perpendicular to the surface of the semiconductor substrate 10 is equal to a dimension of the first main gate electrode segments 21 in the third direction C, and a dimension of the second main gate electrode segments 22 in the second direction B of the surface of the semiconductor substrate 10 is smaller than a dimension of the first main gate electrode segments 21 in the second direction B of the surface of the semiconductor substrate 10.

In the embodiment of the present invention, the dimension, i.e., the width, of the main gate electrode 20 along the second direction B is not uniform, but the width of the first main gate electrode subsection 21 is larger than the width of the second main gate electrode subsection 22, so that when the main gate electrode 20 is welded with the connecting wire, the contact area between the first main gate electrode subsection 21 with the larger width and the connecting wire is larger, thereby ensuring the welding strength between the main gate electrode 20 and the connecting wire, and the second main gate electrode subsection 22 with the smaller width is mainly used for conducting the adjacent first main gate electrode subsection 21, thereby reducing the consumption of conductive paste used for preparing electrodes in the solar cell and reducing the production cost of the solar cell.

Wherein the dimension, i.e. the width, of the first main gate electrode subsection 21 in the second direction may be equal to 3-10 times the width of the second main gate electrode subsection 22. For example, the width of the first main gate electrode subsection 21 may be 0.5-1.5 mm, the width of the second main gate electrode subsection 22 may be 0.1-0.5 mm, the dimensions of the first main gate electrode subsection 21 and the second main gate electrode subsection 22 in the third direction C, i.e., the height may be 5-35 microns, and the height of the fine gate electrode 30 may be 5-15 microns.

Alternatively, the curvature of the mushroom portion of the second main gate electrode section 22 may be smaller than the curvature of the mushroom portion of the first main gate electrode section 21. The mushroom umbrella part of the first main gate electrode subsection 21 is made more gentle so as to increase the contact area of the main gate electrode and the connecting lines such as the welding strip, and improve the welding strength between the main gate electrode and the connecting lines, thereby ensuring the connection reliability between the adjacent solar cells.

Further, the curvature of the mushroom umbrella portion of the third main gate electrode section 23 may be smaller than the curvature of the mushroom umbrella portion of the second main gate electrode section 22. The mushroom umbrella part of the third main grid electrode subsection 23 is gentler and steeper, so that the shielding of the third main grid electrode subsection 23 to solar rays is reduced, and the light utilization rate of the solar cell is improved.

Alternatively, the main gate electrode may further include a third main gate electrode segment, fig. 4 shows a schematic structural diagram of another solar cell in the embodiment of the present invention, and as shown in fig. 4, the third main gate electrode segment 23 may be disposed in a strip structure, the third main gate electrode segment 23 is disposed to extend along the second direction B of the surface of the semiconductor substrate 10, and one end of the third main gate electrode segment 23 is connected to the first main gate electrode segment 21 or the second main gate electrode segment 22, and the other end of the third main gate electrode segment 23 is connected to the thin gate electrode 30, wherein the dimension of the third main gate electrode segment 23 in the third direction C, that is, the height is equal to the dimension of the first main gate electrode segment 21 in the third direction C.

In the embodiment of the present invention, since one end of the third main gate electrode subsection 23 is connected to the first main gate electrode subsection 21 or the second main gate electrode subsection 22, and the other end of the third main gate electrode subsection 23 is connected to the thin gate electrode 30, the third main gate electrode subsection 23 can achieve the purpose of isolating the thin gate electrode 30, and avoid the contact of the connecting wire with the thin gate electrode 30, thereby avoiding the thin gate electrode from being disconnected by welding. Since the height of the third main gate electrode segment 23 is equal to the height of the first main gate electrode segment 21, the volume of the third main gate electrode segment 23 that takes over the contact of the fine gate electrode 30 with the connection line increases compared to the volume of the fine gate electrode 30, so that the connection reliability with the connection line can be improved.

In addition, the third main gate electrode part 23 may have a smaller size in the first direction a than the second main gate electrode part 22 in the second direction B, so that it is possible to avoid the use of excessive conductive paste when preparing the main gate electrode 20, and at the same time, the third main gate electrode part 23 may have a larger size in the first direction a than the thin gate electrode 30, so that it is possible to ensure connection reliability between the third main gate electrode part 23 and the connection line when the third main gate electrode part 23 is in contact with the connection line.

Alternatively, referring to fig. 4, the dimension, i.e., the width, of the third main gate electrode subsection 23 in the first direction a gradually decreases in a direction away from the first main gate electrode subsection 21 or the second main gate electrode subsection 22. Since the third main gate electrode part 23 is less likely to contact the connection line in a direction away from the first main gate electrode part 21 or the second main gate electrode part 22, a portion of the third main gate electrode part 23 close to the first main gate electrode part 21 or the second main gate electrode part 22 may be provided with a larger width to improve connection reliability between the third main gate electrode part 23 and the connection line, and a portion of the third main gate electrode part 23 away from the first main gate electrode part 21 or the second main gate electrode part 22 may be provided with a smaller width to save conductive paste.

In an embodiment of the present invention, the ratio of the width of the wide portion to the narrow portion of the third main gate electrode section 23 may be greater than 2. The third main gate electrode subsection 23 may be discontinuously disposed between the first main gate electrode subsection 21 or the second main gate electrode subsection 22 and the thin gate electrode 30.

Optionally, the shape of the first main gate electrode subsection may include: the area of the first main gate electrode segment may be 0.1-10 square millimeters in any one of a circle, a rectangle, an ellipse, a ring, and an irregular pattern.

For example, a first main gate electrode segment of rectangular configuration may be provided, and the first main gate electrode segment may have a size of 1.2 mm×1 mm, 0.7 mm×0.8 mm, or 1 mm×0.5 mm.

In the embodiment of the invention, the size of the first main gate electrode subsection in the first direction a, or the area of the first main gate electrode subsection, can be determined according to practical situations, if the size is too long or the area is too large, the cost of the solar cell is increased, if the length is too short or the area is too small, the welding strength between the first main gate electrode subsection and the connecting line is reduced, the connection reliability between the first main gate electrode subsection and the connecting line is reduced, and the desoldering of the first main gate electrode subsection is easy to cause, so that the proper length or area can be determined by combining the cost and the welding strength.

In the embodiment of the invention, the number of the first main gate electrode branches in the main gate electrode can be determined by combining the cost and the welding strength, if the number of the first main gate electrode branches in the main gate electrode is too large, the cost of the solar cell is increased, if the number of the first main gate electrode branches in the main gate electrode is too small, the welding strength between the first main gate electrode branches and the connecting line is reduced, the connection reliability between the first main gate electrode branches and the connecting line is reduced, and the unwelding of the first main gate electrode branches is easily caused. Preferably, 6-10 first main gate electrode branches may be disposed in one main gate electrode, adjacent first main gate electrode branches are connected by a second main gate electrode branch, and the dimension of the first main gate electrode branch along the first direction is smaller than the dimension of the second main gate electrode branch along the first direction.

In addition, because the tensile force between the first main gate electrode subsection and the connecting line at the edge of the solar cell is larger when the first main gate electrode subsection is welded with the connecting line, when a plurality of first main gate electrode subsections are arranged in one main gate electrode, the first main gate electrode subsection can be uniformly arranged along the first direction, the first main gate electrode subsection with higher density can also be arranged at the edge of the solar cell, the first main gate electrode subsection with smaller density is arranged at the middle part of the solar cell, namely, the distance between the first main gate electrode subsections is gradually reduced from the central position to the edge position in the solar cell, so that the binding force between the first main gate electrode subsection and the connecting line at the position with larger tensile force is increased, and the connection reliability between the first main gate electrode subsection and the connecting line is improved.

Alternatively, the main gate electrode may include a coating electrode section and a plating electrode section.

Referring to fig. 2, the main gate electrode 20 includes a coating electrode part 24 and a plating electrode part 25, wherein the coating electrode part 24 may serve as a mushroom portion of the main gate electrode 20, and the plating electrode part 25 may serve as a mushroom portion of the main gate electrode 20.

Specifically, the coating electrode subsection 24 is an electrode subsection prepared by a coating technology, and the electroplating electrode subsection 25 is an electrode subsection prepared by electroplating, wherein at least part of the coating electrode subsection 24 is electrically connected with electroplating equipment when electroplating is performed. Therefore, in the preparation of the solar cell, the coated electrode segment 24 serving as the mushroom stem portion of the main gate electrode 20 is first prepared on the surface of the semiconductor substrate 10 by a coating technique, and then at least part of the coated electrode segment 24 is electrically connected with electroplating equipment, so that the electroplated electrode segment 25 serving as the mushroom umbrella portion of the main gate electrode 20 is prepared by electroplating on the surface of the coated electrode segment 24 away from the semiconductor substrate 10. Wherein the electroplating process is a process of depositing in an acidic plating solution.

Alternatively, the dimension of the coated electrode sections 24 in the third direction C, i.e. the height, may be 5-30 micrometers, the height of the plated electrode sections 25 may be 1-15 micrometers, and preferably the height of the plated electrode sections 25 may be 5-10 micrometers.

Referring to fig. 1, the thickness of the solar cell may be 175 micrometers, and the dimensions of the solar cell in both the first direction a and the second direction B are 166 millimeters. On the light-facing surface and/or the back surface of the solar cell, 4 sets of main gate electrodes 20 are provided at an equal pitch of 39 mm, and the main gate electrodes 20 are provided so as to extend in the first direction a. Each set of main gate electrodes 20 has a width of 1 mm and a length of 155 mm, and the main gate electrodes 20 may include a first main gate electrode subsection 21 and a second main gate electrode subsection 22, wherein the first main gate electrode subsection 21 from the head to the tail of each main gate electrode 20 may be located at an edge portion of the solar cell. Meanwhile, thin gate electrodes 30 having a width of 30-100 micrometers, a length of 154 millimeters, and a height of 10-20 micrometers are disposed on the light facing surface and/or the light backing surface of the solar cell, and the thin gate electrodes 30 are disposed to extend in the second direction B, so that the main gate electrodes vertically intersect the thin gate electrodes, 78-155 thin gate electrodes 30 are disposed in the solar cell, the thin gate electrodes 30 are disposed at equal intervals of 1-2 millimeters, and the interval between adjacent thin gate electrodes 30 may be 6 millimeters.

The structures and positions of the main gate electrode and the thin gate electrode in the light-facing surface and the light-receiving surface of the solar cell may be identical to each other.

Alternatively, referring to fig. 2, the plating electrode segment 25 may have a multi-layered structure including a first main gate metal electrode layer 251, a second main gate metal electrode layer 252, and a third main gate metal electrode layer 253, each of which may have an arc-shaped structure.

Specifically, the first main gate metal electrode layer 251, the second main gate metal electrode layer 252 and the third main gate metal electrode layer 253 are sequentially disposed on one surface of the semiconductor substrate, the first main gate metal electrode layer 251 is disposed on one surface of the coating electrode section 24 far away from the semiconductor substrate 10, the second main gate metal electrode layer 252 is disposed on one surface of the first main gate metal electrode layer 251 far away from the coating electrode section 24, and the third main gate metal electrode layer 253 is disposed on one surface of the second main gate metal electrode layer 252 far away from the first main gate metal electrode layer 251.

In addition, the first main gate metal electrode layer may contain nickel, tungsten, titanium or cobalt, and may form a low-resistance metal silicide at an interface with a semiconductor substrate or a conductive layer (e.g., a doped polysilicon layer) through an annealing heat treatment, thereby improving ohmic contact performance; the second main gate metal electrode layer may include an alloy composition of aluminum, copper, silver, gold and/or an alloy composition of nickel, tungsten, titanium, cobalt, and thus have a low resistance (e.g., lower resistance than the first main gate metal electrode layer), so that it may function to improve electrical characteristics; the third main gate metal electrode layer is a portion connected to the connection line, and thus, the third main gate metal electrode layer may include tin or silver, so that the third main gate metal electrode layer has excellent solderability, thereby enhancing a soldering strength between it and the connection line.

Accordingly, referring to fig. 3, the thin gate electrode 30 may include only electrode segments prepared by electroplating, and the thin gate electrode segments may be prepared by electroplating thin gate electroplating regions on the surface of the semiconductor substrate 10 by electrically connecting at least part of the coated electrode segments 24 with electroplating equipment after the coated electrode segments 24 as the stem portions of the main gate electrode 20 are prepared by coating technology on the surface of the semiconductor substrate 10. Wherein the area of the cross section of the thin gate electrode may be less than or equal to 300 square microns.

Further, the thin gate electrode 30 may also be a multi-layer structure including a first thin gate metal electrode layer 31, a second thin gate metal electrode layer 32, and a third thin gate metal electrode layer 33.

Specifically, the first fine gate metal electrode layer 31, the second fine gate metal electrode layer 32 and the third fine gate metal electrode layer 33 are sequentially disposed on one surface of the semiconductor substrate, the first fine gate metal electrode layer 31 is disposed on the surface of the semiconductor substrate 10, the second fine gate metal electrode layer 32 is disposed on one surface of the first fine gate metal electrode layer 31 far from the semiconductor substrate 10, and the third fine gate metal electrode layer 33 is disposed on one surface of the second fine gate metal electrode layer 32 far from the first fine gate metal electrode layer 31, wherein the second fine gate metal electrode layer 32 and the third fine gate metal electrode layer 33 may be disposed in an arc structure.

In addition, the first fine gate metal electrode layer and the composition may be the same as the composition of the first main gate metal electrode layer, the second fine gate metal electrode layer and the composition may be the same as the composition of the second main gate metal electrode layer, and the third fine gate metal electrode layer and the composition may be the same as the composition of the third main gate metal electrode layer.

Alternatively, the thickness of the second main gate metal electrode layer may be greater than the sum of the thicknesses of the first main gate metal electrode layer and the third main gate metal electrode layer, for example, the thickness of the first main gate metal electrode layer is 1 to 3 micrometers, the thickness of the second main gate metal electrode layer is 5 to 10 micrometers, and the thickness of the third main gate metal electrode layer is 1 to 5 micrometers.

Alternatively, referring to fig. 2 and 3, the solar cell may further include a passivation layer 40. The passivation layer 40 may be disposed on the back surface and/or the light facing surface of the semiconductor substrate 10 at the same time.

Specifically, the passivation layer 40 is provided with a main gate opening structure and a fine gate opening structure, and the main gate opening structure and the fine gate opening structure may form an opening structure penetrating or not penetrating the passivation layer 40 in the passivation layer 40 by wet etching or laser ablation or other techniques.

In the embodiment of the present invention, a main gate opening structure and a fine gate opening structure penetrating the passivation layer 40 may be formed in the passivation layer 40, so that the main gate electrode 20 may be directly disposed in the main gate opening structure, and the fine gate electrode 30 may be directly disposed in the fine gate opening structure; an unperforated main gate opening structure and a perforated fine gate opening structure may also be formed in the passivation layer 40, so that a conductive paste (such as aluminum paste) having a burn-through shape may be coated in the unperforated main gate opening structure first, and during the firing process to obtain the coated electrode segment 24, the conductive paste may burn through the unperforated main gate opening structure, thereby exposing the semiconductor substrate 10 at the bottom of the passivation layer 40, so that the finally obtained main gate electrode 20 may still be electrically connected to the semiconductor substrate 10, and during this process, damage to the semiconductor substrate 10 when wet etching or laser ablation techniques such as laser ablation form the perforated opening structure in the passivation layer 40 may be reduced.

The mushroom stem portion of the main gate electrode 20 is disposed in the main gate opening structure and is connected to the semiconductor substrate 10, the mushroom stem portion of the main gate electrode 20 is disposed at a side of the mushroom stem portion away from the semiconductor substrate 10, extends out of the passivation layer 40, and covers a side of the passivation layer 40 away from the semiconductor substrate. Therefore, the mushroom umbrella portion of the main gate electrode 20 can cover the surface of the passivation layer 40 to increase the contact area between the main gate electrode 20 and the solar cell, reduce the possibility of peeling the main gate electrode 20 from the solar cell, and improve the structural reliability of the solar cell.

Accordingly, the mushroom stem portion of the thin gate electrode 30 is disposed in the thin gate opening structure and connected to the semiconductor substrate 10, and the mushroom stem portion of the thin gate electrode 30 is disposed on a side of the mushroom stem portion away from the semiconductor substrate 10, extends out of the passivation layer 40, and covers a side of the passivation layer 40 away from the semiconductor substrate 10. Therefore, the mushroom umbrella portion of the thin gate electrode 30 can cover the surface of the passivation layer 40, so as to increase the contact area between the thin gate electrode 30 and the solar cell, reduce the possibility of stripping the thin gate electrode 30 from the solar cell, and improve the structural reliability of the solar cell.

In the embodiment of the invention, different passivation layers can be respectively prepared on the light-facing surface and the backlight surface of the semiconductor substrate, for example, the passivation layer containing silicon oxide and silicon nitride can be prepared on the light-facing surface of the semiconductor substrate, and the passivation layer containing aluminum oxide and silicon nitride can be prepared on the backlight surface of the semiconductor substrate, so that the passivation effect of the light-facing surface of the solar cell is improved, and the conversion efficiency of the solar cell is improved.

In the embodiment of the invention, the height of the main gate electrode 20 can be 5-35 micrometers, the height of the thin gate electrode 30 can be 5-15 micrometers, the thickness of the passivation layer 40 can be 50-150 nanometers, and the volumes of the mushroom umbrella parts of the main gate electrode 20 and the thin gate electrode 30 of the mushroom-shaped structure are far greater than the volumes of the mushroom handle parts filled in the main gate opening structure and the thin gate opening structure, so that the cross section of the main gate electrode 20 and the thin gate electrode 30 is mainly embodied as the mushroom umbrella parts, and the circular arc structure of the mushroom umbrella parts can prevent the main gate electrode 20 and the thin gate electrode 30 which are connected with each other from directly forming more right-angle contacts, thereby reducing the current density of the connecting part.

Optionally, the solar cell may further include a conductive layer, where the conductive layer may be disposed on a light-facing surface and a backlight surface of the semiconductor substrate at the same time, and when the fine gate opening structure and the main gate opening structure are through structures, the conductive layer located at the bottom of the passivation layer is exposed, so that the main gate electrode and the fine gate electrode can be in contact with the conductive layer.

In the embodiment of the present invention, the conductive layer may be formed by depositing a dopant in the semiconductor substrate through a conventional doping process, or may be prepared through a Chemical Vapor Deposition (CVD) process, low Pressure CVD (LPCVD), normal pressure CVD (APCVD), plasma Enhanced CVD (PECVD), thermal growth or sputtering, etc.

In addition, the embodiment of the application further provides a method for preparing a solar cell, fig. 5 shows a step flowchart of the method for preparing a solar cell provided by the embodiment of the application, and referring to fig. 5, the method may include the following steps:

Step 101, determining a main gate electroplating area and a fine gate electroplating area on a light facing surface and/or a backlight surface of a semiconductor substrate, wherein the main gate electroplating area extends along a first direction of the surface of the semiconductor substrate, the fine gate electroplating area extends along a second direction of the surface of the semiconductor substrate, and the first direction is not parallel to the second direction.

In this step, after the semiconductor substrate for manufacturing the solar cell is obtained, a main gate plating region for manufacturing the main gate electrode and a fine gate plating region for manufacturing the fine gate electrode may be determined in the light-facing surface and/or the back-facing surface of the semiconductor substrate.

Fig. 9 shows a schematic structural diagram of a solar cell precursor provided in an embodiment of the present invention, referring to fig. 9, the solar cell precursor may be a precursor of a solar cell obtained after a semiconductor substrate 10 is pretreated and before an electroplating process, a main gate electroplating region 50 is disposed to extend along a first direction a of a surface of the semiconductor substrate 10, during a subsequent electroplating process, the main gate electroplating region 50 in the semiconductor substrate 10 is used to form a main gate electrode, a fine gate electroplating region 60 is disposed to extend along a second direction B of the surface of the semiconductor substrate 10, and during a subsequent electroplating process, the fine gate electroplating region 60 in the semiconductor substrate 10 is used to form a fine gate electrode. Because the first direction A is not parallel to the second direction B, the prepared main gate electrode and the thin gate electrode can be connected with each other, so that the collection and convergence of the current in the solar cell are completed.

The semiconductor substrate may be a silicon substrate having a carrier separation function, for example, the semiconductor substrate may include a monocrystalline silicon wafer or a polycrystalline silicon wafer having a first conductivity type, and accordingly, a first conductive layer and a second conductive layer may be disposed on a light-facing surface and a backlight surface of the semiconductor substrate, respectively, the first conductive layer and the second conductive layer having the first conductivity type and the second conductivity type, respectively, so that when solar rays are irradiated on the monocrystalline silicon wafer or the polycrystalline silicon wafer, electron-hole pairs including electrons and holes are generated in the monocrystalline silicon wafer or the polycrystalline silicon wafer due to a photovoltaic effect, and further, the first conductive layer and the second conductive layer having the first conductivity type and the second conductivity type have electron selectivity and hole selectivity, respectively, so that the electron-hole pairs in the monocrystalline silicon wafer or the polycrystalline silicon wafer may be separated, so that electrodes located on the light-facing surface and the backlight surface of the semiconductor substrate may collect and guide out the carriers having different charges, thereby converting the light energy into electric energy.

In the embodiment of the present invention, the monocrystalline silicon wafer or the polycrystalline silicon wafer having the first conductivity type may be an n-type silicon substrate, that is, the doping type of the monocrystalline silicon wafer or the polycrystalline silicon wafer is n-type doping, and the corresponding dopant may include any one or more of phosphorus element (P), arsenic element (As), bismuth element (Bi) and antimony element (Sb) in the group V element; the silicon substrate may also be a p-type silicon substrate, that is, the doping type of the monocrystalline silicon wafer or the polycrystalline silicon wafer is p-type doping, and the corresponding dopant may include any one or more of boron element (B), aluminum element (Al), gallium element (Ga) and indium element (In) In the group III element.

Correspondingly, the main gate electroplating region and the fine gate electroplating region are arranged on the conductive layer on the surface of the semiconductor substrate.

And 102, preparing a main gate electrode in the main gate electroplating area, and preparing a fine gate electrode in the fine gate electroplating area to obtain the solar cell, wherein the shape of the cross section of the main gate electrode and the shape of the cross section of the fine gate electrode are both mushroom-shaped structures.

In this step, a main gate electrode may be prepared in a main gate plating region on a semiconductor substrate, a thin gate electrode may be prepared in a thin gate plating region on the semiconductor substrate, and the shape of the cross section of the main gate electrode and the shape of the cross section of the thin gate electrode may be made to be mushroom-like structures.

As shown in fig. 2 and 3, the cross sections of the main gate electrode 20 and the thin gate electrode 30 are in mushroom structures, so that when the main gate electrode 20 and the thin gate electrode 30 are connected with each other to realize current convergence, the main gate electrode 20 and the thin gate electrode 30 can be prevented from being connected with each other to form right-angle contact, the stress concentration and the current concentration at the position where the main gate electrode 20 and the thin gate electrode 30 are connected with each other are reduced, the connection reliability between the electrodes is improved, and the current density at the connection position is reduced; in addition, under the condition that the surface area of the solar cell and the number of the main gate electrode and the thin gate electrode are unchanged, the contact area of the main gate electrode and the thin gate electrode can be increased, and the current density of a connecting part is further reduced, so that the efficiency of the solar cell is improved.

In the embodiment of the application, the main gate electrode can be prepared by combining a coating technology and an electroplating technology, and the thin gate electrode is prepared by the electroplating technology. Compared with the traditional technology of forming the electrode of the solar cell by screen printing and sintering silver paste, the method can be used for electroplating the low-cost metal layer to serve as the electrode of the solar cell, so that the use of noble metal silver materials is greatly reduced, and the manufacturing cost of the solar cell is obviously reduced.

Specifically, in the process of preparing the main gate electrode and the thin gate electrode by electroplating, a direct current electroplating method or a pulse electroplating method or a method combining direct current electroplating and pulse electroplating is adopted, and the pulse electroplating is beneficial to plating, so that short-time pulse electroplating can be performed first and then direct current electroplating can be performed. The frequency in the pulse plating process can be 5-200 Hz, the duty ratio is 50-95%, and the pulse plating time is 10-50 seconds. The ratio of the anode plating area to the cathode plating area during plating may be 1.5, 3, or 4.5.

In the embodiment of the application, the to-be-plated battery piece, such as the solar cell precursor, can be electrified first and then placed in the electroplating tank for electroplating, or the to-be-plated battery piece can be placed in the electroplating tank first and then electrified. In an embodiment of the application, a method for manufacturing a solar cell includes: determining a main gate electroplating area and a fine gate electroplating area on a light-facing surface and/or a backlight surface of the semiconductor substrate, wherein the main gate electroplating area extends along a first direction of the surface of the semiconductor substrate, and the fine gate electroplating area extends along a second direction of the surface of the semiconductor substrate, and the first direction is not parallel to the second direction; preparing a main gate electrode in a main gate electroplating area, and preparing a fine gate electrode in a fine gate electroplating area to obtain a solar cell; wherein, the cross section of the main gate electrode and the cross section of the fine gate electrode are both mushroom-shaped structures. In the solar cell, the cross sections of the main gate electrode and the thin gate electrode are of mushroom structures, so that when the main gate electrode and the thin gate electrode are connected with each other to realize current convergence, the main gate electrode and the thin gate electrode can be prevented from being connected with each other to form right-angle contact, the connection reliability between the electrodes is improved, the current density of a connection part is reduced, in addition, the contact area of the main gate electrode and the thin gate electrode can be increased, the current density of the connection part is further reduced, and the efficiency of the solar cell is improved.

Fig. 7 shows a step flowchart of another method for manufacturing a solar cell according to an embodiment of the present invention, and referring to fig. 7, the method may include the following steps:

step 201, determining a main gate electroplating area and a fine gate electroplating area on a light facing surface and/or a backlight surface of a semiconductor substrate.

In this step, after the semiconductor substrate is obtained, the main gate plating region and the fine gate plating region may be determined on the light facing surface and/or the backlight surface of the semiconductor substrate.

In addition, a passivation layer may be prepared on a light-facing surface and/or a backlight surface of the semiconductor substrate to improve light absorption characteristics of the solar cell, and a main gate opening structure and a fine gate opening structure may be disposed in the passivation layer.

The position of the main gate opening structure corresponds to the main gate electroplating area on the surface of the semiconductor substrate, the position of the fine gate opening structure corresponds to the fine gate electroplating area on the surface of the semiconductor substrate, and the main gate opening structure and the fine gate opening structure can form an opening structure penetrating or not penetrating through the passivation layer in the passivation layer through wet etching, laser ablation or other technologies, so that the main gate electrode finally prepared is arranged in the main gate opening structure, and the fine gate electrode is arranged in the fine gate opening structure.

Specifically, the fine gate opening structure may expose a fine gate electroplating region on the semiconductor substrate, that is, the fine gate opening structure penetrates through the passivation layer, and the depth of the fine gate opening structure is equal to the thickness of the passivation layer. The depth of the main gate opening structure may be smaller than or equal to the thickness of the passivation layer, and the position of the main gate opening structure corresponds to the position of the main gate electroplating region, i.e., the main gate opening structure may or may not penetrate through the passivation layer.

Step 202, preparing a coated electrode subsection in the main grid electroplating area, wherein at least part of the coated electrode subsection is used for being electrically connected with electroplating equipment during electroplating.

Referring to fig. 2, the main gate electrode 20 may include a coating electrode part 24 and a plating electrode part 25.

In this step, therefore, a coated electrode subsection may first be prepared in the main gate plating region, at least part of which is used for electrical connection to the plating equipment during plating.

Specifically, a metal electrode paste may be printed on the bottom of the main gate opening structure of the passivation layer to prepare a coated electrode segment. For example, the coated electrode segments may be prepared by printing silver paste on the bottom of the main gate opening structure and sintering at a temperature in the range of 750-850 degrees celsius for 2 minutes.

In the embodiment of the invention, if the main gate opening structure penetrates through the passivation layer, the metal electrode paste is directly printed in the main gate opening structure to be in contact with the semiconductor substrate, namely, the metal electrode paste is printed on the surface of the semiconductor substrate; if the main gate opening structure does not penetrate through the passivation layer, the position, corresponding to the main gate electroplating region, in the passivation layer is provided with the main gate opening structure, and the bottom of the main gate opening structure is a part of the residual passivation layer, then the metal electrode paste is printed in the main gate opening structure to be in contact with the part of the residual passivation layer, namely, the metal electrode paste is printed on the surface of the part of the residual passivation layer.

Further, the metal electrode paste printed in the main gate opening structure may be sintered, thereby preparing the coated electrode segment.

Alternatively, the metal electrode paste may be an electrode paste including metal particles, and the metal particles may include: silver particles or aluminum particles.

Specifically, if the main gate opening structure penetrates through the passivation layer, that is, the metal electrode paste is directly printed in the main gate opening structure to be in contact with the semiconductor substrate, the metal electrode paste may be an electrode paste containing silver particles, so that the sintered coating electrode subsection is in contact with the semiconductor substrate; if the main gate opening structure does not penetrate the passivation layer, i.e., the metal electrode paste is printed on a part of the surface of the remaining passivation layer, the metal electrode paste may be an electrode paste containing aluminum particles, and the electrode paste containing aluminum particles can burn through the passivation layer, so that a coated electrode part contacting with the semiconductor substrate can be obtained after the metal electrode paste is sintered.

Step 203, electroplating the semiconductor substrate with the coating electrode subsection to form the thin gate electrode in the thin gate electroplating region, and forming the main gate electrode on the surface, far away from the semiconductor substrate, of the coating electrode subsection in the main gate electroplating region.

In this step, after the coated electrode segment is prepared in the main gate opening structure, the semiconductor substrate on which the coated electrode segment is formed may be further electroplated, and at least a portion of the coated electrode segment is electrically connected to an electroplating apparatus, so that a thin gate electrode is obtained by electroplating a metal layer in the thin gate opening structure (i.e., a thin gate electroplating region on the surface of the semiconductor substrate) by using the electroplating apparatus, and a main gate electrode is obtained by electroplating a metal layer on the coated electrode segment in the main gate opening structure, thereby finally obtaining the solar cell.

Compared with the traditional technology of forming the electrode of the solar cell by screen printing and sintering silver paste, the method can be used for electroplating the low-cost metal layer to serve as the electrode of the solar cell, so that the use of noble metal silver materials is greatly reduced, and the manufacturing cost of the solar cell is obviously reduced.

Alternatively, referring to fig. 6, the coated electrode section 24 may include an electrical contact 241 and a coated metal layer 242, the electrical contact 241 being located in a first section of the main gate plating region 50, the coated metal layer 242 being located in a second section of the main gate plating region 50, the first and second sections being connected to each other; wherein the electrical connection point is used for being electrically connected with electroplating equipment during electroplating.

The main gate plating region 50 may include a plurality of first and second partitions disposed at intervals, the first and second partitions together forming the main gate plating region 50 having a stripe structure, the first partition being coated with electrode paste and sintered to obtain a connection point 241 for electrically connecting with a plating apparatus, and the second partition being coated with electrode paste and sintered to obtain a coated metal layer 242.

Further, after the contact point 241 and the coating metal layer 242 are prepared in the main gate opening structure, the semiconductor substrate formed with the contact point 241 and the coating metal layer 242 may be further electroplated, and the contact point 241 may be electrically connected to an electroplating apparatus, so that the thin gate electrode may be obtained by electroplating a metal layer in the thin gate opening structure (i.e., a thin gate electroplating area on the surface of the semiconductor substrate) by the electroplating apparatus, the main gate electrode may be obtained by electroplating a metal layer on the contact point 241 and the coating metal layer 242 in the main gate opening structure, or the main gate electrode may be obtained by electroplating a metal layer on the coating metal layer 242 in the main gate opening structure, and finally the solar cell may be obtained.

In the embodiment of the invention, in the electroplating process, the electroplating current of the main gate electroplating region can be controlled to be larger than that of the thin gate electroplating region, so that the electrodeposition rate of the main gate electroplating region is faster, therefore, the thickness of the electroplating deposition metal layer on the main gate electroplating region is slightly larger than that of the electroplating deposition metal layer on the thin gate electroplating region, namely, the thickness of the main gate electrode is larger than that of the thin gate electrode, and therefore, when the main gate electrode and the connecting wire in the solar cell are welded to finish interconnection between adjacent solar cells, the contact between the connecting wire and the thin gate electrode can be effectively avoided, and the thin gate electrode is prevented from being welded and disconnected.

It should be noted that the solar cell and the corresponding portions of the preparation method of the solar cell may be referred to, and have the same or similar beneficial effects.

In addition, the embodiment of the invention also provides a photovoltaic module, which comprises any solar cell, wherein the two sides of the solar cell can be provided with packaging adhesive films, cover plates, back plates and the like. Has the same or similar beneficial effects as the solar cell.

In one embodiment of the invention, a battery piece with a passivation layer is subjected to laser film opening to form a main grid opening and a fine grid opening; then printing silver paste on the battery piece after film opening in the opening area, and sintering for 2 minutes at 800 ℃; then placing the sintered battery piece into a nickel plating tank (pH of plating solution is 5) at 50 ℃, wherein the area ratio of anode to cathode plating is 3, pulse plating is carried out for 50s, the pulse frequency is 60hz, and the duty ratio is 50%; the plating was then performed for 10 minutes at a current density of 50 milliamp/cm.

After nickel plating, the battery piece is cleaned, and then the battery piece is put into a copper plating tank (the pH of plating solution is 3) at 30 ℃, the area ratio of anode to cathode plating is 3, pulse plating is carried out for 50s, the pulse frequency is 60hz, and the duty ratio is 50%; the plating was then performed for 20 minutes at a current density of 60 milliamp/square centimeter.

After copper plating, the cell is cleaned, and then placed in a tin plating tank (pH of plating solution is 3) at 30 ℃, the area ratio of anode to cathode is 3, pulse plating is carried out for 50s, the pulse frequency is 60hz, and the duty ratio is 50%; the plating was then performed for 5 minutes at a current density of 30 milliamp/cm.

After the plating was completed, annealing was performed at 300℃for 5 minutes.

And carrying out electron microscope scanning on the obtained fine grids at different positions of the battery piece, and obtaining the result of the piece of fig. 8-10. As can be seen from fig. 8, 9 and 10, the cross section of the thin gate electrode prepared by electroplating in the embodiment of the present invention has a mushroom-shaped structure, and the thin gate electrode forms a multi-layer structure during electroplating.

The embodiments of the present invention have been described above with reference to the accompanying drawings, but the present invention is not limited to the above-described embodiments, which are merely illustrative and not restrictive, and many forms may be made by those having ordinary skill in the art without departing from the spirit of the present invention and the scope of the claims, which are to be protected by the present invention.

Claims

1. A solar cell, the solar cell comprising:

A semiconductor substrate, a main gate electrode on a backlight surface and/or a light-facing surface of the semiconductor substrate is prepared by combining a coating technology and an electroplating technology, and a thin gate electrode on the backlight surface and/or the light-facing surface of the semiconductor substrate is prepared by the electroplating technology;

the shape of the cross section of the main gate electrode and the shape of the cross section of the thin gate electrode are both mushroom-shaped structures;

the mushroom-shaped structure comprises a mushroom handle part and a mushroom umbrella part which are connected with each other;

the mushroom handle part is of a rectangular structure, the mushroom handle part is connected with the semiconductor substrate, the mushroom umbrella part is of an arc structure, and the mushroom umbrella part is arranged on one side of the mushroom handle part far away from the semiconductor substrate;

the curvature of the mushroom umbrella part of the main grid electrode is larger than that of the mushroom umbrella part of the thin grid electrode.

2. The solar cell of claim 1, wherein the main gate electrode comprises a plurality of first main gate electrode subdivisions and a plurality of second main gate electrode subdivisions;

3. The solar cell of claim 2, wherein the main gate electrode further comprises a third main gate electrode subsection;

one end of the third main gate electrode subsection is connected with the first main gate electrode subsection or the second main gate electrode subsection, and the other end of the third main gate electrode subsection is connected with the thin gate electrode;

4. A solar cell according to claim 3, wherein the dimension of the third main gate electrode subsection in the first direction decreases gradually in a direction away from the first main gate electrode subsection or the second main gate electrode subsection.

5. The solar cell according to claim 2, wherein,

the curvature of the mushroom umbrella portion of the second main gate electrode subsection is less than the curvature of the mushroom umbrella portion of the first main gate electrode subsection.

6. The solar cell of claim 2, wherein the first main gate electrode segment has any one of a circular shape, a rectangular shape, an elliptical shape, a circular shape, and an irregular pattern, and the area of the first main gate electrode segment is 0.1-10 square millimeters.

7. The solar cell of claim 6, wherein the main gate electrode comprises a coated electrode subsection and an electroplated electrode subsection;

8. The solar cell of claim 7, wherein the thickness of the coated electrode segments is 5-30 microns and the thickness of the plated electrode segments is 1-15 microns.

9. The solar cell of claim 7, wherein the plated electrode segment comprises a first main gate metal electrode layer, a second main gate metal electrode layer, and a third main gate metal electrode layer;

10. The solar cell of claim 9, wherein the thickness of the second main gate metal electrode layer is greater than the sum of the thicknesses of the first main gate metal electrode layer and the third main gate metal electrode layer;

11. The solar cell of claim 1, further comprising: a passivation layer;

12. A photovoltaic module comprising the solar cell of any one of claims 1-11.