CN115148609B - Heat dissipation type power module and preparation method thereof - Google Patents
Heat dissipation type power module and preparation method thereof Download PDFInfo
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- CN115148609B CN115148609B CN202211075633.XA CN202211075633A CN115148609B CN 115148609 B CN115148609 B CN 115148609B CN 202211075633 A CN202211075633 A CN 202211075633A CN 115148609 B CN115148609 B CN 115148609B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3736—Metallic materials
Abstract
The invention relates to a heat dissipation type power module and a preparation method thereof, relating to the field of semiconductor packaging, in order to improve the heat dissipation performance of the power module in the preparation process of the heat dissipation type power module, the width of a third groove can be effectively reduced by forming a first groove, a second groove positioned at the bottom of the first groove and a third groove positioned at the bottom of the second groove on the upper surface of a first power chip, and meanwhile, the second groove and the third groove are formed by utilizing a wet etching process, so that mechanical stress and thermal stress caused by laser cutting can be avoided, further, the damage to a functional core area of the power chip can be effectively avoided, and the third groove can be effectively filled up by spin-coating small-sized metal nanoparticles, so that the heat of the functional core area of the power chip can be conveniently led out.
Description
Technical Field
The invention relates to the field of semiconductor packaging, in particular to a heat dissipation type power module and a preparation method thereof.
Background
The power module is an advanced mixed integrated power component with an IGBT as an inner core, and consists of a high-speed low-power-consumption tube core, an optimized gate drive circuit and a quick protection circuit. The IGBT tube cores in the power module are all high-speed type, and the driving circuit is close to the IGBT, so that the driving time delay is small, and the power module is high in switching speed and small in loss. In addition, the power module also has the functions of interlocking of bridge arms and the pair of tubes, undervoltage protection of a driving power supply and the like. However, the heat dissipation capacity of the power module is large, and how to effectively dissipate heat of the power chip of the power module is a key for prolonging the service life of the power module.
Disclosure of Invention
The present invention is directed to overcome the above-mentioned deficiencies in the prior art, and to provide a heat dissipation type power module and a method for manufacturing the same.
In order to achieve the purpose, the invention adopts the technical scheme that:
a preparation method of a heat dissipation type power module comprises the following steps:
step (1): providing a first temporary carrier substrate on which a first power chip is disposed.
Step (2): and then coating a photoresist on the first temporary carrier substrate, and forming a first etching mask through an exposure and development process.
And (3): and then, etching the upper surface of the first power chip by using the first etching mask to form a plurality of first grooves arranged at intervals.
And (4): and then coating a photo-induced anti-etching agent in the first grooves, forming second etching masks through an exposure and development process, and etching the bottom surface of each first groove by using the second etching masks to form a second groove, wherein the ratio of the width of the second groove to the width of the first groove is 0.3-0.6.
And (5): and then coating photoresist in the first grooves and the second grooves, forming a third etching mask through an exposure and development process, and etching the bottom surface of each second groove by using the third etching mask to form a third groove, wherein the ratio of the width of the third groove to the width of the second groove is 0.2-0.4.
And (6): and then spin-coating a suspension of first-size metal nanoparticles on the first power chip, and then performing a drying process to form a first metal nanoparticle layer, so that the third trench is filled with the first metal nanoparticle layer.
And (7): and then spin-coating a suspension of second-sized metal nanoparticles on the first power chip, and then performing a drying process to form a second metal nanoparticle layer so that the second metal nanoparticle layer fills the second trench, wherein the particle size of the second-sized metal nanoparticles is larger than that of the first-sized metal nanoparticles.
And (8): and then spin-coating a suspension of third-sized metal nanoparticles on the first power chip, and then performing drying treatment to form a third metal nanoparticle layer, so that the third metal nanoparticle layer fills the first groove and covers the upper surface of the first power chip, wherein the particle size of the third-sized metal nanoparticles is larger than that of the second-sized metal nanoparticles.
And (9): and then forming an epoxy resin layer on the first temporary carrier substrate, wherein the epoxy resin layer only wraps the side surface of the first power chip, and then removing the first temporary carrier substrate to form a first power chip sub-module.
Step (10): and then providing a circuit board, arranging a plurality of first power chip sub-modules on the circuit board, forming an encapsulation layer to wrap the first power chip sub-modules, and then providing a heat dissipation member, wherein the lower surface of the heat dissipation member is provided with a plurality of protrusions, and the heat dissipation member is pressed on the upper surfaces of the first power chip sub-modules in a pressing mode, so that the protrusions are respectively embedded into the third metal nanoparticle layer in the first groove.
In a more preferable technical solution, in the step (3), the first trenches are formed through a wet etching process or a dry etching process, and a distance between adjacent first trenches is greater than a width of the first trenches.
In a more preferable technical solution, in the step (4), the second trench is formed by a wet etching process, and a ratio of a width of the second trench to a width of the first trench is 0.4 to 0.5.
In a more preferable technical solution, in the step (5), the third trench is formed by a wet etching process, and a ratio of a width of the third trench to a width of the second trench is 0.25 to 0.35.
In a more preferred embodiment, the material of the first-size metal nanoparticles, the second-size metal nanoparticles, and the third-size metal nanoparticles is one or two or more of gold, silver, copper, cobalt, nickel, and titanium.
In a more preferred embodiment, the first-size metal nanoparticles have a particle size of 10 to 60 nm, the second-size metal nanoparticles have a particle size of 90 to 200 nm, and the third-size metal nanoparticles have a particle size of 300 to 500 nm.
In a more preferable technical solution, the package layer includes epoxy resin, and the heat dissipation member is made of copper or aluminum.
In a more preferred solution, the protrusions are formed by an etching process or a mechanical cutting process.
In a more preferable technical scheme, the invention further provides a heat dissipation type power module which is formed by adopting the preparation method.
Compared with the prior art, the heat dissipation type power module and the preparation method thereof have the following beneficial effects:
in the preparation process of the heat dissipation type power module, the first groove, the second groove positioned at the bottom of the first groove and the third groove positioned at the bottom of the second groove are formed on the upper surface of the first power chip, so that the width of the third groove can be effectively reduced, and meanwhile, the second groove and the third groove are formed by utilizing a wet etching process, so that mechanical stress and thermal stress caused by laser cutting can be avoided, and further, the functional core area of the power chip can be effectively prevented from being damaged.
The third groove is small in size and in a slit shape, so that when a conventional electroplating process or metal nanoparticles with conventional sizes are used for spin coating filling, the third groove cannot be effectively filled, and holes are easy to appear.
Furthermore, the lower surface of the heat dissipation piece is provided with a plurality of protrusions, and the heat dissipation piece is pressed on the upper surface of the plurality of first power chip sub-modules, so that the protrusions are respectively embedded into the third metal nanoparticle layer in the first groove, the joint strength of the heat dissipation piece is improved, and the heat dissipation efficiency is improved.
Drawings
Fig. 1 is a schematic structural diagram of steps (1) to (3) executed in the process of manufacturing the heat dissipation type power module according to the present invention;
FIG. 2 is a schematic structural diagram illustrating the step (4) executed in the process of manufacturing the heat dissipation type power module according to the present invention;
FIG. 3 is a schematic structural diagram illustrating step (5) performed in the process of manufacturing the heat dissipation type power module according to the present invention;
fig. 4 is a schematic structural diagram of step (6) executed in the process of manufacturing the heat dissipation type power module according to the present invention;
FIG. 5 is a schematic structural diagram illustrating step (7) performed in the process of manufacturing the heat dissipation type power module according to the present invention;
FIG. 6 is a schematic structural diagram illustrating step (8) performed in the process of manufacturing the heat dissipation type power module according to the present invention;
fig. 7 is a schematic structural diagram illustrating step (9) performed in the process of manufacturing the heat dissipation type power module according to the present invention;
fig. 8 is a schematic structural diagram of step (10) executed in the process of manufacturing the heat dissipation type power module of the present invention.
Description of reference numerals:
100. a first temporary carrier substrate; 101. a first power chip; 102. a first etching mask; 103. a first trench; 104. a second etching mask; 105. a second trench; 106. a third etch mask; 107. a third trench; 108. a first layer of metal nanoparticles; 109. a second layer of metal nanoparticles; 110. a third layer of metal nanoparticles; 111. an epoxy resin layer; 112. a first power chip sub-module; 113. a circuit board; 114. a packaging layer; 115. a heat sink.
Detailed Description
For better understanding of the technical solutions of the present invention, the following detailed descriptions of the embodiments of the present invention are provided with reference to the accompanying drawings. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention provides a preparation method of a heat dissipation type power module, which comprises the following steps:
step (1): providing a first temporary carrier substrate on which a first power chip is disposed.
Step (2): and then coating a photoresist on the first temporary carrier substrate, and forming a first etching mask through an exposure and development process.
And (3): and then, etching the upper surface of the first power chip by using the first etching mask to form a plurality of first grooves arranged at intervals.
And (4): and then coating a photo-induced anti-etching agent in the first grooves, forming second etching masks through an exposure and development process, and etching the bottom surface of each first groove by using the second etching masks to form a second groove, wherein the ratio of the width of the second groove to the width of the first groove is 0.3-0.6.
And (5): and then coating photoresist in the first grooves and the second grooves, forming a third etching mask through an exposure and development process, and etching the bottom surface of each second groove by using the third etching mask to form a third groove, wherein the ratio of the width of the third groove to the width of the second groove is 0.2-0.4.
And (6): and then spin-coating a suspension of first-size metal nanoparticles on the first power chip, and then performing a drying process to form a first metal nanoparticle layer, so that the third trench is filled with the first metal nanoparticle layer.
And (7): and then spin-coating a suspension of second-sized metal nanoparticles on the first power chip, and then performing a drying process to form a second metal nanoparticle layer so that the second metal nanoparticle layer fills the second trench, wherein the particle size of the second-sized metal nanoparticles is larger than that of the first-sized metal nanoparticles.
And (8): and then spin-coating a suspension of third-sized metal nanoparticles on the first power chip, and then performing drying treatment to form a third metal nanoparticle layer, so that the third metal nanoparticle layer fills the first groove and covers the upper surface of the first power chip, wherein the particle size of the third-sized metal nanoparticles is larger than that of the second-sized metal nanoparticles.
And (9): and then forming an epoxy resin layer on the first temporary carrier substrate, wherein the epoxy resin layer only wraps the side surface of the first power chip, and then removing the first temporary carrier substrate to form a first power chip sub-module.
Step (10): and then providing a circuit board, arranging a plurality of first power chip sub-modules on the circuit board, forming an encapsulation layer to wrap the first power chip sub-modules, and then providing a heat dissipation member, wherein the lower surface of the heat dissipation member is provided with a plurality of protrusions, and the heat dissipation member is pressed on the upper surfaces of the first power chip sub-modules in a pressing mode, so that the protrusions are respectively embedded into the third metal nanoparticle layer in the first groove.
In the step (3), the first trenches are formed through a wet etching process or a dry etching process, and the distance between every two adjacent first trenches is larger than the width of each first trench.
In the step (4), the second trench is formed through a wet etching process, and the ratio of the width of the second trench to the width of the first trench is 0.4-0.5.
In the step (5), the third trench is formed through a wet etching process, and the ratio of the width of the third trench to the width of the second trench is 0.25-0.35.
The material of the first-size metal nanoparticles, the second-size metal nanoparticles and the third-size metal nanoparticles is one or two or more of gold, silver, copper, cobalt, nickel and titanium.
Wherein the particle size of the first-size metal nanoparticles is 10-60 nanometers, the particle size of the second-size metal nanoparticles is 90-200 nanometers, and the particle size of the third-size metal nanoparticles is 300-500 nanometers.
The packaging layer comprises epoxy resin, and the heat dissipation member is made of copper or aluminum.
Wherein the protrusion is formed through an etching process or a mechanical cutting process.
The invention also provides a heat dissipation type power module which is formed by adopting the preparation method.
As shown in fig. 1 to 8, the present embodiment provides a method for manufacturing a heat dissipation type power module, where the method includes the following steps:
as shown in fig. 1, in step (1), a first temporary carrier substrate 100 is provided, on which first temporary carrier substrate 100 a first power chip 101 is provided.
In a specific embodiment, the first temporary carrier substrate 100 may be a semiconductor substrate, for example, a monocrystalline silicon substrate or a polycrystalline silicon substrate, the first temporary carrier substrate 100 may also be a ceramic substrate, a metal substrate or a plastic substrate, and in another embodiment, the first temporary carrier substrate 100 may be a rigid substrate, that is, any material that can play a supporting role may be used as the first temporary carrier substrate 100.
As shown in fig. 1, in step (2): a photoresist is then coated on the first temporary carrier substrate 100 and a first etch mask 102 is formed through an exposure and development process.
In a specific embodiment, in the step (2), a specific process for forming the first etching mask 102 is: the first etching mask 102 is formed by coating a photoresist material on the first temporary carrier substrate 100, the photoresist material covering the first power chip 101, and then performing an exposure and development process on the photoresist material.
As shown in fig. 1, in step (3): then, the upper surface of the first power chip 101 is etched by using the first etching mask 102 to form a plurality of first trenches 103 arranged at intervals.
In a specific embodiment, in the step (3), the first trenches 103 are formed by a wet etching process or a dry etching process, and a distance between adjacent first trenches 103 is greater than a width of the first trenches 103 (in order to protrude the first trenches 103, a first recess is enlarged in fig. 1, and a distance between adjacent first trenches 103 is reduced).
In a specific embodiment, the first trench 103 is formed by a laser ablation process.
As shown in fig. 2, in step (4): then, a photoresist is coated in the first trenches 103, a second etching mask 104 is formed through an exposure and development process, and then the bottom surface of each first trench 103 is etched by using the second etching mask 104 to form a second trench 105, wherein the ratio of the width of the second trench 105 to the width of the first trench 103 is 0.3-0.6.
In a specific embodiment, in the step (4), the second trench 105 is formed by a wet etching process, and a ratio of a width of the second trench 105 to a width of the first trench 103 is 0.4-0.5.
In a specific embodiment, since the second trench 105 is formed by using a wet etching process, thermal stress and mechanical stress are not generated during the process of forming the second trench 105, and further, micro cracks are not generated in the first power chip 101, and in a more preferred embodiment, a ratio of a width of the second trench 105 to a width of the first trench 103 is 0.45.
As shown in fig. 3, in step (5): then, photoresist is coated in the first trenches 103 and the second trenches 105, a third etching mask 106 is formed through an exposure and development process, and then the bottom surface of each of the second trenches 105 is etched by using the third etching mask 106 to form a third trench 107, wherein a ratio of a width of the third trench 107 to a width of the second trench 105 is 0.2-0.4.
In the step (5), the third trench 107 is formed through a wet etching process, and a ratio of a width of the third trench 107 to a width of the second trench 105 is 0.25 to 0.35.
In a specific embodiment, since the third trench 107 is formed by using a wet etching process, thermal stress and mechanical stress are not generated during the process of forming the third trench 107, and further, micro cracks are not generated in the power chip 101, and in a more preferred embodiment, a ratio of a width of the third trench 107 to a width of the second trench 105 is 0.3.
As shown in fig. 4, in step (6): a suspension of first-sized metal nanoparticles is then spin-coated on the first power chip 101, and then a baking process is performed to form a first metal nanoparticle layer 108, so that the third trench 107 is filled with the first metal nanoparticle layer 108.
In a specific embodiment, the material of the first-sized metal nanoparticles is one or two or more of gold, silver, copper, cobalt, nickel, and titanium. The first size metal nanoparticles have a particle size of 10-60 nanometers.
In particular embodiments, the concentration of the first-size metal nanoparticles in the suspension of first-size metal nanoparticles is 10-60 mg/ml, more preferably, the concentration of the first-size metal nanoparticles in the suspension of first-size metal nanoparticles is 10-20 mg/ml, 20-30 mg/ml, 30-40 mg/ml, 40-50 mg/ml, or 50-60 mg/ml, particularly, the spin coating the suspension of first-size metal nanoparticles is 4000-8000 rpm, more preferably, the spin coating the suspension of first-size metal nanoparticles is 4000-5000 rpm, 5000-6000 rpm, 6000-7000 rpm, or 7000-8000 rpm.
In more specific embodiments, the first-sized metal nanoparticles are specifically silver nanoparticles or gold nanoparticles, and the first-sized metal nanoparticles have a particle size of 10-20 nanometers, 20-30 nanometers, 30-40 nanometers, or 50-60 nanometers.
As shown in fig. 5, in step (7): then, a suspension of second-sized metal nanoparticles having a particle size larger than that of the first-sized metal nanoparticles is spin-coated on the first power chip, and then, a drying process is performed to form a second metal nanoparticle layer 109, so that the second metal nanoparticle layer 109 fills the second trench 105.
In a specific embodiment, the material of the second-sized metal nanoparticles is one or two or more of gold, silver, copper, cobalt, nickel, and titanium. The second size metal nanoparticles have a particle size of 90-200 nanometers.
In a specific embodiment, the concentration of the second-sized metal nanoparticles in the suspension of second-sized metal nanoparticles is 10-60 mg/ml, more preferably, the concentration of the second-sized metal nanoparticles in the suspension of second-sized metal nanoparticles is 10-20 mg/ml, 20-30 mg/ml, 30-40 mg/ml, 40-50 mg/ml, or 50-60 mg/ml, specifically, the rotation speed of spin-coating the suspension of second-sized metal nanoparticles is 4000-8000 rpm, more preferably, the rotation speed of spin-coating the suspension of second-sized metal nanoparticles is 4000-5000 rpm, 5000-6000 rpm, 6000-7000 rpm, or 7000-8000 rpm.
In more specific embodiments, the second-sized metal nanoparticles are specifically silver nanoparticles or gold nanoparticles, and the second-sized metal nanoparticles have a particle size of 90-110 nanometers, 110-130 nanometers, 130-150 nanometers, 150-170 nanometers, or 170-200 nanometers.
As shown in fig. 6, in step (8): then, a suspension of third-sized metal nanoparticles is spin-coated on the first power chip 101, and then a drying process is performed to form a third metal nanoparticle layer 110, so that the third metal nanoparticle layer 110 fills the first trench 103 and covers the upper surface of the first power chip 101, wherein the third-sized metal nanoparticles have a larger particle size than the second-sized metal nanoparticles.
In a specific embodiment, the material of the third-sized metal nanoparticles is one or two or more of gold, silver, copper, cobalt, nickel, and titanium. The third-sized metal nanoparticles have a particle size of 300-500 nm.
In particular embodiments, the concentration of the third size metal nanoparticles in the suspension of third size metal nanoparticles is 10-60 mg/ml, more preferably, the concentration of the third size metal nanoparticles in the suspension of third size metal nanoparticles is 10-20 mg/ml, 20-30 mg/ml, 30-40 mg/ml, 40-50 mg/ml, or 50-60 mg/ml, more preferably, the rotation speed of spin coating the suspension of third size metal nanoparticles is 4000-8000 rpm, more preferably, the rotation speed of spin coating the suspension of third size metal nanoparticles is 4000-5000 rpm, 5000-6000 rpm, 6000-7000 rpm, or 7000-8000 rpm.
In more specific embodiments, the third-sized metal nanoparticles are specifically silver nanoparticles or gold nanoparticles, and the third-sized metal nanoparticles have a particle size of 300-340 nanometers, 340-380 nanometers, 380-420 nanometers, 420-460 nanometers, or 460-500 nanometers.
As shown in fig. 7, in step (9): then, an epoxy resin layer 111 is formed on the first temporary carrier substrate, the epoxy resin layer 111 only wraps the side surface of the first power chip 101, and then the first temporary carrier substrate 100 is removed to form a first power chip sub-module 112.
As shown in fig. 8, in step (10): next, providing a circuit board 113, disposing a plurality of the first power chip sub-modules 112 on the circuit board 113, forming an encapsulation layer 114 to wrap the plurality of first power chip sub-modules 112, and then providing a heat dissipation member 115, wherein a lower surface of the heat dissipation member 115 has a plurality of protrusions, and the heat dissipation member 115 is pressed onto upper surfaces of the plurality of first power chip sub-modules 112, so that the plurality of protrusions are respectively embedded into the third metal nanoparticle layer 110 in the first grooves 103.
In a specific embodiment, the encapsulation layer 114 includes epoxy, and the heat spreader 115 is made of copper or aluminum.
In a more specific embodiment, the protrusions are formed by an etching process or a mechanical cutting process.
As shown in fig. 8, the present invention further provides a heat dissipation type power module formed by the above-mentioned manufacturing method.
Compared with the prior art, the heat dissipation type power module and the preparation method thereof have the following beneficial effects:
in the preparation process of the heat dissipation type power module, the first groove, the second groove positioned at the bottom of the first groove and the third groove positioned at the bottom of the second groove are formed on the upper surface of the first power chip, so that the width of the third groove can be effectively reduced, and meanwhile, the second groove and the third groove are formed by utilizing a wet etching process, so that mechanical stress and thermal stress caused by laser cutting can be avoided, and further, the functional core area of the power chip can be effectively prevented from being damaged.
The third groove is small in size and in a slit shape, so that when a conventional electroplating process or metal nanoparticles with conventional sizes are used for spin coating filling, the third groove cannot be effectively filled, and holes are easy to appear.
Furthermore, the lower surface of the heat dissipation piece is provided with a plurality of protrusions, the heat dissipation piece is pressed on the upper surface of the plurality of first power chip sub-modules, the plurality of protrusions are respectively embedded into the third metal nanoparticle layer in the first groove, and therefore the joint strength of the heat dissipation piece is improved, and meanwhile the heat dissipation efficiency is improved.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (9)
1. A preparation method of a heat dissipation type power module is characterized by comprising the following steps: the method comprises the following steps:
step (1): providing a first temporary carrier substrate, and arranging a first power chip on the first temporary carrier substrate;
step (2): then coating a photo-induced anti-etching agent on the first temporary carrier substrate, and forming a first etching mask through an exposure and development process;
and (3): then, etching the upper surface of the first power chip by using the first etching mask to form a plurality of first grooves arranged at intervals;
and (4): then coating a photoresist in the first grooves, forming a second etching mask through an exposure and development process, and etching the bottom surface of each first groove by using the second etching mask to form a second groove, wherein the ratio of the width of the second groove to the width of the first groove is 0.3-0.6;
and (5): then coating photoresist in the first groove and the second groove, forming a third etching mask through an exposure and development process, and etching the bottom surface of each second groove by using the third etching mask to form a third groove, wherein the ratio of the width of the third groove to the width of the second groove is 0.2-0.4;
and (6): then, spin-coating a suspension of metal nanoparticles with a first size on the first power chip, and then performing drying treatment to form a first metal nanoparticle layer, so that the third groove is filled with the first metal nanoparticle layer;
and (7): then, spin-coating a suspension of second-sized metal nanoparticles on the first power chip, and then performing drying treatment to form a second metal nanoparticle layer, so that the second metal nanoparticle layer fills the second groove, wherein the particle size of the second-sized metal nanoparticles is larger than that of the first-sized metal nanoparticles;
and (8): then, spin-coating a suspension of third-sized metal nanoparticles on the first power chip, and then performing drying treatment to form a third metal nanoparticle layer, so that the third metal nanoparticle layer fills the first trench and covers the upper surface of the first power chip, wherein the particle size of the third-sized metal nanoparticles is larger than that of the second-sized metal nanoparticles;
and (9): then forming an epoxy resin layer on the first temporary carrier substrate, wherein the epoxy resin layer only wraps the side surface of the first power chip, and then removing the first temporary carrier substrate to form a first power chip sub-module;
step (10): and then providing a circuit board, arranging a plurality of first power chip sub-modules on the circuit board, forming an encapsulation layer to wrap the first power chip sub-modules, and then providing a heat dissipation member, wherein the lower surface of the heat dissipation member is provided with a plurality of protrusions, and the heat dissipation member is pressed on the upper surfaces of the first power chip sub-modules in a pressing mode, so that the protrusions are respectively embedded into the third metal nanoparticle layer in the first groove.
2. The method for manufacturing a heat dissipation power module according to claim 1, wherein: in the step (3), the first trenches are formed through a wet etching process or a dry etching process, and the distance between every two adjacent first trenches is larger than the width of each first trench.
3. The method for manufacturing a heat dissipation power module according to claim 1, wherein: in the step (4), the second trench is formed through a wet etching process, and the ratio of the width of the second trench to the width of the first trench is 0.4-0.5.
4. The method for manufacturing a heat dissipation power module according to claim 1, wherein: in the step (5), the third trench is formed through a wet etching process, and a ratio of the width of the third trench to the width of the second trench is 0.25-0.35.
5. The method for manufacturing a heat dissipation power module according to claim 1, wherein: the first size metal nanoparticles, the second size metal nanoparticles and the third size metal nanoparticles are made of one or two or more of gold, silver, copper, cobalt, nickel and titanium.
6. The method for manufacturing a heat dissipation power module according to claim 5, wherein: the particle size of the first-size metal nanoparticles is 10-60 nanometers, the particle size of the second-size metal nanoparticles is 90-200 nanometers, and the particle size of the third-size metal nanoparticles is 300-500 nanometers.
7. The method for manufacturing a heat dissipation power module according to claim 1, wherein: the packaging layer comprises epoxy resin, and the heat dissipation piece is made of copper or aluminum.
8. The method for manufacturing a heat dissipation power module according to claim 1, wherein: the protrusions are formed through an etching process or a mechanical cutting process.
9. A heat dissipation type power module, characterized by being formed by the production method according to any one of claims 1 to 8.
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| CN112038505A (en) * | 2020-07-10 | 2020-12-04 | 山东傲晟智能科技有限公司 | Display panel and preparation method thereof |
| CN113675099A (en) * | 2021-10-25 | 2021-11-19 | 南通市铭腾精密电子有限公司 | Heat dissipation type stacked package body and manufacturing method thereof |
| WO2022110934A1 (en) * | 2020-11-26 | 2022-06-02 | 苏州矽锡谷半导体科技有限公司 | Protective ring member for semiconductor wafer and forming method therefor |
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| US6913994B2 (en) * | 2003-04-09 | 2005-07-05 | Agency For Science, Technology And Research | Method to form Cu/OSG dual damascene structure for high performance and reliable interconnects |
| WO2008085813A2 (en) * | 2007-01-03 | 2008-07-17 | Nanosys, Inc, Et Al. | Methods for nanopatterning and production of nanostructures |
| US9837394B2 (en) * | 2015-12-02 | 2017-12-05 | International Business Machines Corporation | Self-aligned three dimensional chip stack and method for making the same |
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| CN112038505A (en) * | 2020-07-10 | 2020-12-04 | 山东傲晟智能科技有限公司 | Display panel and preparation method thereof |
| WO2022110934A1 (en) * | 2020-11-26 | 2022-06-02 | 苏州矽锡谷半导体科技有限公司 | Protective ring member for semiconductor wafer and forming method therefor |
| CN113675099A (en) * | 2021-10-25 | 2021-11-19 | 南通市铭腾精密电子有限公司 | Heat dissipation type stacked package body and manufacturing method thereof |
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