CN115117038A - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN115117038A
CN115117038A CN202111073653.9A CN202111073653A CN115117038A CN 115117038 A CN115117038 A CN 115117038A CN 202111073653 A CN202111073653 A CN 202111073653A CN 115117038 A CN115117038 A CN 115117038A
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Prior art keywords
chip
electrode
conductive plate
semiconductor device
maximum dimension
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CN202111073653.9A
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English (en)
Inventor
内田雅之
山本哲也
高桥利英
佐藤克哉
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Toshiba Corp
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Toshiba Corp
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Publication of CN115117038A publication Critical patent/CN115117038A/zh
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Abstract

提供一种可靠性高的半导体装置。半导体装置具有：第1芯片，具有第1电极；配线部件，与所述第1芯片隔开；第2芯片，具有第2电极，配置在所述第1芯片与所述配线部件之间；第1导电板，配置在所述第1电极上，与从所述第1芯片朝向所述第2芯片的第1方向相交的第2方向的最大尺寸比所述第1芯片的所述第2方向的最大尺寸大，与所述第1电极电连接；第2导电板，配置在所述第2电极上，所述第2方向的最大尺寸比所述第2芯片的所述第2方向的最大尺寸大，与所述第2电极电连接；以及第1导线，与在所述第1导电板处比所述第1芯片更向所述第2方向突出的部分、在所述第2导电板处比所述第2芯片更向所述第2方向突出的部分及所述配线部件接合。

Description

半导体装置
技术领域
本发明涉及半导体装置。
背景技术
以往，已知有将多个芯片用键合导线电连接的半导体装置。
现有技术文献
专利文献
专利文献1：日本特开2015－5583号公报
发明内容
发明要解决的课题
本发明的目的是提供一种可靠性高的半导体装置。
用来解决课题的手段
有关技术方案的半导体装置具有：第1芯片，具有第1电极；配线部件，与所述第1芯片隔开；第2芯片，具有第2电极，配置在所述第1芯片与所述配线部件之间；第1导电板，配置在所述第1电极上，与从所述第1芯片朝向所述第2芯片的第1方向相交的第2方向的最大尺寸比所述第1芯片的所述第2方向的最大尺寸大，与所述第1电极电连接；第2导电板，配置在所述第2电极上，所述第2方向的最大尺寸比所述第2芯片的所述第2方向的最大尺寸大，与所述第2电极电连接；以及第1导线，与在所述第1导电板处比所述第1芯片更向所述第2方向突出的部分、在所述第2导电板处比所述第2芯片更向所述第2方向突出的部分及所述配线部件接合。
附图说明
图1是表示有关实施方式的半导体装置的俯视图。
图2是将图1的由虚线A包围的区域放大的俯视图。
图3是图2的B－B’线的剖面图。
图4是将图1的由虚线A包围的区域放大并且将图1中的导电板及导线省略的俯视图。
图5是将图1的由虚线A包围的区域放大并且将图1中的导线省略的俯视图。
图6是将参考例的半导体装置的部分放大表示的俯视图。
具体实施方式
图1是表示有关本实施方式的半导体装置的俯视图。
图2是将图1的由虚线A包围的区域放大的俯视图。
图3是图2的B－B’线的剖面图。
有关本实施方式的半导体装置100是功率半导体装置。半导体装置100例如搭载于汽车或列车等车辆，在搭载于车辆的电动机的通断控制中使用。这样的半导体装置100要求输出大电流。但是，半导体装置的应用对象并不特别限定于上述。
半导体装置100如图1所示，具有基板110、配置在基板110上的漏极连接用的引线框架121、配置在基板110上的多个栅极连接用的引线框架122和配置在基板110上的多个源极连接用的引线框架123(配线部件)。半导体装置100如图2及图3所示，还具有配置在漏极连接用的引线框架121上的多个芯片130、配置在多个芯片130的各自之上的多个导电板140和多个导线151、152、153、154。
以下，对半导体装置100的各部详细进行说明。以下，为了使说明容易理解，使用XYZ正交坐标系。将从基板110朝向芯片130的方向设为“Z方向”。此外，设Z方向为“上方向”，设Z方向的反方向为“下方向”，但它们的方向与重力方向无关。此外，设与Z方向正交的方向为“X方向”。此外，设与Z方向及X方向正交的方向为“Y方向”。
基板110例如由绝缘材料构成。基板110的形状是平板状。基板110的俯视观察下的形状是将X方向作为长度方向、角部磨圆的矩形状。但是，基板110的形状并不限定于上述。基板110的表面如图3所示，具有与X方向及Y方向大致平行的上表面110a及下表面110b。
在基板110的上表面110a，配置有漏极连接用的引线框架121、栅极连接用的引线框架122及源极连接用的引线框架123。在基板110之下可以配置金属板等散热部件。
各引线框架121、122、123由铜(Cu)等金属材料构成。各引线框架121、122、123的形状是平板状。
漏极连接用的引线框架121如图1所示，具有多个支承部121a和多个连接部121b。
在各支承部121a之上，在本实施方式中配置有10个芯片130。在各支承部121a上，10个芯片130配置为构成在X方向上为2列、在Y方向上为5行的矩阵。但是，配置在各支承部上的芯片的数量只要是2以上即可，并不限定于上述的数量。此外，各支承部上的芯片的配置并不限定于上述。
在本实施方式中，设置在半导体装置100的支承部121a的数量是8个。8个支承部121a以在Y方向上2个支承部121a相邻、在X方向上4个支承部121a并列的方式配置。
在本实施方式中，设置在半导体装置100的连接部121b的数量是4个。4个连接部121b中的一个将位于最靠－X侧且最靠+Y侧的支承部121a与位于最靠+X侧且最靠+Y侧的支承部121a连接。4个连接部121b中的另一个将位于最靠－X侧且最靠－Y侧的支承部121a与位于最靠+X侧且最靠－Y侧的支承部121a连接。4个连接部121b中的另一个将位于最靠－X侧且最靠+Y侧的支承部121a与位于最靠－X侧且最靠－Y侧的支承部121a连接。4个连接部121b中的另一个将位于最靠+X侧且最靠+Y侧的支承部121a与位于最靠+X侧且最靠－Y侧的支承部121a连接。但是，支承部的数量及配置并不限定于上述。
半导体装置100在本实施方式中，与漏极连接用的引线框架121的8个支承部121a对应而具有8个栅极连接用的引线框架122。各栅极连接用的引线框架122以与对应的支承部121a在X方向上相邻的方式配置。具体而言，各栅极连接用的引线框架122在X方向上配置在比对应的支承部121a靠内侧。各栅极连接用的引线框架122在Y方向上延伸。但是，栅极连接用的引线框架的形状及位置并不限定于上述。
同样，半导体装置100在本实施方式中，与漏极连接用的引线框架121的8个支承部121a对应而具有8个源极连接用的引线框架123。各源极连接用的引线框架123以在与对应的支承部121a之间夹着栅极连接用的引线框架122的方式配置。具体而言，各源极连接用的引线框架123在X方向上配置在比对应的漏极连接用的引线框架121及栅极连接用的引线框架122靠内侧。
位于最靠－X侧且最靠+Y侧的源极连接用的引线框架123与位于其+X侧的支承部121a相连。位于最靠+X侧且最靠+Y侧的源极连接用的引线框架123与位于其－X侧的支承部121a相连。位于最靠－X侧且最靠－Y侧的源极连接用的引线框架123与位于其+X侧的支承部121a相连。位于最靠+X侧且最靠－Y侧的源极连接用的引线框架123与位于其－X侧的支承部121a相连。其他的源极连接用的引线框架123分别不与支承部121a相连，在Y方向上延伸。但是，源极连接用的引线框架的形状及位置并不限定于上述。
栅极连接用的引线框架122相对于漏极连接用的引线框架121及源极连接用的引线框架123隔开。
图4是将图1的由虚线A包围的区域放大并且将图1中的导电板及导线省略的俯视图。
各芯片130在本实施方式中是MOSFET(metal-oxide-semiconductor field-effect transistor，金属氧化物半导体场效应晶体管)。各芯片130的形状是大致平板状。各芯片130的俯视观察下的形状是矩形。但是，各芯片的形状并不限定于上述。
各芯片130的表面如图3所示，具有与漏极连接用的引线框架121对置的下表面130a和位于下表面130a的相反侧的上表面130b。在下表面130a设置有漏极电极131。漏极电极131与漏极连接用的引线框架121电连接。在上表面130b，如图4所示，设置有栅极电极132及源极电极133。
漏极电极131、栅极电极132及源极电极133分别在本实施方式中包含铝(Al)作为主材料。漏极电极、栅极电极132及源极电极133分别由纯度为95％以上100％以下的铝(Al)构成。但是，分别构成漏极电极、栅极电极及源极电极的材料只要是金属等导电性材料即可，并不限定于上述。
俯视观察下的栅极电极132的形状是大致矩形。栅极电极132是上表面130b的X方向上的端部，配置在Y方向上的中央部。但是，栅极电极的形状及位置并不限定于上述。
在俯视观察下，源极电极133具有大致矩形的第1区域133a、以及从第1区域133a向X方向突出并在Y方向上相互隔开的一对第2区域133b。在一对第2区域133b之间配置有栅极电极132。在各芯片130处，栅极电极132与源极电极133之间电绝缘。
图5是将图1的由虚线A包围的区域放大并且将图1中的导线省略的俯视图。
在各芯片130的源极电极133上配置有导电板140。导电板140例如由铜(Cu)等金属材料构成。导电板140的形状是大致平板状。
导电板140使栅极电极132露出，相对于栅极电极132电绝缘。具体而言，在导电板140的侧面形成有在X方向上凹陷的凹部141，以使栅极电极132露出。但是，导电板的形状并不限定于上述。例如也可以是，导电板的俯视观察下的形状为矩形，导电板在X方向上从栅极电极隔开。
导电板140的Y方向的最大尺寸L1比芯片130的Y方向的最大尺寸L2大。因此，导电板140的Y方向的两端部从芯片130突出。但是，也可以导电板的Y方向的一端部从芯片突出，Y方向的另一端部不从芯片突出。此外，导电板140的X方向的最大尺寸L3比芯片130的X方向的最大尺寸L4小。但是，导电板的X方向的最大尺寸与芯片的X方向的最大尺寸的大小关系并不限定于上述。
如图3所示，导电板140经由金属层160及接合部件170与芯片130的源极电极133电连接。具体而言，在源极电极133之上设置有含有金(Au)的金属层160。并且，金属层160和导电板140通过由焊料或烧结材料等形成的接合部件170接合。如上述那样，源极电极133由于以铝(Al)为主材料，所以难以通过焊料或烧结材料等将导电板140直接与源极电极133接合。相对于此，在本实施方式中，通过用含有金(Au)的金属层160将源极电极133覆盖，能够经由金属层160将导电板140与源极电极133接合。但是，导电板与源极电极的连接构造并不限定于上述。
如图2所示，在X方向上相邻的芯片130并联连接。以下，将在X方向上相邻的芯片130中的距源极连接用的引线框架123较远的芯片130称作“第1芯片130A”。此外，将在X方向上相邻的芯片130中的距源极连接用的引线框架123较近的芯片130称作“第2芯片130B”。换言之，第2芯片130B是位于源极连接用的引线框架123与第1芯片130A之间的芯片130。此外，将第1芯片130A上的导电板140称作“第1导电板140A”，将第2芯片130B上的导电板140称作“第2导电板140B”。
第1芯片130A及第2芯片130B的栅极电极132经由导线151(第2导线)与栅极连接用的引线框架122电连接。具体而言，导线151的一端部通过引线键合与第1芯片130A的栅极电极132接合。此外，导线151的另一端部通过引线键合与栅极连接用的引线框架122接合。此外，导线151的中间部通过引线键合与第2芯片130B的栅极电极132接合。另外，在图2中，为了使说明容易理解，将各导线151～154向芯片130的接合部用涂黑的圆表示。
此外，第1芯片130A及第2芯片130B的源极电极133经由两条导线152(第1导线)与源极连接用的引线框架123电连接。具体而言，各导线152的一端部通过引线键合与在第1导电板140A处从第1芯片130A向Y方向突出的部分接合。此外，各导线152的另一端部通过引线键合与源极连接用的引线框架123接合。此外，各导线152的中间部通过引线键合与在第2导电板140B处从第2芯片130B向Y方向突出的部分接合。
两条导线152中的一个与第1导电板140A的Y方向上的一端部及第2导电板140B的Y方向上的一端部连接。两条导线152中的另一个与第1导电板140A的Y方向上的另一端部及第2导电板140B的Y方向上的另一端部连接。
此外，第1芯片130A及第2芯片130B的源极电极133还经由两条导线153(第3导线)与源极连接用的引线框架123电连接。具体而言，各导线153的一端部通过引线键合与在第1导电板140A处位于第1芯片130A的正上方的部分接合。此外，各导线153的另一端部通过引线键合与源极连接用的引线框架123接合。此外，各导线153的中间部通过引线键合与在第2导电板140B处位于第2芯片130B的正上方的部分接合。
此外，第2芯片130B的源极电极133经由两条导线154与源极连接用的引线框架123电连接。具体而言，各导线154的一端部通过引线键合与在第2导电板140B处位于第2芯片130B的正上方的部分接合。此外，各导线154的另一端部通过引线键合与源极连接用的引线框架123接合。
两条导线154在俯视观察下以在Y方向上夹着导线151的方式配置。此外，两条导线153在俯视观察下以在Y方向上夹着导线151、154的方式配置。
导线152、153、154的向第1芯片130A的接合部的X方向上的位置相互不同。同样地，导线152、153、154向第2芯片130B的接合部的X方向上的位置相互不同。但是，导线152、153、154的向第1芯片130A的接合部的位置也可以相同，导线152、153、154的向第2芯片130B的接合部的X方向上的位置也可以相同。此外，在图1及图2中，表示了在俯视观察下导线153与导线154不重叠的状态，但在俯视观察下导线153与导线154也可以部分地重叠。
这样，通过多个导线152、153，将在X方向上相邻的芯片130并联地连接。由此，能够使半导体装置100可输出的电流量增加。另外，用于在X方向上相邻的芯片130与源极连接用的引线框架123的电连接的导线的数量并不限定于6条。此外，导线也可以与3个以上的芯片和源极连接用的引线框架并联地连接。此外，在各导电板处从芯片突出的部分可以接合两条以上的导线。
图6是将参考例的半导体装置的部分放大表示的俯视图。
参考例的半导体装置100A在未设置导电板140这一点上与本实施方式的半导体装置100不同。在未设置导电板140的情况下，能够与芯片130的源极电极133接合的导线的数量取决于源极电极133的面积。
特别是，有时能够与第2芯片130B的源极电极133接合的导线的数量比能够与第1芯片130A的源极电极133接合的导线的数量少。具体而言，在第1芯片130A的源极电极133，即使能够在X方向上在与导线153延伸的直线相同的直线上接合导线152A的一端部，但由于在第2芯片130B的源极电极133接合着导线153、154，所以有时没有接合导线152A的中间部的位置。在这样的情况下，导线152A与第1芯片130A的源极电极133及源极连接用的引线框架123接合，不与第2芯片130B的源极电极133接合。
因此，在参考例的半导体装置100A那样的方式中，导线152A的接合部间的长度比本实施方式的导线152的接合部间的长度长。导线152A的接合部间的长度越长，产生温度变化时的变形量越大。变形量越大，在导线152A的接合部上作用的应力越大，因此接合部容易断裂。
相对于此，对于有关本实施方式的半导体装置100，如图2所示，在各芯片130之上设置有导电板140。并且，导线152的中间部与距源极连接用的引线框架123较近的芯片130的源极电极133之上的导电板140接合。因此，能够抑制导线152的接合部间的长度变长。由此，能够抑制导线152的接合部断裂。结果，能够提供可靠性高的半导体装置100。
接着，说明本实施方式的效果。
对于有关本实施方式的半导体装置100，在第1芯片130A上配置有第1导电板140A，在第2芯片130B上配置有第2导电板140B。并且，第1导电板140A的与从第1芯片130A朝向第2芯片130B的第1方向(X方向)相交的第2方向(Y方向)的最大尺寸L1比第1芯片130A的Y方向的最大尺寸L2大。同样地，第2导电板140B的Y方向的最大尺寸L1比第2芯片的Y方向的最大尺寸L2大。并且，导线152与在第1导电板140A处比第1芯片130A更向Y方向突出的部分、在第2导电板140B处比第2芯片130B更向Y方向突出的部分及源极连接用的引线框架123接合。因此，能够抑制导线152的长度变长。由此，能够抑制导线152因温度变化导致变形量变大。结果，能够抑制导线152的接合部由于温度变化而断裂。如上所述，能够提供可靠性高的半导体装置100。
此外，各导电板140将各芯片130的栅极电极132露出。因此，能够将第1芯片130A的栅极电极132与第2芯片130B的栅极电极132通过导线151电连接。
此外，半导体装置100还具有与在第1导电板140A处位于第1芯片130A的正上方的部分、在第2导电板140B处位于第2芯片130B的正上方的部分及源极连接用的引线框架123接合的导线153。因此，能够使半导体装置100可输出的电流量增加。
此外，第1导电板140A的X方向的最大尺寸L3比第1芯片130A的X方向的最大尺寸L4小，第2导电板140B的X方向的最大尺寸L3比第2芯片130B的X方向的最大尺寸L4小。因此，能够抑制第1导电板140A与第2导电板140B接近。
此外，源极电极133含有铝(Al)，在源极电极133上，设置有含有金(Au)的金属层160。因此，能够通过焊料或烧结材料等接合部件170将源极电极133与导电板140接合。
在上述实施方式中，说明了配线部件是引线框架的例子。但是，配线部件只要是与第1芯片的第1电极及第2芯片的第2电极电连接、构成半导体装置的配线的部件即可。因而，配线部件例如也可以是端子或设置在基板的配线层。
以上，说明了本发明的实施方式，但这些实施方式是作为例子提示的，不是要限定发明的范围。这些新的实施方式能够以其他各种各样的形态实施，在不脱离发明的主旨的范围内能够进行各种省略、替换、变更。这些实施方式及其变形包含在发明的范围或主旨中，并且包含在权利要求书所记载的发明及其等价物的范围中。
标号说明
100：半导体装置
110：基板
110a：上表面
110b：下表面
121：漏极连接用的引线框架
121a：支承部
121b：连接部
122：栅极连接用的引线框架
123：源极连接用的引线框架
130：芯片
130A：第1芯片
130B：第2芯片
130a：下表面
130b：上表面
131：漏极电极
132：栅极电极
133：源极电极
133a：第1区域
133b：第2区域
140：导电板
140A：第1导电板
140B：第2导电板
141：凹部
150：导电板
151：导线
152：导线
153：导线
154：导线
160：金属层
170：接合部件
L1：导电板的Y方向的最大尺寸
L2：芯片的Y方向的最大尺寸
L3：导电板的X方向的最大尺寸
L4：芯片的X方向的最大尺寸。

Claims (6)

1.一种半导体装置，其具有：
第1芯片，具有第1电极；
配线部件，与所述第1芯片隔开；
第2芯片，具有第2电极，配置在所述第1芯片与所述配线部件之间；
第1导电板，配置在所述第1电极上，与从所述第1芯片朝向所述第2芯片的第1方向相交的第2方向的最大尺寸比所述第1芯片的所述第2方向的最大尺寸大，与所述第1电极电连接；
第2导电板，配置在所述第2电极上，所述第2方向的最大尺寸比所述第2芯片的所述第2方向的最大尺寸大，与所述第2电极电连接；以及
第1导线，与在所述第1导电板处比所述第1芯片更向所述第2方向突出的部分、在所述第2导电板处比所述第2芯片更向所述第2方向突出的部分及所述配线部件接合。
2.如权利要求1所述的半导体装置，其中，
所述第1芯片还具有第3电极，配置在设置有所述第1电极的面；
所述第1导电板将所述第3电极露出；
所述第2芯片还具有第4电极，配置在设置有所述第2电极的面；
所述第2导电板将所述第4电极露出；
所述半导体装置还具有第2导线，与所述第3电极接合，从所述第3电极朝向所述第4电极延伸，与所述第4电极接合。
3.如权利要求2所述的半导体装置，其中，
所述第1芯片及所述第2芯片分别是MOSFET；
所述第1电极是所述第1芯片的源极电极；
所述第3电极是所述第1芯片的栅极电极；
所述第2电极是所述第2芯片的源极电极；
所述第4电极是所述第2芯片的栅极电极。
4.如权利要求1～3中任一项所述的半导体装置，其中，
所述半导体装置还具有第3导线，与在所述第1导电板处位于所述第1芯片的正上方的部分、在所述第2导电板处位于所述第2芯片的正上方的部分及所述配线部件接合。
5.如权利要求1～4中任一项所述的半导体装置，其中，
所述第1导电板的所述第1方向的最大尺寸比所述第1芯片的所述第1方向的最大尺寸小；
所述第2导电板的所述第1方向的最大尺寸比所述第2芯片的所述第1方向的最大尺寸小。
6.如权利要求1～5中任一项所述的半导体装置，其中，
所述第1电极及所述第2电极分别含有铝；
所述半导体装置还具有：
第1金属层，配置在所述第1电极上，含有金；
第2金属层，配置在所述第2电极上，含有金；
导电性的第1接合部件，位于所述第1金属层与所述第1导电板之间，将所述第1金属层与所述第1导电板接合；以及
导电性的第2接合部件，位于所述第2金属层与所述第1导电板之间，将所述第2金属层与所述第2导电板接合。
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