CN115117036A - 一种低寄生电感的半桥功率模块dbc布局结构 - Google Patents
一种低寄生电感的半桥功率模块dbc布局结构 Download PDFInfo
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Abstract
本发明公开了一种低寄生电感的半桥功率模块DBC布局结构,包括:多个裸芯片、引线、金属垫片、功率端子、上层直接覆铜陶瓷基板(DBC基板)和下层DBC基板;所述DBC基板上包括正极、负极、输出及控制信号区域;所述裸芯片通过焊料烧结在上、下DBC基板对应区域内,采用引线实现电气连接;所述功率端子实现外部电路和内部功率回路的电气连接;所述金属垫片通过焊料烧结在上、下DBC基板之间,起支撑及电气互连作用,通过金属垫片的连接,可以使上、下DBC基板上在同一桥臂上的芯片同时导通。本发明主要降低了功率半导体模块换流回路上的寄生电感,同时缓解了模块内多芯片发热产生的热耦合效应问题,降低了芯片结温,提高了模块的可靠性。
Description
技术领域
本发明属于半导体封装以及功率模块领域,特别是一种低寄生电感的半桥功率模块DBC布局结构。
背景技术
第三代宽禁带半导体材料因其出色的物理及电特性正在受到越来越广泛的关注。其中以碳化硅(SiC)和氮化镓(GaN)材料为代表,尤其是SiC材料在中高压工业领域的应用,从进入21世纪以来更是开启了半导体产业和经济发展模式的新局面。SiC材料的禁带宽度是硅(Si)的两倍以上,击穿场强是Si的八倍左右,热导率约为Si的三倍,电子饱和漂移速度也是比Si材料高近两倍。这些特性使得SiC器件可以运行更高的电压等级,实现更高的开关频率,达到更高的效率,同时还能保证器件的小型化。而且可以让SiC功率器件在高功率密度、高频、高温等Si功率器件难以胜任的应用领域有出色的表现。
目前的商业化SiC基器件在降低开关损耗和提高开关频率方面已经明显优于Si基同类产品。但是,分立式SiC金属-氧化物半导体场效应管(MOSFET)的额定电流在大功率场合应用尚显不足,将多个SiC MOSFET并联运行的功率模块是提高整体电流的好办法,但模块的封装结构又给功率模块引入了额外的寄生参数。特别是SiC MOSFET常运行在高频场合,需要快速开关,对模块内的寄生电感更为敏感。当多个MOSFET并联作半桥电路功率模块中时,影响更加严重。电流换向环路中的寄生电感可能会引起开关瞬态时的电流和电压振荡,增加开关损耗、电磁干扰(EMI)和器件的电压、电流应力,是影响器件运行稳定性的重要因素。因此,降低功率半导体模块内的寄生电感具有重要的理论和现实意义。
发明内容
针对现有技术中的缺陷,本发明的目的是提供一种低寄生电感的半桥功率模块DBC布局结构,其旨在解决SiC功率模块寄生电感过高引起的开关瞬态时的电流和电压振荡问题,同时合理规划裸芯片布局缓解多芯片发热产生的热耦合效应。
为了实现上述技术效果,本发明的技术方案如下:
本发明提供的一种低寄生电感的半桥功率模块DBC布局结构包括多个裸芯片、引线、金属垫片、功率端子、上层直接覆铜陶瓷基板(DBC基板)和下层DBC基板;所述DBC基板上包括正极、负极、输出及控制信号区域,且上、下两块DBC基板布局结构对称;所述裸芯片通过焊料对称的烧结在上、下DBC基板的正、负极区域内,采用引线实现电气连接;所述功率端子实现外部电路和内部回路的电气连接;所述信号端子与外部控制回路连接,实现芯片的开通和关断;所述金属垫片通过焊料烧结在上、下DBC基板之间,起支撑及电气互连作用,通过金属垫片的连接,可以使上、下DBC基板上在同一桥臂上的芯片同时导通。
进一步地,所述DBC基板上铜层包括七个区域,为正极、负极、输出、上桥栅极、上桥源极、下桥栅极和下桥源极区域,但不限于七个区域,可根据具体电路需求进行增加和修改。
进一步地,所述上、下两块DBC基板相互平行。
进一步地,所述金属垫片通过焊料焊接固定,其截面形状可以为圆、矩形等,金属垫片分布在DBC基板铜层的正、负极区域。
进一步地,所述裸芯片包括碳化硅(SiC)金属-氧化物半导体场效应管(MOSFET)裸芯片和SiC肖特基二极管(SBD)裸芯片,但不限于这两种裸芯片。
进一步地,所述两种芯片相间烧结在DBC正、负极区域。
进一步地,所述烧结在同一块DBC基板上的裸芯片之间的电气互连采用引线结构。
进一步地,所述上、下两块DBC基板设置有功率端子,正极端子、负极端子和输出端子,端子直接焊接到DBC基板对应区域,其中输出端子在DBC基板左侧,正、负极端子在DBC基板右侧。
进一步地,所述正极、负极区域面积大小一致,且对称分布在DBC基板铜层上,正极和负极区域之间设置为输出区域。
进一步地,所述上桥栅极、上桥源极、下桥栅极和下桥源极区域为信号端子连接区域,采用引线结构与外部电路互连,且上、下桥臂的信号端子区域设置在对应正极、负极区域两侧。
进一步地,所述信号端子连接区域与芯片采用引线结构互连。
进一步地,所述裸芯片之间互连采用的引线内径大于信号端子连接区域与芯片互连采用的引线内径的2至3倍。
进一步地,所述引线结构包括铜线、铝线、金线、铝带或铜带。
本发明的优点为:
1、本发明的低寄生电感的半桥功率模块DBC布局结构在运行时上、下DBC基板的同一桥臂同时导通,有效的扩大了单一桥臂上芯片的散热面积,缓解了多芯片发热产生的热耦合效应。
2、在换流时,由于上、下DBC基板均有回路电流流过,且电流方向相反,产生互感抵消了一部分电感,有效的降低了模块结构内环流回路上的寄生电感。
3、对该结构进行双脉冲仿真测试,器件的开通和关断过冲电流、电压也比常规同等级的功率模块有所降低。
附图说明
图1为功率模块电流回路示意图。
图2功率模块外观示意图。
图3为DBC基板布局示意图。
图4为DBC基板上的换流回路示意图。
图中,1为SiC MOSFET裸芯片;2为SiC SBD裸芯片;3为金属垫片;4为裸芯片之间互连引线;5为信号端子连接区域与芯片互连引线;6为正极功率端子;7为负极功率端子;8为输出功率端子;9为DBC基板;10为上桥栅极区域;11为上桥源极区域;12为下桥栅极区域;13为下桥源极区域。
具体实施方式
下面结合附图和实施例对本发明进行详细说明。以下实施例将有助于本领域的技术人员进一步理解本发明,但不以任何形式限制本发明。应当指出的是,对本领域的普通技术人员来说,在不脱离本发明构思的前提下,还可以做出若干变化和改进。这些都属于本发明的保护范围。
如说明书附图所示,本发明提供的一种低寄生电感的半桥功率模块DBC布局结构包括多个裸芯片、引线、金属垫片、功率端子、上层DBC基板和下层DBC基板;所述DBC基板上包括正极、负极、输出及控制信号区域,且上、下两块DBC基板布局结构对称;所述裸芯片通过焊料对称的烧结在上、下DBC基板的正、负极区域内,采用引线实现电气连接;所述功率端子实现外部电路和内部回路的电气连接;所述信号端子与外部控制回路连接,通过信号端子连接区域和芯片的引线键合,控制芯片的开通和关断;所述金属垫片通过焊料烧结在上、下DBC基板之间,起支撑及电气互连作用,通过金属垫片的连接,可以使上、下DBC基板上在同一桥臂上的芯片同时导通。
当模块端子与外部电路连接,信号端子控制正极区域MOSFET和负极区域MOSFET交替导通与截止,可实现电能的转换,其中SBD为了在死区内提供换流路径。正极区域MOSFET导通时,电流输出。当正极区域MOSFET将要截止时,负极区域SBD导通提供换流回路,此时电流回路路径最长,寄生电感影响也较大,反之亦然。
通过仿真计算,本发明提供的布局结构在两块长31.5mm,宽24.62mm,高0.98mm的DBC基板之间的换流回路路径上的最小寄生电感为1.56nH。而且此布局结构有效的缓解了多芯片间的热耦合效应。
在本发明的描述中,需要理解的是,术语“上”“下”“左”“右”“水平”“内”“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了描述本发明和简化描述,而不是指示或暗示所指的装置或组件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。
Claims (13)
1.一种低寄生电感的半桥功率模块DBC布局结构,其特征在于:包括上、下两块DBC基板,所述DBC基板由外部框架和内部金属垫片固定和支撑,所述的上、下两块DBC基板布局结构对称,两块DBC基板相对的表面为内表面,内表面上利用焊料烧结多个裸芯片。
2.根据权利要求1所述的低寄生电感的半桥功率模块DBC布局结构,其特征在于:所述DBC基板上铜层包括七个区域,为正极、负极、输出、上桥栅极、上桥源极、下桥栅极和下桥源极区域,但不限于七个区域,可根据具体电路需求进行增加和修改。
3.根据权利要求1所述的低寄生电感的半桥功率模块DBC布局结构,其特征在于:所述上、下两块DBC基板相互平行。
4.根据权利要求1所述的低寄生电感的半桥功率模块DBC布局结构,其特征在于:所述金属垫片通过焊料焊接固定,其截面形状可以为圆、矩形等,金属垫片分布在DBC基板铜层的正、负极区域。
5.根据权利要求1所述的低寄生电感的半桥功率模块DBC布局结构,其特征在于:所述裸芯片包括碳化硅(SiC)金属-氧化物半导体场效应管(MOSFET)裸芯片和SiC肖特基二极管(SBD)裸芯片,但不限于这两种裸芯片。
6.根据权利要求1所述的低寄生电感的半桥功率模块DBC布局结构,其特征在于:所述烧结在同一块DBC基板上的裸芯片之间的电气互连采用引线结构。
7.根据权利要求1所述的低寄生电感的半桥功率模块DBC布局结构,其特征在于:所述上、下两块DBC基板设置有功率端子,正极端子、负极端子和输出端子,端子直接焊接到DBC基板对应区域,其中输出端子在DBC基板左侧,正、负极端子在DBC基板右侧。
8.根据权利要求2所述的低寄生电感的半桥功率模块DBC布局结构,其特征在于:所述正极、负极区域面积大小一致,且对称分布在DBC基板铜层上,正极和负极区域之间设置为输出区域。
9.根据权利要求2所述的低寄生电感的半桥功率模块DBC布局结构,其特征在于:所述上桥栅极、上桥源极、下桥栅极和下桥源极区域为信号端子连接区域,采用引线结构与外部电路互连,且上、下桥臂的信号端子区域设置在对应正极、负极区域两侧。
10.根据权利要求5所述的低寄生电感的半桥功率模块DBC布局结构,其特征在于:所述SiC MOSFET和SiC SBD相间烧结在铜层的正极和负极区域。
11.根据权利要求9所述的低寄生电感的半桥功率模块DBC布局结构,其特征在于:所述信号端子连接区域与芯片采用引线结构互连。
12.根据权利要求6和9所述的低寄生电感的半桥功率模块DBC布局结构,其特征在于:所述裸芯片之间互连采用的引线内径大于信号端子连接区域与芯片互连采用的引线内径的2至3倍。
13.根据权利要求6、9和11所述的低寄生电感的半桥功率模块DBC布局结构,其特征在于:所述引线结构包括铜线、铝线、金线、铝带或铜带。
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