CN115104084A - 存储器、芯片及存储器的修复信息的保存方法 - Google Patents

存储器、芯片及存储器的修复信息的保存方法 Download PDF

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Publication number
CN115104084A
CN115104084A CN202080096797.3A CN202080096797A CN115104084A CN 115104084 A CN115104084 A CN 115104084A CN 202080096797 A CN202080096797 A CN 202080096797A CN 115104084 A CN115104084 A CN 115104084A
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CN
China
Prior art keywords
state
power supply
memory
circuit
repair
Prior art date
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Pending
Application number
CN202080096797.3A
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English (en)
Inventor
季秉武
王兴意
周云明
赵坦夫
胡楚华
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Filing date
Publication date
Application filed by Huawei Technologies Co Ltd filed Critical Huawei Technologies Co Ltd
Publication of CN115104084A publication Critical patent/CN115104084A/zh
Pending legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/025—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in signal lines
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/30—Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3275—Power saving in memory, e.g. RAM, cache
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/52—Protection of memory contents; Detection of errors in memory contents
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/785—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes
    • G11C29/789—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes using non-volatile cells or latches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/83—Masking faults in memories by using spares or by reconfiguring using programmable devices with reduced power consumption
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4072—Circuits for initialization, powering up or down, clearing memory or presetting
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/702—Masking faults in memories by using spares or by reconfiguring by replacing auxiliary circuits, e.g. spare voltage generators, decoders or sense amplifiers, to be used instead of defective ones
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/143—Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies
    • G11C5/144—Detection of predetermined disconnection or reduction of power supply, e.g. power down or power standby

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Power Sources (AREA)

Abstract

本申请提供一种存储器、芯片及存储器的修复信息的保存方法。该存储器包括：修复电路，被配置为从处理器接收第一信号，以及根据第一信号的状态确定通过第一电源或第二电源来进行供电以保存修复信息，其中，修复信息为存储器中失效的存储单元的信息，第一电源在系统掉电时为零或呈高阻态，第二电源在系统掉电时不为零；处理电路，被配置为根据修复信息实现存储器和处理器之间的通信。从而，使得存储器的修复信息可以持续被保存。

Description

PCT国内申请，说明书已公开。

Claims (16)

  1. PCT国内申请，权利要求书已公开。
CN202080096797.3A 2020-02-24 2020-02-24 存储器、芯片及存储器的修复信息的保存方法 Pending CN115104084A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2020/076467 WO2021168622A1 (zh) 2020-02-24 2020-02-24 存储器、芯片及存储器的修复信息的保存方法

Publications (1)

Publication Number Publication Date
CN115104084A true CN115104084A (zh) 2022-09-23

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Application Number Title Priority Date Filing Date
CN202080096797.3A Pending CN115104084A (zh) 2020-02-24 2020-02-24 存储器、芯片及存储器的修复信息的保存方法

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Country Link
US (1) US20220406393A1 (zh)
EP (1) EP4095694A4 (zh)
CN (1) CN115104084A (zh)
WO (1) WO2021168622A1 (zh)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023077616A1 (zh) * 2021-11-02 2023-05-11 珠海艾派克微电子有限公司 一种芯片、耗材盒及数据传输方法
CN117093535A (zh) * 2022-05-13 2023-11-21 华为技术有限公司 一种片上系统及相关系统上电恢复方法
CN117637013B (zh) * 2024-01-25 2024-04-30 合肥兆芯电子有限公司 电源控制装置与电源测试系统

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5831467A (en) * 1991-11-05 1998-11-03 Monolithic System Technology, Inc. Termination circuit with power-down mode for use in circuit module architecture
JP2002184181A (ja) * 2000-03-24 2002-06-28 Mitsubishi Electric Corp 半導体記憶装置
US7152187B2 (en) * 2003-11-26 2006-12-19 Texas Instruments Incorporated Low-power SRAM E-fuse repair methodology
CN101995905A (zh) * 2009-08-17 2011-03-30 英业达股份有限公司 计算机
US8937845B2 (en) * 2012-10-31 2015-01-20 Freescale Semiconductor, Inc. Memory device redundancy management system
CN106356097B (zh) * 2016-08-25 2020-02-14 浙江宇视科技有限公司 一种防止数据丢失的保护方法和装置
CN109614153B (zh) * 2018-11-06 2021-01-26 西安中兴新软件有限责任公司 多核芯片及系统
CN110109708A (zh) * 2019-04-25 2019-08-09 深圳忆联信息系统有限公司 一种控制器NandBoot机制的方法及其系统

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Publication number Publication date
WO2021168622A1 (zh) 2021-09-02
EP4095694A4 (en) 2022-12-14
EP4095694A1 (en) 2022-11-30
US20220406393A1 (en) 2022-12-22

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