CN115102377A - Control method and system for modular multilevel inverter - Google Patents

Control method and system for modular multilevel inverter Download PDF

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Publication number
CN115102377A
CN115102377A CN202210645112.7A CN202210645112A CN115102377A CN 115102377 A CN115102377 A CN 115102377A CN 202210645112 A CN202210645112 A CN 202210645112A CN 115102377 A CN115102377 A CN 115102377A
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bridge arm
voltage
current
modular multilevel
multilevel inverter
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岳雨霏
杨禧
吴兴隆
唐欣
王文
王媛媛
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Changsha University of Science and Technology
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Changsha University of Science and Technology
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration

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Abstract

The invention discloses a control method of a modular multilevel inverter, which aims at the modular multilevel inverter, reduces the capacitance voltage of a submodule on each bridge arm to be half of the capacitance voltage of other submodules, and improves the output level number of each bridge arm by adopting a dead-beat control strategy based on level superposition carrier phase shift modulation, thereby improving the output waveform quality of the modular multilevel inverter; according to the invention, under the condition that the number of the sub-modules is N, each bridge arm can output 2N levels, compared with the traditional modular multilevel inverter, N-1 levels are added, the output quality of the alternating current side of the system is greatly improved, and the improvement effect is more obvious when the number of the sub-modules is larger, so that the output harmonic wave characteristics of the modular multilevel inverter on the occasion with any modulation degree can be obviously optimized, therefore, the invention is suitable for the occasion with high requirement on the output electric energy quality, and has better economy.

Description

Control method and system for modular multilevel inverter
Technical Field
The invention relates to the field of control of modular multilevel converters, in particular to a control method of a modular multilevel inverter.
Background
The modular multilevel inverter structure is shown in fig. 1, and comprises a plurality of parallel-connected bridge arms, wherein each bridge arm comprises an upper bridge arm and a lower bridge arm which are connected in series. The upper bridge arm and the lower bridge arm respectively comprise a plurality of power sub-modules which are connected in series, and the last power sub-module of each upper bridge arm and the last power sub-module of each lower bridge arm are respectively connected with a full-bridge module. All full-bridge modules are connected with the power supply. The power sub-module comprises two switching tubes which are connected in series, and the switching tube series branch is connected with the capacitor in parallel.
Due to the high modularization structural characteristics of the modularized multi-level inverter, a higher bridge arm output level number can be obtained by increasing the number of power units in a bridge arm, and the AC side waveform quality is improved, so that the modularized multi-level inverter is suitable for occasions with high electric energy quality requirements and special occasions. However, the increase of the number of power units also increases the complexity of the control system, affects the reliability of the inverter system, and the excessive number of power units also brings about a higher cost problem, and reduces the economy of the system.
The invention patent application CN105553310A optimizes the control method of the modular multilevel inverter, so that the output harmonic characteristics can be improved without increasing the number of power units, but only in the low modulation level situation of the modular multilevel inverter, the problem of optimizing the output harmonic characteristics of the modular multilevel inverter in the high modulation situation cannot be solved.
Disclosure of Invention
The invention aims to solve the technical problem that the prior art is insufficient, and provides a control method of a modular multilevel inverter, which improves the output harmonic characteristic of the modular multilevel inverter in high modulation degree occasions and effectively reduces the harmonic distortion rate of output current on the premise of not increasing the number of power units.
In order to solve the technical problems, the technical scheme adopted by the invention is as follows: a method of controlling a modular multilevel inverter, the method comprising, for any phase of the modular multilevel inverter, the steps of:
s1, establishing middle and upper bridge arm voltage u of each bridge arm of the modular multilevel inverter px And lower bridge arm voltage u nx The mathematical model of (1) extracts the upper bridge arm current i px And lower arm current i nx ；x＝a,b,c；
S2, utilizing the upper bridge arm current i px Lower arm current i nx And calculating to obtain the output current i of each phase of the modular multilevel inverter ox And a circulating current i zx ；
S3, using the mathematical model to output current i ox And a circulating current i zx Carrying out deadbeat current control to obtain a bridge arm voltage modulation signal u for output current tracking and circulation current suppression pxr And u nxr ；
S4, comparing the voltage modulation signals u of the upper bridge arm and the lower bridge arm for any upper bridge arm and any lower bridge arm p,nxr Carriers u out of phase with N' same amplitudes p,ncxk Obtaining the equivalent upper bridge arm/lower bridge arm level number, and obtaining the switching state H of the Nth power sub-module in the upper bridge arm/lower bridge arm according to the relation between the equivalent upper bridge arm/lower bridge arm level number and the actual upper bridge arm/lower bridge arm level number p,nxN And the number of levels L of the first N-1 power sub-modules p,nx (ii) a k is 1,2, …, N'; n ═ 2N-1; n is the number of upper bridge arm/lower bridge arm power sub-modules;
s5, and carrying out capacitance voltage u on the first N-1 power sub-modules of the upper bridge arm/lower bridge arm dcp,nxi Sorting according to the principle from small to large, and selecting front L when the bridge arm current is in the charging direction p,nx Each power sub-module is put into use, and other power sub-modules bypass; when the bridge arm current is in the discharging direction, selecting the rear L p,nx Each power sub-module is put into use, and other power sub-modules bypass; i is 1,2, …,N-1；
S6, the first N-1 sub-module capacitors of the upper bridge arm/lower bridge arm are charged or discharged according to the driving signals, and the capacitor voltage is stabilized at the reference value
Figure BDA0003685607980000022
Nearby (e.g. reference value)
Figure BDA0003685607980000023
Within ± 5%).
Further, the method of the present invention further comprises:
s7, adopting a single-phase PWM rectifier to the Nth power sub-module of each phase of upper bridge arm/lower bridge arm to enable the Nth power sub-module to obtain a stable reference value
Figure BDA0003685607980000024
The nearby capacitor voltage is established according to the topological structure of the single-phase PWM rectifier and related to the output voltage u of the direct current side of the single-phase PWM rectifier dcp,nxN Net side current i sp,nx In combination with the state equation to obtain a modulated wave signal u for stabilizing the output voltage on the DC side rp,nx For the modulated wave signal u rp,nx Performing single-pole frequency multiplication modulation to obtain a driving signal of the power switching tube of the single-phase PWM rectifier, so that the direct-current side of the single-phase PWM rectifier outputs a voltage u dcp,nxN Stabilized at the reference value
Figure BDA0003685607980000025
And meanwhile, the capacitance voltage of the Nth power sub-module is half of the capacitance voltage of the first N-1 sub-modules, so that one half level output by the Nth power sub-module is superposed to the total level number of the first N-1 power sub-modules, and the increase of the bridge arm level and the optimization of the output harmonic characteristic are realized.
Through the steps, the output current tracking and the circulation suppression of the modular multilevel inverter can be realized, and the output level of one half of the Nth submodule of the modular multilevel inverter can be superposed into the bridge arm level number, so that the bridge arm level number is obviously increased, the output harmonic characteristic is improved on the premise of ensuring the output current tracking performance and the circulation suppression performance, and the output current harmonic distortion rate is effectively reduced.
In step S1, the expression of the mathematical model is:
Figure BDA0003685607980000021
wherein, U dc For the DC bus voltage of the modular multilevel inverter, L, R represents the bridge arm inductance and resistance, R o Is a load resistor.
In step S2, each phase of the modular multilevel inverter outputs current i ox And a circulating current i zx The calculation formula of (2) is as follows:
Figure BDA0003685607980000031
in step S3, bridge arm voltage modulation signal u pxr And u nxr The calculation formula of (c) is:
Figure BDA0003685607980000032
wherein the content of the first and second substances,
Figure BDA0003685607980000033
in order to output the reference value of the current,
Figure BDA0003685607980000034
is a circulating current reference value, P 1 、P 2 Respectively controller parameters for output current and circulating current.
In step S4, when J is present p,nx When it is an integer, H p,nxN 1 and
Figure BDA0003685607980000035
when J is a non-integer, H p,nxN Is equal to 0 and
Figure BDA00036856079800000313
wherein the content of the first and second substances,
Figure BDA0003685607980000036
equivalent bridge arm level number
Figure BDA0003685607980000037
round () is a function of rounding nearby;
Figure BDA0003685607980000038
the switch states of the N' equivalent submodules. The process ensures that the last submodule of the upper bridge arm/the lower bridge arm can obtain the switching state without participating in capacitor voltage sequencing, reduces the complexity of a capacitor voltage sequencing algorithm, and simultaneously ensures that the Nth submodule can be reasonably switched on and off.
In the step S7, in the step S,
Figure BDA0003685607980000039
wherein u is rp,nx Modulating signals for the voltage of the single-phase PWM rectifier in the upper bridge arm/the lower bridge arm; u. u sx The voltage is the network side voltage of the single-phase PWM rectifier;
Figure BDA00036856079800000310
setting a network side inductance voltage of a single-phase PWM rectifier in an upper bridge arm/a lower bridge arm;
Figure BDA00036856079800000311
is the nth sub-module capacitor voltage reference.
In step S7, the equation of state expression is:
Figure BDA00036856079800000312
wherein L is s Is a single-phase PWM rectifier network side inductor, C sm Supporting capacitors, R, for the DC side of the single-phase PWM rectifier L A load resistor, S, on the DC side of the single-phase PWM rectifier L 、S R Are the switching functions of the left and right bridge arms of the single-phase PWM rectifier, u sx Is the network side voltage of the single-phase PWM rectifier.
The invention also provides a modular multilevel inverter control system, which comprises a processor and a memory; the steps of the control method of the present invention are implemented when the processor executes the computer program instructions stored in the memory.
Compared with the prior art, the invention has the beneficial effects that: aiming at the modular multilevel inverter, the capacitance voltage of one sub-module is reduced to be half of the capacitance voltage of other sub-modules, the output level number of each bridge arm is improved by adopting a dead-beat control strategy based on level superposition carrier phase-shift modulation, and the output waveform quality of the modular multilevel inverter is improved; according to the invention, under the condition that the number of the sub-modules is N, each bridge arm can output 2N levels, compared with the traditional modular multilevel inverter, N-1 levels are added, the output quality of the alternating current side of the system is greatly improved, and the improvement effect is more obvious when the number of the sub-modules is larger, so that the output harmonic wave characteristics of the modular multilevel inverter on the occasion with any modulation degree can be obviously optimized, therefore, the invention is suitable for the occasion with high requirement on the output electric energy quality, and has better economy.
Drawings
FIG. 1 is a block diagram of a modular multilevel inverter topology including a half-bridge sub-module block diagram and a single-phase PWM rectifier block diagram for use in an embodiment of the invention;
FIG. 2 is a flow chart of the deadbeat control based on level-superimposed carrier phase-shift modulation according to an embodiment of the present invention;
fig. 3(a) -3 (b) are graphs of bridge arm voltage waveforms of the modular multilevel inverter according to the embodiment of the invention under the control method according to the embodiment of the invention and under the conventional method. FIG. 3(a) is a graph of a bridge arm voltage waveform of a modular multi-level inverter under a conventional control method, and FIG. 3(b) is a graph of a bridge arm voltage waveform of a modular multi-level inverter under a control method according to an embodiment of the invention;
fig. 4(a) -4 (b) are waveform diagrams of output current of the modular multilevel inverter according to the embodiment of the invention under the control method according to the embodiment of the invention and under the conventional method. Fig. 4(a) is a waveform diagram of an output current of a modular multi-level inverter under a conventional control method, and fig. 4(b) is a waveform diagram of an output current of a modular multi-level inverter under a control method according to an embodiment of the invention;
fig. 5(a) -5 (b) are voltage waveform diagrams of sub-module capacitors of a modular multilevel inverter according to an embodiment of the invention under a control method according to an embodiment of the invention and under a conventional method. Fig. 5(a) is a diagram of a sub-module capacitor voltage waveform of a modular multilevel inverter under a conventional control method, and fig. 5(b) is a diagram of a sub-module capacitor voltage waveform of a modular multilevel inverter under a control method according to an embodiment of the invention.
Detailed Description
In the embodiment of the invention, the capacitor voltage of the last submodule of each bridge arm of the modular multilevel inverter is set to be one half of the capacitor voltage of other submodules, and if N submodules are provided, the reference value of the capacitor voltage of the first N-1 submodules is
Figure BDA0003685607980000041
The Nth sub-module has a capacitor voltage reference value of
Figure BDA0003685607980000042
And a dead-beat control strategy based on level superposition carrier phase shift modulation is adopted for the inverter.
The embodiment of the invention comprises the following concrete implementation steps:
establishing a reference bridge arm voltage u for any phase of the modular multilevel inverter according to the topological structure of the modular multilevel inverter px (x ═ a, b, c) and u nx The mathematical model of (1) and simultaneously extracting the upper bridge arm current i px And lower arm current i nx The output current i can be obtained by calculation ox And a circulating current i zx To i, pair ox And i zx Obtaining a bridge arm voltage modulation signal u for output current tracking and circulation current suppression by adopting a dead-beat current control strategy pxr And u nxr (ii) a According to the control strategy of the embodiment of the invention, each bridge arm of the modular multilevel inverter formed by cascading N submodules can output 2N level numbers, and under the condition that the output level number is 2N, the modulation result of the modular multilevel inverter can be equivalent to the modulation result of the modular multilevel inverter formed by cascading N' submodules under the traditional control method, so that the obtained upper bridge arm/lower bridge arm voltage modulation signal u p,nxr Carriers u out of phase with N' same amplitudes p,ncxk (k is 1,2, …, N') to obtain equivalent upper/lower bridge level number
Figure BDA0003685607980000051
Then according to the number Q of the bridge arm level and the actual upper bridge arm level p,nx A reasonable judgment condition is set according to the relation of (A) to obtain the switching state H of the Nth sub-module of the upper bridge arm/the lower bridge arm p,nxN And the level number L of the first N-1 sub-modules p,nx (ii) a For the capacitor voltage u of the front N-1 sub-modules of the upper bridge arm/the lower bridge arm dcp,nxi (i-1, 2, …, N-1) are sorted according to the principle of small to large, and the charging and discharging directions of the bridge arm current are judged to combine with the level number L p,nx And reasonably configuring the drive signals of the sub-modules: when the bridge arm current is in the charging direction, selecting the front L p,nx Sub-module investment and other sub-modules bypass; when the bridge arm current is in the discharging direction, selecting the rear L p,nx The sub-module is put into, other sub-modules are bypassed, and the first N-1 sub-module capacitors are reasonably charged and discharged according to the driving signals, so that the capacitor voltage is stabilized at
Figure BDA0003685607980000052
Nearby; adopting a single-phase PWM rectifier to make the Nth sub-module on a bridge arm obtain stable capacitance voltage, and establishing output voltage u related to the DC side of the rectifier according to the topological structure of the single-phase PWM rectifier dcp,nxN Net side current i sp,nx Then combining the state equation to design a voltage outer loop control taking the output voltage as a control target and a current inner loop control taking the network side current as a control target, and obtaining a modulated wave signal u for stabilizing the output voltage at the direct current side rp,nx And then performing unipolar frequency multiplication modulation on the modulation wave to obtain a driving signal of the power switching tube of the single-phase PWM rectifier so as to obtain a voltage stabilized at a reference value
Figure BDA0003685607980000053
I.e. the nth sub-module capacitor voltage u dcp,nxN Therefore, one half of the level output by the Nth power sub-module is superposed to the total level number of the first N-1 power sub-modules, and the increase of the bridge arm level and the optimization of the output harmonic wave characteristic are realized.
Aiming at the modular multilevel inverter, the capacitor voltage of the last submodule of each bridge arm is set to be one half of the capacitor voltage of other submodules, so that the capacitance value of the submodule can be reduced, the cost and the volume of the modular multilevel inverter are reduced, the voltage-resistant grade of a power switch tube of the submodule is reduced, and the service life of a device is prolonged. By adopting the steps of the method, the output level number of each bridge arm of the modular multilevel inverter can be increased on the premise of ensuring the current of each alternating current output side and the circulation control performance of the bridge arms, the harmonic distortion rate of the output current is effectively reduced, and the practicability of the modular multilevel inverter is further improved.
Obtaining bridge arm voltage modulation signal u pxr And u nxr The specific implementation process comprises the following steps:
bridge arm voltage u px 、u nx The mathematical model of (a) is as follows:
Figure BDA0003685607980000054
in the formula of U dc For inverter DC bus voltage, L, R for bridge arm inductance and resistance, R o Is a load resistance, i ox For each phase of the output current, i, of the modular multilevel inverter zx X is circulation, a, b, c. i.e. i ox 、i zx And bridge arm current i px 、i nx The relationship of (a) is shown as follows:
Figure BDA0003685607980000061
the mathematical model is established to design the output current i ox And a circulating current i zx The dead-beat controller obtains a bridge arm voltage modulation signal u pxr And u nxr The control expression is shown as follows:
Figure BDA0003685607980000062
in the formula (I), the compound is shown in the specification,
Figure BDA0003685607980000063
in order to output the reference value of the current,
Figure BDA0003685607980000064
is a circulating current reference value, P 1 、P 2 Controller parameters for the output current and the circulating current, respectively, for adjusting the control effect. And a bridge arm voltage modulation signal for realizing output current tracking control and circulating current suppression can be obtained through a dead-beat control expression.
Obtaining the switching state H of the Nth sub-module of the upper bridge arm/the lower bridge arm p,nxN And the number of levels L of the first N-1 sub-modules p,nx The specific implementation process comprises the following steps:
the equivalent submodule number N' is:
N'＝2N-1；
in the formula, N is the number of actual bridge arm sub-modules. N' carrier signals u with same amplitude and different phases can be calculated according to N p,ncxk (k＝1,2,…,N')。
According to a carrier phase shift modulation strategy, bridge arm voltage modulation signals and N carriers u with the same amplitude and different phases p,ncxk (k is 1,2, …, N ') to obtain the switch states of the N' equivalent submodules of the upper arm/lower arm
Figure BDA0003685607980000065
Figure BDA0003685607980000066
The number of the upper bridge arm/lower bridge arm equivalent bridge arm levels
Figure BDA0003685607980000067
Comprises the following steps:
Figure BDA0003685607980000068
the actual bridge arm level number Q of the upper bridge arm/the lower bridge arm p,nx Comprises the following steps:
Figure BDA0003685607980000069
in the formula, H p,nxi (i-1, 2, …, N-1) is the upper/lower arm front N-1 sub-module switch state, H pxN And the on-off state of the Nth sub-module of the upper bridge arm/the lower bridge arm is shown.
The following judgment formula is set:
Figure BDA0003685607980000071
and obtaining the switching state H of the Nth sub-module of the upper bridge arm/the lower bridge arm according to the following judgment conditions p,nxN And the level number L of the first N-1 sub-modules p,nx ：
1) When J is p,nx When it is an integer, H p,nxN 1 and
Figure BDA0003685607980000072
2) when J p,nx When it is a non-integer, H p,nxN Is equal to 0 and
Figure BDA0003685607980000073
the process enables the last submodule of the upper bridge arm/the lower bridge arm to obtain the switching state without participating in capacitor voltage sequencing, reduces the complexity of a capacitor voltage sequencing algorithm, and enables the Nth submodule to be reasonably switched on and switched off.
The specific implementation process of obtaining the driving signal of the N-1 sub-modules in front of the upper bridge arm/the lower bridge arm and balancing the capacitance and the voltage comprises the following steps:
firstly, the capacitor voltage value u of the sub-module N-1 in front of the upper bridge arm/the lower bridge arm is measured dcp,nxi Sequencing according to a principle of from small to large, and numbering 1,2, N-1 in sequence from small to large; then judging the current i of the upper bridge arm/the lower bridge arm p,nx In the direction of charging or discharging, in combinationLevel number L of front N-1 sub-modules of upper bridge arm/lower bridge arm p,nx Reasonably configuring the drive signals of the sub-modules, and selecting the serial numbers of 1,2, L when the current of the upper bridge arm/the lower bridge arm is in the charging direction p,nx A sub-module for sending a drive signal 1 to the front L p,nx The sub-module controls the input of the sub-module, and other sub-modules bypass the sub-module; when the current of the upper bridge arm/the lower bridge arm is in the discharging direction, the serial number is N-L p,nx ,N-L p,nx A sub-module of +1, N-1, for sending a driving signal 0 to the rear L p,nx The submodules control the input of the submodules, and other submodules bypass the input.
The specific control process of the nth sub-module capacitor voltage of the upper bridge arm/the lower bridge arm comprises the following steps:
DC side output voltage u of single-phase PWM rectifier dcp,nxN Net side current i sp,nx Can be expressed as:
Figure BDA0003685607980000074
wherein u is sx Is a single-phase PWM rectifier network side voltage, L s Is a rectifier network side inductor, C sm Supporting capacitors, R, for the DC side of the rectifier L Is a load resistor on the direct current side of the rectifier. S L 、S R The switching functions of the left and right bridge arms of the single-phase PWM rectifier are obtained.
The establishment of the mathematical model provides a theoretical basis for the design of the double closed-loop controller.
The control expression of the voltage outer loop is as follows:
Figure BDA0003685607980000075
in the formula u dcp,nxN For the output voltage of the direct current side,
Figure BDA0003685607980000076
for the output of a voltage reference value, K, on the DC side P 、K I The proportionality coefficient and the integral coefficient of the voltage loop,
Figure BDA0003685607980000081
is the magnitude of the net side current reference value.
The voltage outer ring is used for stabilizing the capacitance voltage of the Nth sub-module
Figure BDA0003685607980000082
While providing the magnitude of the reference value for the current inner loop.
Single-phase PWM rectifier network side voltage angular frequency omega detected by combining phase-locked loop PLL x And phase theta x The given value of the network side current is obtained as follows:
Figure BDA0003685607980000083
the control expression for the current inner loop is:
Figure BDA0003685607980000084
by setting the parameter of the current controller to P-L s /T s Can be regarded as the output quantity
Figure BDA0003685607980000085
Is a given value of the network-side inductor voltage, where L s Is a single-phase PWM rectifier network side inductor, T s Is a control period. The grid side voltage is subtracted from the grid side voltage, and then normalization is carried out, so that an alternating current side voltage modulation wave is obtained:
Figure BDA0003685607980000086
modulated wave u rp,nx And carrier u c The drive signal of the single-phase PWM rectifier can be obtained by performing unipolar frequency multiplication modulation, and the specific process comprises the following steps: when u is rp,nx ≥u c And-u rp,nx <u c When the rectifier is in a forward conduction state; when u is rp,nx <u c And-u rp,nx ≥u c When the rectifier is in a reverse conducting state; otherwise the rectifier is in a bypass state. In the process, each power switching tube on the single-phase PWM rectifier is reasonably switched on and off, so that the rectifier outputs specified direct-current side voltage, the capacitance voltage of the Nth sub-module is one half of that of other sub-modules, and meanwhile, one half of the level output by the Nth sub-module is superposed to the total level number of the first N-1 sub-modules, and therefore the increase of the bridge arm level number and the optimization of output harmonic wave characteristics are achieved.
The embodiment of the invention provides a dead-beat control strategy based on level superposition carrier phase-shift modulation for a modular multilevel inverter, which comprises the steps of firstly establishing a state equation of output current and circulation current of the inverter, designing a current dead-beat controller according to the state equation, and obtaining a bridge arm voltage modulation signal for tracking the output current and inhibiting the circulation current; secondly, obtaining the total level number of the first N-1 sub-modules and the switch state of the Nth sub-module according to the bridge arm voltage modulation signal and the level superposition carrier phase shift modulation strategy; then, according to the level number of the first N-1 sub-modules and the capacitance voltage of the first N-1 sub-modules, driving signals of the power switching devices of the first N-1 sub-modules are reasonably configured by judging the current charging and discharging directions of bridge arms; and finally, the capacitance voltage of the Nth sub-module is half of that of the first N-1 sub-modules by adopting a double closed-loop control strategy for the single-phase PWM rectifier, so that one-half level output by the Nth sub-module is superposed to the total level number of the first N-1 sub-modules, and the increase of the level number of a bridge arm and the optimization of output harmonic wave characteristics are realized.
Fig. 1 is a block diagram of a three-phase modular multilevel inverter topology used in an embodiment of the invention. In fig. 1, the modular multilevel inverter includes three-phase parallel-connected bridge arms, each phase of bridge arm includes an upper bridge arm and a lower bridge arm, the upper bridge arm and the lower bridge arm both include a filter reactor L and a bridge arm resistor R connected in series, an input side is a dc voltage, and an output side is an ac voltage; each bridge arm is formed by cascading N half-bridge submodules, and each submodule is formed by cascading 2 power switching devices T in series 1 (D 1 )、T 2 (D 2 ) And a capacitor C connected in parallel, each power switch device being composed ofAn IGBT (T) 1 、T 2 ) And an anti-parallel diode (D) 1 、D 2 ) If the switch signal of each submodule is set to H i(i＝1～N) When T is 1 When conducting, H i When T is equal to 1 2 When conducting, H i 0; let the capacitor voltage be u dci Then the output voltage u of the power unit smi In relation to the switching signal
Figure BDA0003685607980000091
The direct current side of the Nth sub-module of each bridge arm is connected with a single-phase PWM rectifier, each PWM rectifier consists of two parallel bridge arms, each bridge arm consists of 2 power switching devices connected in series, and each power switching tube consists of an IGBT and an anti-parallel diode. When T is P1 、T P4 Conduction, T P2 、T P3 When the single-phase PWM rectifier is turned off, the single-phase PWM rectifier is in a forward conduction working state; when T is P1 、T P4 Off, T P2 、T P3 When the single-phase PWM rectifier is conducted, the single-phase PWM rectifier is in a reverse conduction working state; when T is P1 、T P3 On, T P2 、T P4 When the single-phase PWM rectifier is turned off, the single-phase PWM rectifier is in a bypass state; when T is P1 、T P3 Off, T P2 、T P4 When the single-phase PWM rectifier is conducted, the single-phase PWM rectifier is in a bypass state.
In the figure, the voltage and the current of an upper bridge arm and a lower bridge arm of the modular multilevel inverter are respectively u p,nx And i p,nx (x ═ a, b, c), the network side voltage and current of the single-phase PWM rectifier are u, respectively sx And i sp,nx . The three-phase modular multilevel inverter comprises six bridge arms and 6N half-bridge submodules.
Fig. 2 is a flow chart of dead-beat control based on level-superimposed carrier phase shift modulation according to an embodiment of the present invention. The formula (1) is:
Figure BDA0003685607980000092
wherein i px ，i nx For upper and lower bridge arm currents, i ox To output a current, i zx Is circular flow;
the formula (2) is:
Figure BDA0003685607980000093
in the formula u pxr ，u nxr The signals are modulated by the voltage of the upper and lower bridge arms,
Figure BDA0003685607980000094
in order to output the reference value of the current,
Figure BDA0003685607980000095
is a circulating current reference value, P 1 、P 2 Controller parameters for output current and circulating current, respectively;
the formula (3) is:
N'＝2N-1；
in the formula, N' is the number of equivalent submodules, and N is the number of actual bridge arm submodules;
equation (4) is:
Figure BDA0003685607980000101
in the formula u p,ncxk (k is 1,2, …, N ') is N' carriers with same amplitude and different phases,
Figure BDA0003685607980000102
the on-off states of the N' equivalent sub-modules; equation (5) is:
Figure BDA0003685607980000103
in the formula (I), the compound is shown in the specification,
Figure BDA0003685607980000104
equivalent bridge arm level number;
equation (6) is:
Figure BDA0003685607980000105
to J p,nx The switching state H of the Nth sub-module of the upper bridge arm can be obtained by judging the following conditions p,nxN And the number of levels L of the first N-1 sub-modules p,nx ：
1) When J is p,nx When it is an integer, H p,nxN 1 and
Figure BDA0003685607980000106
2) when J is p,nx When it is a non-integer, H p,nxN Is equal to 0 and
Figure BDA0003685607980000107
finally according to the level number L p,nx For the first N-1 sub-module capacitor voltage value u dcp,nxi (i is 1,2, …, N-1) to carry out voltage sequencing algorithm to obtain the switching state H of the first N-1 sub-modules in the bridge arm p,nxi 。
Fig. 3(a) is a graph of a bridge arm voltage waveform of a modular multi-level inverter under a conventional control method, and fig. 3(b) is a graph of a bridge arm voltage waveform of a modular multi-level inverter under a control method according to an embodiment of the present invention. u. of ap The bridge arm voltage on the a phase of the modular multilevel inverter is obtained. Each bridge arm comprises 10 submodules, the number of the bridge arm levels of the modular multi-level inverter is 20 under the control method of the embodiment of the invention, and the number of the bridge arm levels of the modular multi-level inverter is 11 under the traditional control method, which shows the effectiveness of the control method of the embodiment of the invention.
Fig. 4(a) is a waveform diagram of an output current of a modular multi-level inverter under a conventional control method, and fig. 4(b) is a waveform diagram of an output current of a modular multi-level inverter under a control method according to an embodiment of the invention. i.e. i a The voltage is output by a phase of the modular multilevel inverter. According to the control method provided by the embodiment of the invention, the output phase current THD of the modular multi-level inverter is 0.74%, and the traditional control methodThe output phase current THD of the modular multilevel inverter under the method is 1.62%, which shows that the control method of the embodiment of the invention can obviously improve the quality of output electric energy.
Fig. 5(a) is a diagram of a sub-module capacitor voltage waveform of a modular multilevel inverter under a conventional control method, and fig. 5(b) is a diagram of a sub-module capacitor voltage waveform of a modular multilevel inverter under a control method according to an embodiment of the invention. u. of dcpa1 The capacitor voltage of the first submodule of the upper bridge arm of the phase a, u dcpaN And the voltage of the nth sub-module capacitor of the upper bridge arm of the phase a is obtained. The maximum voltage fluctuation ratio is defined as follows:
U vol ％＝[max(u dcpxi )-u rate ]×100％/u rate ；
in the formula u rate Is the voltage rating. As can be seen from fig. 5, the maximum fluctuation rates of the capacitor voltages of the first sub-module and the nth sub-module of the upper bridge arm of the phase a of the modular multilevel inverter under the control method of the embodiment of the present invention are 2.9% and 3.4%, respectively, and the maximum fluctuation rates of the capacitor voltages of the first sub-module and the nth sub-module of the upper bridge arm of the phase a of the modular multilevel inverter under the conventional control method are 3.3% and 3.6%, respectively, which indicates that the control method of the embodiment of the present invention does not affect the balance of the capacitor voltages of the sub-modules.

Claims (9)

1. A method of controlling a modular multilevel inverter, the method comprising, for any phase of the modular multilevel inverter:
s1, establishing middle and upper bridge arm voltage u of each bridge arm of the modular multilevel inverter px And lower bridge arm voltage u nx The mathematical model of (1) extracts the upper bridge arm current i px And lower arm current i nx ；x＝a,b,c；
S2, utilizing the upper bridge arm current i px Lower bridge arm current i nx And calculating to obtain the output current i of each phase of the modular multilevel inverter ox And a circulating current i zx ；
S3, using the mathematical model to output current i ox And a circulating current i zx Carrying out dead beat current control to obtain output currentBridge arm voltage modulation signal u for tracking and circulating current suppression pxr And u nxr ；
S4, comparing the voltage modulation signals u of the upper bridge arm/the lower bridge arm for any upper bridge arm/lower bridge arm p,nxr Carriers u out of phase with N' same amplitudes p,ncxk Obtaining the equivalent upper bridge arm/lower bridge arm level number, and obtaining the switching state H of the Nth power sub-module in the upper bridge arm/lower bridge arm according to the relation between the equivalent upper bridge arm/lower bridge arm level number and the actual upper bridge arm/lower bridge arm level number p,nxN And the number of levels L of the first N-1 power sub-modules p,nx (ii) a k is 1,2, …, N'; n ═ 2N-1; n is the number of upper bridge arm/lower bridge arm power sub-modules;
s5, and carrying out capacitance voltage u on the first N-1 power sub-modules of the upper bridge arm/lower bridge arm dcp,nxi Sequencing according to the principle of from small to large, and selecting front L when the bridge arm current is in the charging direction p,nx Each power sub-module is put into use, and other power sub-modules bypass; when the bridge arm current is in the discharging direction, selecting the rear L p,nx Each power sub-module is put into use, and other power sub-modules bypass; 1,2, …, N-1;
s6, the first N-1 power sub-module capacitors of the upper bridge arm/lower bridge arm are charged or discharged according to the driving signals, and the capacitor voltage is stabilized at the reference value
Figure FDA0003685607970000011
Nearby.
2. The modular multilevel inverter control method of claim 1, further comprising:
s7, for the Nth power sub-module of each phase upper bridge arm/lower bridge arm, adopting a single-phase PWM rectifier to make the Nth power sub-module obtain a stable reference value
Figure FDA0003685607970000012
The nearby capacitor voltage is established according to the topological structure of the single-phase PWM rectifier, and the output voltage u on the direct current side of the single-phase PWM rectifier dcp,nxN Net side current i sp,nx Shape of (1)Combining the state equation to obtain a modulated wave signal u for stabilizing the output voltage on the DC side rp,nx For the modulated wave signal u rp,nx Performing single-pole frequency multiplication modulation to obtain a driving signal of the power switching tube of the single-phase PWM rectifier, so that the direct-current side of the single-phase PWM rectifier outputs a voltage u dcp,nxN Stabilized at a reference value
Figure FDA0003685607970000013
And nearby, simultaneously enabling the capacitance voltage of the Nth power sub-module to be half of the capacitance voltage of the first N-1 sub-modules.
3. The method for controlling a modular multilevel inverter according to claim 1, wherein in step S1, the mathematical model has the expression:
Figure FDA0003685607970000021
wherein, U dc For the DC bus voltage of the modular multilevel inverter, L, R represents the bridge arm inductance and resistance, R o Is a load resistor.
4. The method of claim 1, wherein in step S2, the modular multilevel inverter outputs a current i per phase ox And a circulating current i zx The calculation formula of (2) is as follows: i.e. i ox ＝i px -i nx ，
Figure FDA0003685607970000022
5. The method for controlling the modular multilevel inverter according to claim 1, wherein in step S3, the bridge arm voltage modulation signal u pxr And u nxr The calculation formula of (c) is:
Figure FDA0003685607970000023
wherein the content of the first and second substances,
Figure FDA0003685607970000024
in order to output the reference value of the current,
Figure FDA0003685607970000025
is a circulating current reference value, P 1 、P 2 Respectively controller parameters for output current and circulating current.
6. The method of claim 1, wherein in step S4, when J is reached p,nx When it is an integer, H p,nxN 1 and
Figure FDA0003685607970000026
when J is a non-integer, H p,nxN Is equal to 0 and
Figure FDA0003685607970000027
wherein the content of the first and second substances,
Figure FDA0003685607970000028
equivalent bridge arm level number
Figure FDA0003685607970000029
round () is a rounding function;
Figure FDA00036856079700000210
the switch states of the N' equivalent submodules.
7. The modular multilevel inverter control method according to claim 2, wherein in step S7,
Figure FDA00036856079700000211
wherein u is rp,nx Modulating signals for the voltage of the single-phase PWM rectifier in the upper bridge arm/the lower bridge arm; u. of sx The voltage is the network side voltage of the single-phase PWM rectifier;
Figure FDA00036856079700000212
setting a network side inductance voltage of a single-phase PWM rectifier in an upper bridge arm/a lower bridge arm;
Figure FDA00036856079700000213
is the nth sub-module capacitor voltage reference value.
8. The method for controlling a modular multilevel inverter according to claim 2, wherein in step S7, the equation of state expression is:
Figure FDA00036856079700000214
wherein L is s Is a single-phase PWM rectifier network side inductor, C sm Supporting capacitors, R, for the DC side of the single-phase PWM rectifier L Is a load resistance on the DC side of the single-phase PWM rectifier, S L 、S R Are the switching functions of the left and right bridge arms of the single-phase PWM rectifier, u sx Is the network side voltage of the single-phase PWM rectifier.
9. A modular multilevel inverter control system comprising a processor and a memory; the processor, when executing the computer program instructions stored in the memory, performs the steps of the method of any one of claims 1 to 8.
CN202210645112.7A 2022-06-09 2022-06-09 Control method and system for modular multilevel inverter Pending CN115102377A (en)

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