CN112865563B - Three-port clamping type back-to-back bridgeless three-level rectifier - Google Patents

Three-port clamping type back-to-back bridgeless three-level rectifier Download PDF

Info

Publication number
CN112865563B
CN112865563B CN202110121279.9A CN202110121279A CN112865563B CN 112865563 B CN112865563 B CN 112865563B CN 202110121279 A CN202110121279 A CN 202110121279A CN 112865563 B CN112865563 B CN 112865563B
Authority
CN
China
Prior art keywords
inductor
voltage
capacitor
mode
diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202110121279.9A
Other languages
Chinese (zh)
Other versions
CN112865563A (en
Inventor
马辉
曾雨涵
周沫函
邹旭
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
China Three Gorges University CTGU
Original Assignee
China Three Gorges University CTGU
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by China Three Gorges University CTGU filed Critical China Three Gorges University CTGU
Priority to CN202110121279.9A priority Critical patent/CN112865563B/en
Publication of CN112865563A publication Critical patent/CN112865563A/en
Application granted granted Critical
Publication of CN112865563B publication Critical patent/CN112865563B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H02M1/4225—Arrangements for improving power factor of AC input using a non-isolated boost converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/66—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal
    • H02M7/68—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters
    • H02M7/72—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/79—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/797—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)

Abstract

A three-port clamping type back-to-back bridgeless three-level rectifier belongs to the technical field of power electronic converters. Including three-port clamping structures, conventional rectifier bridge arm structures. Compared with the traditional rectifier bridge arm, the three-level rectifier clamps the capacitor voltage by using the three-port structure, so that the voltage stress born by each semiconductor device in the three-port structure is reduced. At the same time, an additional power branch is provided which is directly connected to the midpoint of the series capacitor. The three-level rectifier of the invention provides an extra power channel, and simultaneously improves the stability and reliability of the circuit due to the addition of a new diode structure. Compared with the traditional two-level rectifier, the rectifier can realize that the level number of the alternating-current side phase voltage is three, and can obviously reduce the capacitance value; reducing voltage stress of the device; the cost of the capacitor and the semiconductor device is reduced, but the volume of the circuit is increased correspondingly due to the complexity of the three-port structure.

Description

Three-port clamping type back-to-back bridgeless three-level rectifier
Technical Field
The invention relates to the technical field of single-phase three-level active rectifiers, in particular to a three-port clamping type back-to-back bridgeless three-level rectifier.
Background
For conventional Power Factor Correction (PFC) rectifiers, high efficiency cannot be achieved over a wide input voltage range, such as the utility grid as a power source, and efficiency will be greatly reduced when the alternating voltage level is low. The three-port clamped back-to-back bridgeless three-level rectifier can flexibly adapt to a proper working mode to obtain maximum efficiency due to the adoption of a three-level structure. Meanwhile, the three-port clamping type back-to-back bridgeless three-level rectifier can keep outputting stable voltage to a load under the condition of maintaining high power factor. Compared with the traditional two-level rectifier, the back-to-back bridgeless three-level rectifier with the three ports clamped has smaller ripple level; less device voltage stress; better power factor and power density; reducing reactive power exchange with the utility grid. Meanwhile, the circuit adopts a working mode of three-port clamping capacitor voltage, so that the influence of disturbance on the alternating current side can be effectively isolated. However, the main loop of the circuit has a larger volume, so that the use of a three-port clamping type back-to-back bridgeless three-level rectifier is limited in some occasions.
Disclosure of Invention
The invention provides a three-port clamping type back-to-back bridgeless three-level rectifier, which reduces the voltage stress requirement on circuit elements compared with the traditional two-level rectifier circuit. The rectifier bridge is provided with a multi-diode structure, the switch tube is connected with part of the diodes in parallel, the borne voltage stress is reduced, and the cost of the switch tube is reduced; two polar capacitors are used in series, and the voltage of the capacitors is reduced; when the rectifier circuit works, the number of semiconductor devices flowing through is not more than 3, and the working loss of the circuit is small; the working mode of the circuit is switched by only changing one switching tube, so that the switching loss of the circuit is effectively reduced. The direct current bus is connected in series by two capacitors to work, and output current ripples are effectively reduced.
The technical scheme adopted by the invention is as follows:
a three-port clamped back-to-back bridgeless three-level rectifier comprising:
switch tube S1、S2、S3Diode D1、D2、D3、D4、D5、D6、D7、D8Inductor L, capacitor C1、C2；
One end of an alternating current power supply is connected with one end of an inductor L, and the other end of the inductor L is respectively connected with a switch tube S1Drain electrode, diode D1Anode, diode D2A cathode;
the other end of the AC power supply is respectively connected with a switch tube S2Drain electrode, diode D4Anode, diode D5A cathode;
switch tube S1Source electrode connecting switch tube S2A source electrode;
diode D1The cathodes are respectively connected with a diode D3Cathode and capacitor C1One end;
diode D2The anodes are respectively connected with a diode D6Anode and capacitor C2The other end;
switch tube S3The drain electrodes are respectively connected with a diode D3Anode, diode D4Cathode, diode D7A cathode;
switch tube S3The source electrodes are respectively connected with a diode D5Anode, diode D8Anode, diode D6A cathode;
capacitor C1The other ends are respectively connected with a diode D7Anode, diode D8Cathode and capacitor C2One end;
the two ends of the load R are respectively connected with a capacitor C1One terminal, capacitor C2And the other end.
The invention discloses a three-port clamping type back-to-back bridgeless three-level rectifier, which has the following technical effects:
1. the rectification circuit is composed of semiconductor bidirectional switches S1, S2, S3, D4, D5, D7 and D8; the rectifier bridge diodes D1, D2, D3, D4, D5, D6 and the parallel capacitors C1 and C2 form a three-port clamping structure S3, D7 and D8.
2. The invention discloses a three-port clamping type back-to-back bridgeless three-level rectifier, which comprises a rectification loop which is improved from a traditional single-phase three-level rectifier bridge and introduces a circuit tube structure circuit method with a plurality of diodes connected in series.
3. The three-port clamping type back-to-back bridgeless three-level rectifier respectively charges two capacitors used for clamping voltage through conversion of working modes, rectifies an alternating current power supply and outputs three voltage levels together.
4. The three-port clamping type back-to-back bridgeless three-level rectifier utilizes the energy storage characteristic of the inductor and uses the characteristic that the current on the L can not be suddenly changed to cooperate with the common clamping voltage of the diode and the capacitor, thereby maintaining the stable voltage of the bus and ensuring that the voltage ripple output by the direct current bus is smaller.
Drawings
FIG. 1 is a main topology structure diagram of a three-port clamped back-to-back bridgeless three-level rectifier circuit according to the present invention;
FIG. 2 is a diagram of a three-port clamped back-to-back bridgeless three-level rectifier circuit according to a first embodiment of the present invention;
FIG. 3 is a diagram of a two-port clamped back-to-back bridgeless three-level rectifier circuit according to a second mode of operation of the present invention;
FIG. 4 is a diagram of three working modes of a three-port clamped back-to-back bridgeless three-level rectifier circuit according to the present invention;
FIG. 5 is a diagram of the three-port clamped back-to-back bridgeless three-level rectifier circuit according to the present invention;
FIG. 6 is a five-diagram of the three-port clamped back-to-back bridgeless three-level rectifier circuit according to the present invention;
FIG. 7 is a six-diagram of the three-port clamped back-to-back bridgeless three-level rectifier circuit according to the present invention;
FIG. 8 shows a circuit switch S of the present invention1～S4Six working mode diagrams;
FIG. 9 shows the circuit voltage U of the present inventionabA waveform diagram;
FIG. 10 shows the AC-side input voltage U of the circuit of the present inventionsAnd current iLA waveform diagram;
FIG. 11 shows the DC output voltage U of the circuit of the present inventiondcA waveform diagram;
FIG. 12(1) is a first diagram of switching tube pulse distribution for the circuit of the present invention;
FIG. 12(2) is a second diagram of switching tube pulse distribution for the circuit of the present invention;
FIG. 12(3) is a third diagram of the switch pulse distribution of the circuit of the present invention.
Detailed Description
The specific experimental parameters were as follows:
a three-port clamping type back-to-back bridgeless three-level rectifier is characterized in that the effective value of a power grid voltage at an input side is 220V, the frequency is 50Hz, the output voltage at a direct current side is 400V, the switching frequency is 20kHz, the filter inductance L is 3mH, the resistance value of a load RL is 80, and the output capacitance C1 is C2 is 4700 mu F.
A three-port clamping type back-to-back bridgeless three-level rectifier comprises a novel single-phase three-level PWM (pulse-width modulation) rectifying circuit, an uncontrolled rectifying bridge circuit, a bidirectional switching tube circuit and two serially connected voltage-stabilizing capacitor circuits;
adopt three level rectifiers of back to back bridgeless of many diode tandem type to be single-phase three level PWM rectifier circuit, it includes 4 switch tubes: s1、S2、S3、S 46 diodes: d1、D2、D3、D4、D5、D6The bridge arm comprises 2 MOS tubes and 6 diodes used for clamping voltage.
The PWM rectification circuit consists of an energy storage filter inductor L and a back-to-back MOS tube set S1、S2Composed bidirectional switch and semiconductor device S3、S4、D5、D6The parallel voltage-stabilizing branch of the bidirectional switch is composed of a capacitor C1、C2Are connected in series. An inductor L is connected with the other end of the alternating current power supply, and the branch is connected with the inductor S1、S2The formed bidirectional switches are connected in parallel. Voltage-stabilizing branch capacitor C1、C2After being connected in series, the DC bus is connected with the output end of the DC bus in parallel.
A rectification loop included by the rectifier circuit is improved on a traditional bridgeless single-phase two-level rectifier bridge, and two serially connected capacitor voltage-stabilizing structures are introduced to construct a three-level circuit.
The rectifier circuit is provided with a power input end and two power output ends, wherein the power input end corresponds to the power output end of the power grid and corresponds to the two voltage stabilizing capacitors.
The power input end of the rectifier circuit introduces a back-to-back switch structure, and the voltage at the input end is subjected to boost conversion, so that the structure of a boost loop is simplified.
Because the operating characteristic of power frequency alternating grid voltage, for guaranteeing back to back no bridge three-level rectifier circuit output voltage's stability, need adjust different working mode in the electric wire netting voltage interval of difference:
1) mode 1: as shown in fig. 2, the switching tubes are all open. u. ofs>+Udc/2,uab＝UdcThe inductor L releases energy, iLGradually decreasing, capacitance C1、C2And (6) charging.
2) Mode 2: as shown in fig. 3, the switching tube S3And the other switching tubes are switched on and off. Since modality 2 has two operating states, it needs to be discussed case by case.
At us>+UdcAt/2, uab＝Udc/2, when the inductance L absorbs energy, iLGradually increased, capacitance C1Charging, C2And (4) discharging.
At us<+UdcAt/2, uab＝Udc/2, when the inductor L releases energy, iLGradually decreasing, capacitance C1Charging, C2And (4) discharging.
3) Modality 3: as shown in fig. 4, the switching tube S1、S2And the other switching tubes are switched on and off. 0<us<+Udc/2，uabInductance absorbs energy, i ═ 0LGradually increased, capacitance C1、C2And (4) discharging.
4) Modality 4: as shown in fig. 5, the switching tube S3And the other switch tubes are switched on and switched off. u. ofs<-Udc/2，uab＝UdcThe inductor L releases energy, iLGradually decreasing, capacitance C1、C2And (6) charging.
5) Mode 5: as shown in fig. 6, the switching tube S4And the other switching tubes are switched on and off. Since modality 2 has two operating states, it needs to be discussed case by case.
At us<-UdcAt/2, uab＝Udc/2, when the inductance L absorbs energy, iLGradually increased, capacitance C2Charging, C1And (4) discharging.
At 0>us>-UdcAt/2, uab＝Udc/2, when the inductor L releases energy, iLGradually decreasing, capacitance C2Charging, C1And (4) discharging.
6) Modality 6: as shown in fig. 7, the switching tube S1、S2And the other switching tubes are switched on and off. 0>us>-Udc/2，uabInductance of 0Absorption of energy, iLGradually increase and capacitance C1、C2And (4) discharging.
Fig. 8, 9, 10 and 11 are experimental waveforms of the present invention when the load is 80 Ω, and are related waveforms of the present invention in a steady state.
FIG. 8 shows a circuit switch S of the present invention1～S4Six working mode diagrams; the on state of the switch tube is represented by 1, and the off state of the switch tube is represented by 0. According to the invention, different ab-end output voltages U are obtained by changing the circuit structure through the combination of on-off of different switching tubesab. The output rated voltage is represented by +/-1, +/-1/2 and 0, and the ab terminal voltage is 0. FIG. 9 shows the circuit voltage U of the present inventionabA waveform diagram; on the basis of FIG. 8, the switch tube S is switched by the pair circuit1～S3The invention is applied to the modulation of the on and off states of a direct current bus UdcWhen the rated output voltage is 400V, the voltage at the ab end can output rated voltage which is half of the rated voltage and 0 voltage grade, namely voltages of +/-400V, +/-200V and 0V. FIG. 10 shows the AC-side input voltage U of the circuit of the present inventionsAnd current iLA waveform diagram; showing the steady-state AC input voltage U of the inventionsThe waveform keeps changing in a sine rule; AC input current iLWaveform following AC input voltage UsThe waveform is stable and approaches to a sine wave, and the voltage and current phases of the circuit are basically the same through experimental waveform comparison, so that the power factor correction function can be realized.
FIG. 11 shows the DC output voltage U of the circuit of the present inventiondcA waveform diagram; shows the voltage U on the side of the DC bus obtained by outputting when the rated voltage is 400VdcThe steady state waveform of (a).
FIG. 12(1) is a first diagram of switching tube pulse distribution of the circuit of the present invention. For the switching tube S of the invention1Switching pulse voltage US1And the waveform diagram shows a switching pulse distribution signal, namely the driving voltage for switching on and off the switching tube. When the voltage of the switch tube reaches 12V, the switch tube is conducted corresponding to the signal 1 in FIG. 8. When the voltage of the switch tube reaches 0V, the switch tube is turned off corresponding to the 0 signal in fig. 8.
FIG. 12(2) is a second diagram of switching tube pulse distribution of the circuit of the present invention. For the switching tube S of the invention2Switching pulse voltage US2And the waveform diagram shows a switching pulse distribution signal, namely the driving voltage for switching on and off the switching tube. When the voltage of the switch tube reaches 12V, the switch tube is conducted corresponding to the signal 1 in FIG. 8. When the voltage of the switch tube reaches 0V, the switch tube is turned off corresponding to the 0 signal in fig. 8.
FIG. 12(3) is a third diagram of the switch pulse distribution of the circuit of the present invention. A switch tube S of the invention3Switching pulse voltage US3And the waveform diagram shows a switching pulse distribution signal, namely the driving voltage for switching on and off the switching tube. When the voltage of the switch tube reaches 12V, the switch tube is conducted corresponding to the signal 1 in FIG. 8. When the voltage of the switch tube reaches 0V, the switch tube is turned off corresponding to the 0 signal in fig. 8.

Claims (2)

1. A three-port clamped back-to-back bridgeless three-level rectifier, comprising:
switch tube S1、S2、S3Diode D1、D2、D3、D4、D5、D6、D7、D8Inductor L, capacitor C1、C2；
One end of an alternating current power supply is connected with one end of an inductor L, and the other end of the inductor L is respectively connected with a switch tube S1Drain electrode, diode D1Anode, diode D2A cathode, the connection point of which constitutes an a-terminal;
the other end of the AC power supply is respectively connected with a switch tube S2Drain electrode, diode D4Anode, diode D5A cathode;
switch tube S1Source electrode connecting switch tube S2A source electrode, the connection point of which constitutes a b terminal;
diode D1The cathodes are respectively connected with a diode D3Cathode and capacitor C1One end;
diode D2The anodes are respectively connected with a diode D6Anode and capacitor C2The other end;
switch tube S3The drain electrodes are respectively connected with a diode D3Anode, diode D4Cathode, diode D7A cathode;
switch tube S3The source electrodes are respectively connected with a diode D5Anode, diode D8Anode, diode D6A cathode;
capacitor C1The other ends are respectively connected with a diode D7Anode, diode D8Cathode, capacitor C2One end;
the two ends of the load R are respectively connected with a capacitor C1One terminal, capacitor C2The other end;
different working modes are adjusted in different power grid voltage intervals:
1) mode 1: switch tube S1、S2、S3Are all turned off, diode D1、D5、D6When operating in the on state, the loop passes through the capacitor C1、C2At this time, the grid voltage us<Udc(ii) a Capacitor C1、C2Releasing energy to stabilize the DC bus voltage at UdcSince the current on the inductor L cannot suddenly change, a balanced voltage u is generated on the inductor Lab＝Udc(ii) a At this time, the inductor releases energy, the current on the inductor L is reduced, and the capacitor C1、C2Charging; wherein, UdcIs the voltage across the load R, uabIs the voltage between the a terminal and the b terminal;
2) mode 2: switch tube S1、S2Off, S3Conducting; diode D1、D5、D7When operating in the on state, the loop passes through the capacitor C1(ii) a When the grid voltage us<+UdcAt/2, the capacitor C cannot change suddenly due to the current on the inductor L1Releasing energy to stabilize the ab terminal voltage at UdcAt/2, a balanced voltage u is generated on the inductor Lab＝Udc2; at this time, the inductor releases energy, the current on the inductor L is reduced, and the capacitor C1Charging, capacitance C2Discharging; when the grid voltage us>+UdcAt/2, due to inductance LCannot suddenly change the current of1Stabilize the voltage of ab terminal at UdcAt/2, a balanced voltage u is generated on the inductor Lab＝Udc2; at this time, the inductor absorbs energy, the current on the inductor L increases, and the capacitor C1Charging, capacitance C2Discharging;
3) modality 3: switch tube S3Off, S1、S2Conducting; diodes in the circuit are all cut off, and a power channel does not exist between a power grid and a load; the network voltage is now 0<us<+Udc2; the current on the inductor L cannot suddenly change, so that the capacitor C1、C2Releasing energy to stabilize the DC bus voltage at UdcOn the inductor L, a balance voltage u is generatedab0; at this time, the inductor absorbs energy, the current on the inductor L increases, and the capacitor C1、C2Discharging;
4) modality 4: switch tube S1、S2、S3Are all turned off, diode D2、D3、D4When operating in the on state, the loop passes through the capacitor C1、C2At this time, the grid voltage us<-Udc2; the current on the inductor L cannot suddenly change, so that the capacitor C1、C2Releasing energy to stabilize the DC bus voltage at UdcOn the inductor L, a balanced voltage is generated to make-uab＝Udc(ii) a At this time, the inductor releases energy, the current on the inductor L is reduced, and the capacitor C1、C2Charging;
5) mode 5: switch tube S1、S2Off, S3Conducting; diode D2、D4、D8When the circuit is in the on state, the loop flows through the capacitor C2(ii) a When the grid voltage us>-UdcAt/2, the capacitor C cannot change suddenly due to the current on the inductor L2Releasing energy to stabilize the voltage of the direct current bus at the voltage of the ab end at UdcAt/2, a balanced voltage is generated at the inductor L to make-uab＝Udc2; at this time, the inductor releases energy, the current on the inductor L is reduced, and the capacitor C2Charging, capacitance C1Discharge of electricity(ii) a When the grid voltage us<-UdcAt/2, the current on the inductor L cannot change suddenly, and the capacitor C2Stabilize the voltage of ab terminal at UdcAt/2, a balanced voltage is generated on the inductor L to make-uab＝Udc2; at this time, the inductor absorbs energy, the current on the inductor L increases, and the capacitor C2Charging, capacitance C1Discharging;
6) modality 6: switch tube S3Off, S1、S2Conducting; diodes in the circuit are all cut off, and a power channel does not exist between a power grid and a load; the network voltage is now 0<us<-Udc2; the current on the inductor L cannot suddenly change, so that the capacitor C1、C2Will release energy to stabilize the DC bus voltage at UdcOn the inductor L, a balance voltage u is generatedab0; at this time, the inductor absorbs energy, the current on the inductor L increases, and the capacitor C1、C2And (4) discharging.
2. The three-port clamped back-to-back bridgeless three-level rectifier of claim 1, wherein: charging and discharging operation is carried out on the direct current bus side capacitor by changing the state of the switch tube, and the circuit has U in the positive half period of the power griddc、UdcThe working states of three voltage levels of/2 and 0 respectively correspond to a mode 1, a mode 2 and a mode 3, and a positive half-cycle PWM modulation process:
(1) stage one: the network voltage is now 0<us<+UdcThe working state of the circuit can be switched back and forth between a mode 2 and a mode 3 according to the modulation waveform obtained by PWM comparison, and corresponds to a pulse signal within the range of 0V to 200V for the first time in a positive half period; the inductor L cannot change current suddenly, so the capacitor C1、C2Is sufficiently large; at this time, in the mode 3, the inductor L is directly connected in series with the power grid voltage source, and the voltage of the inductor L is equal to the power grid voltage usThe inductor divides voltage and stores energy, and the power of the DC bus is controlled by the capacitor C1、C2Providing; after switching from mode 2 to mode 3, due to the capacitance C1Has a voltage of Udc/2, the grid voltage usSmaller than the capacitance C1In order to prevent the current from being cut off by the diode and changing suddenly, the inductor L provides a forward voltage, and the energy stored in the inductor L is released in the mode 3;
(2) and a second stage: the network voltage u thens>+UdcThe working state of the circuit can be switched back and forth between a mode 2 and a mode 1 according to the modulation waveform obtained by PWM comparison, and corresponds to a pulse signal within the range of 200V to 400V in a positive half period; the inductor current cannot change suddenly, so that the capacitor C1、C2Is sufficiently large; at this time, the voltage due to the loop connection in mode 2 is clamped by the capacitor UdcAt/2, the inductor divides voltage and stores part of energy; after switching from mode 2 to mode 1, the voltage on the DC bus side is clamped at UdcUpper and lower at the same time us<UdcThe inductor provides a forward voltage to prevent the current from being cut off by the diode to generate sudden change, and the energy stored in the inductor is released in the mode 1 when the circuit is in the mode 2;
(3) and a third stage: the network voltage is now 0<us<+UdcThe working state of the circuit can be switched back and forth between a mode 2 and a mode 3 according to the modulation waveform obtained by PWM comparison, and corresponds to a pulse signal within the range of 0V to 200V for the second time in a positive half period; the inductor L cannot change current suddenly, so the capacitor C1、C2Is sufficiently large; at this time, in the mode 3, the inductor L is directly connected in series with the power grid voltage source, and the voltage of the inductor L is equal to the power grid voltage usThe inductor divides voltage and stores energy, and the power of the DC bus is controlled by the capacitor C1、C2Providing; after switching from mode 2 to mode 3, due to the capacitance C1Has a voltage of Udc/2, the grid voltage usSmaller than the capacitance C1In order to prevent the current from being cut off by the diode and changing suddenly, the inductor L provides a forward voltage, and the energy stored in the inductor L is released in the mode 3;
during the negative half-cycle of the grid, the circuit has-Udc、-UdcThe working states of the three voltage levels of/2 and 0 respectively correspond to a mode 4, a mode 5 and a mode 6.
CN202110121279.9A 2021-01-28 2021-01-28 Three-port clamping type back-to-back bridgeless three-level rectifier Active CN112865563B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110121279.9A CN112865563B (en) 2021-01-28 2021-01-28 Three-port clamping type back-to-back bridgeless three-level rectifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110121279.9A CN112865563B (en) 2021-01-28 2021-01-28 Three-port clamping type back-to-back bridgeless three-level rectifier

Publications (2)

Publication Number Publication Date
CN112865563A CN112865563A (en) 2021-05-28
CN112865563B true CN112865563B (en) 2022-06-14

Family

ID=75987847

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110121279.9A Active CN112865563B (en) 2021-01-28 2021-01-28 Three-port clamping type back-to-back bridgeless three-level rectifier

Country Status (1)

Country Link
CN (1) CN112865563B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113437883A (en) * 2021-06-28 2021-09-24 三峡大学 Three-level rectifier of parallel single-tube bidirectional switch

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102097959A (en) * 2010-12-28 2011-06-15 易事特电力系统技术有限公司 Space vector pulse width modulation method of three-phase three-level VIENNA type rectifier
CN103187887A (en) * 2011-12-31 2013-07-03 伊顿公司 Controller used for three-phase three-wire Vienna rectifier
CN106026630A (en) * 2016-05-18 2016-10-12 浙江大学 Variable-modal bridgeless PFC circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101902143B (en) * 2010-07-26 2012-05-23 南京航空航天大学 Capacitor-clamped three-level dual-buck half-bridge inverter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102097959A (en) * 2010-12-28 2011-06-15 易事特电力系统技术有限公司 Space vector pulse width modulation method of three-phase three-level VIENNA type rectifier
CN103187887A (en) * 2011-12-31 2013-07-03 伊顿公司 Controller used for three-phase three-wire Vienna rectifier
CN106026630A (en) * 2016-05-18 2016-10-12 浙江大学 Variable-modal bridgeless PFC circuit

Also Published As

Publication number Publication date
CN112865563A (en) 2021-05-28

Similar Documents

Publication Publication Date Title
CN111030440B (en) Single-phase two-tube five-level rectifier based on hybrid H bridge
CN112865560B (en) Multi-diode series back-to-back bridgeless three-level rectifier
WO2014000490A1 (en) Five-level power converter, controlling method and controlling device thereof
CN111416534B (en) Current path reconstruction type single-phase five-level rectifier
WO2007110954A1 (en) Power supply apparatus
CN111416535B (en) Three-mode mixed single-phase five-level rectifier
CN112865569A (en) Single-phase three-level rectifier of mixed T-shaped bridge
CN110086360A (en) A kind of five level high efficiency rectifiers
US6239995B1 (en) Resonant-boost-input three-phase power factor corrector with a low current stress on switches
CN115085347A (en) Energy storage power module and energy storage system
CN210490732U (en) Energy storage converter
CN110165921B (en) Switch inductor type quasi Z source inverter with high output voltage gain
CN115065230A (en) Three-phase bridgeless SEPIC type PFC converter
CN109167525B (en) Novel non-isolated five-level inverter
CN112865563B (en) Three-port clamping type back-to-back bridgeless three-level rectifier
CN100377481C (en) Integration converton with three phase power factor correction
CN113258797B (en) Back-to-back type three-level rectifier of heterogeneous switching tube bridge arm
CN113193768B (en) Four-switch-tube series-type back-to-back three-level rectifier
CN112865561B (en) Diode clamping type back-to-back bridgeless three-level rectifier
US20230253877A1 (en) Power factor correction and dc-dc multiplexing converter and uninterruptible power supply including the same
CN109217704B (en) Non-isolated five-level inverter for suppressing system leakage current
CN112865562B (en) Single-phase three-switch tube pseudo-totem-pole type three-level rectifier
CN113271023B (en) Back-to-back type three-level rectifier of heterogeneous hybrid bridge arm
CN214315050U (en) Wide-voltage hybrid PFC converter and switching power supply
CN112865508A (en) Single-phase three-level power factor correction circuit of novel asymmetric T-shaped bridge

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
EE01 Entry into force of recordation of patent licensing contract
EE01 Entry into force of recordation of patent licensing contract

Application publication date: 20210528

Assignee: Hubei Zhikan Technology Co.,Ltd.

Assignor: CHINA THREE GORGES University

Contract record no.: X2023980043945

Denomination of invention: A Three Port Clamping Back-to-Back Bridgeless Three Level Rectifier

Granted publication date: 20220614

License type: Common License

Record date: 20231024