CN115080485B - Data transmission method, device, equipment and storage medium - Google Patents

Data transmission method, device, equipment and storage medium Download PDF

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Publication number
CN115080485B
CN115080485B CN202210756865.5A CN202210756865A CN115080485B CN 115080485 B CN115080485 B CN 115080485B CN 202210756865 A CN202210756865 A CN 202210756865A CN 115080485 B CN115080485 B CN 115080485B
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data
attribute information
sender
receiver
transmission
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CN115080485A (en
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王炳坤
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De Rucci Healthy Sleep Co Ltd
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De Rucci Healthy Sleep Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4009Coupling between buses with data restructuring
    • G06F13/4018Coupling between buses with data restructuring with data-width conversion
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/12Synchronisation of different clock signals provided by a plurality of clock generators
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Communication Control (AREA)

Abstract

The invention discloses a data transmission method, a data transmission device, data transmission equipment and a storage medium. The method is executed by a data sender, and the data transmission method comprises the following steps: acquiring attribute information of a data sender and attribute information of a data receiver; determining transmission format information according to the attribute information of the data sender and the attribute information of the data receiver; and determining data to be transmitted according to the transmission format information, and transmitting the data to be transmitted to a data receiver. According to the embodiment of the invention, the attribute information of the data sender and the attribute information of the data receiver are obtained, the sending format information is determined according to the attribute information of the data sender and the attribute information of the data receiver, the data to be sent is determined according to the sending format information, and the data to be sent is sent to the data receiver, so that the data transmission between the data sender and the data receiver is realized.

Description

Data transmission method, device, equipment and storage medium
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a data transmission method, apparatus, device, and storage medium.
Background
The parallel transmission mode has high speed but needs more buses, such as 8 data lines or 16 data lines, and can transmit one byte or more bytes at a time; the serial transmission mode has low speed but needs a small number of buses, and can complete data transmission by only one data line, and space is replaced by time by splitting each byte data into 8 bits and then serial transmission of one bit. Because the number of buses used for serial transmission is small, the serial transmission is convenient to connect during use, and is widely applied to parallel transmission under the condition of low transmission rate. How to further increase the data transmission rate with a small number of buses is a research-worthy direction.
Disclosure of Invention
The invention provides a data transmission method, a device, equipment and a storage medium, which are used for further improving the data transmission speed under the condition of using a small number of buses.
According to an aspect of the present invention, there is provided a data transmission method performed by a data sender, the data transmission method comprising:
acquiring attribute information of a data sender and attribute information of a data receiver;
determining transmission format information according to the attribute information of the data sender and the attribute information of the data receiver;
And determining data to be transmitted according to the transmission format information, and transmitting the data to be transmitted to the data receiver.
According to another aspect of the present invention, there is provided a data transmission method performed by a data receiver, the data transmission method comprising:
acquiring attribute information of a data sender and attribute information of a data receiver;
determining receiving format information according to the attribute information of the data sender and the attribute information of the data receiver;
and splicing the received data according to the receiving format information to obtain target data.
According to another aspect of the present invention, there is provided a data transmission apparatus comprising:
the first acquisition module is used for acquiring attribute information of a data sender and attribute information of a data receiver;
a first determining module, configured to determine transmission format information according to attribute information of the data sender and attribute information of the data receiver;
and the processing module is used for determining data to be transmitted according to the transmission format information and transmitting the data to be transmitted to the data receiver.
According to another aspect of the present invention, there is provided a data transmission apparatus comprising:
The second acquisition module is used for acquiring attribute information of the data sender and attribute information of the data receiver;
the second determining module is used for determining receiving format information according to the attribute information of the data sender and the attribute information of the data receiver;
and the splicing module is used for splicing the received data according to the receiving format information to obtain target data.
According to another aspect of the present invention, there is provided an electronic apparatus including:
at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the data transmission method according to any one of the embodiments of the present invention.
According to another aspect of the present invention, there is provided a computer readable storage medium storing computer instructions for causing a processor to execute a data transmission method according to any one of the embodiments of the present invention.
According to the technical scheme, the attribute information of the data sender and the attribute information of the data receiver are obtained, the sending format information is determined according to the attribute information of the data sender and the attribute information of the data receiver, the data to be sent is determined according to the sending format information, and the data to be sent is sent to the data receiver, so that data transmission between the data sender and the data receiver is realized.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flowchart of a data transmission method according to a first embodiment of the present invention;
fig. 2 is a flowchart of a data transmission method according to a second embodiment of the present invention;
fig. 3 is a schematic diagram of a data transmission method according to a third embodiment of the present invention;
fig. 4 is a schematic diagram of signal variation in a data transmission method according to a third embodiment of the present invention;
fig. 5 is a schematic diagram of signal variation in another data transmission method according to the third embodiment of the present invention;
Fig. 6 is a schematic structural diagram of a data transmission device according to a fourth embodiment of the present invention;
fig. 7 is a schematic structural diagram of a data transmission device according to a fifth embodiment of the present invention;
fig. 8 is a schematic structural diagram of an electronic device implementing a data transmission method according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "target," and the like in the description and claims of the present invention and in the above-described figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Example 1
Fig. 1 is a flowchart of a data transmission method according to a first embodiment of the present invention, where the method may be applied to a data transmission case, and the method may be performed by a data transmission device, where the data transmission device may be implemented in hardware and/or software, and the data transmission device may be integrated in any electronic device that provides a data transmission function. As shown in fig. 1, the method is performed by a data sender, and the data transmission method includes:
s101, acquiring attribute information of a data sender and attribute information of a data receiver.
Wherein the data sender may be a device that sends data out and the data receiver may be a device that receives data. In the actual operation process, the same device can simultaneously send data and receive data, namely, the same device can simultaneously serve as a data sender and a data receiver, and full duplex data transmission can be realized.
The attribute information of the data transmitting side may include the capability of how many bits of data the device transmitting data to the outside can transmit to the outside at a time (for example, 4 bits of data or 8 bits of data may be transmitted to the outside at a time), a rule of transmitting higher order data or lower order data first, and the like. The attribute information of the data receiving side may include the capability of how many bits of data the device receiving the data can receive at a time (for example, 4 bits of data or 8 bits of data can be received at a time), a rule of first receiving high order data or low order data, and the like.
Specifically, before data transmission is performed between two devices of a data sender and a data receiver, the attribute of the data sender and the attribute of the data receiver are respectively configured by the two devices, the data sender acquires attribute information of the data receiver, whether the data transmission can be performed between the two devices is determined, and if the data sender and the data receiver configure the same attribute information, the two devices can perform data transmission. For example, the attribute information configured by the data sender may be that 4 bits of data can be sent out at a time, and the higher bits of data are sent first and then the lower bits of data are sent, and the attribute information configured by the data receiver may be that 4 bits of data can be received at a time, and the higher bits of data are received first and then the lower bits of data are received. Of course, if it is desired to perform transmission of 8 bits of data at a time between the data sender and the data receiver, the attribute of the data sender needs to be configured to be able to send 8 bits of data out at a time, and the attribute of the data receiver needs to be configured to be able to receive 8 bits of data at a time.
In actual operation, for example, the SPI (Serial Peripheral Interface ) communication function of the microcontroller MCU (Micro Control Unit) may be set by configuring relevant registers of the MCU to enable the SPI to operate in various modes (e.g., transmit mode or receive mode), specifically as a master or as a slave, and whether the SPI transmits byte data in high order or low order, etc., which may be an initialization configuration by the MCU prior to data transmission.
S102, determining transmission format information according to the attribute information of the data sender and the attribute information of the data receiver.
The transmission format information may be how many bits of data are transmitted at a time when the data is transmitted to the outside (for example, 4 bits of data or 8 bits of data are transmitted to the outside at a time), or may be higher bits of data or lower bits of data are transmitted first when the data is transmitted to the outside (for example, 4 bits of data are transmitted to the outside at a time, one byte of data is composed of 8 bits of data, higher 4 bits of data out of 8 bits of data are transmitted first and lower 4 bits of data out of 8 bits of data are transmitted first and higher 4 bits of data out of 8 bits of data are transmitted first).
Specifically, the transmission format information is determined according to the attribute information of the data sender and the attribute information of the data receiver, for example, how many bits of data are transmitted at a time when the data sender sends data outwards, and whether the data sender sends high-order data or low-order data first when the data sender sends data outwards.
S103, determining data to be transmitted according to the transmission format information, and transmitting the data to be transmitted to a data receiver.
The data to be transmitted may be data processed by the data transmitter according to the transmission format information, where the data to be transmitted to the outside is transmitted. For example, the data to be sent to the outside by the data sender is 0xD5 (here, in the hexadecimal representation, the decimal number corresponding to the hexadecimal number D5 is 213), if the sending format information determined according to the attribute information of the data sender and the attribute information of the data receiver sends 4 bits of data to the outside by the data sender Fang Yici, and sends the upper 4 bits of data first and sends the lower 4 bits of data first, the 0xD5 is split into the upper 4 bits of data 0xD and the lower 4 bits of data 0x5, and the upper 4 bits of data 0xD and the lower 4 bits of data 0x5 are the data to be sent.
Specifically, the data to be sent outwards by the data sender is processed according to the sending format information, then the data to be sent is determined as the data to be sent, and the data to be sent is sent to the data receiver. For example, the data 0xD5 to be sent outwards by the data sender may be split into the high 4-bit data 0xD and the low 4-bit data 0x5 of the data to be sent, and the high 4-bit data 0xD and the low 4-bit data 0x5 of the data to be sent are sequentially sent to the data receiver.
Of course, if the data to be sent outwards by the data sender is 0xD5, and the sending format information determined according to the attribute information of the data sender and the attribute information of the data receiver can send 8 bits of data outwards at a time by the data sender, the data 0xD5 is directly determined as the data to be sent without splitting the data 0xD5, and the data 0xD5 to be sent is sent to the data receiver.
According to the embodiment of the invention, the attribute information of the data sender and the attribute information of the data receiver are obtained, the sending format information is determined according to the attribute information of the data sender and the attribute information of the data receiver, the data to be sent is determined according to the sending format information, and the data to be sent is sent to the data receiver, so that the data transmission between the data sender and the data receiver is realized.
Optionally, determining the transmission format information according to the attribute information of the data sender and the attribute information of the data receiver includes:
the first number of bits is determined based on the attribute information of the data sender and the attribute information of the data receiver.
The first bit number may be the number of how many bits of data the data sender can send out at a time, and the data receiver can receive how many bits of data at a time. Specifically, the first number of bits may be determined according to attribute information of the data sender and attribute information of the data receiver.
Specifically, the number of bits of data which are transmitted by the data transmitter at one time is determined according to the attribute information of the data transmitter, and the number of bits of data which can be received by the data receiver at one time is determined according to the attribute information of the data receiver.
The transmission format information is determined according to the first number of bits.
Specifically, the transmission format information is determined according to the first number of bits. For example, if the first number of bits is 4, the transmission format information may be to split one byte of data into two parts, each part consisting of 4 bits of data, for example, splitting data 0xD5 into high 4 bits of data 0xD and low 4 bits of data 0x5; if the first bit number is 8, the transmission format information may be that data of one byte is directly transmitted without splitting.
In the actual operation process, whether the data sender and the data receiver send the high 4-bit data first or send the low 4-bit data first can also be determined according to the attribute information of the data sender and the attribute information of the data receiver.
Optionally, determining the data to be sent according to the sending format information, and sending the data to be sent to the data receiver, including:
A synchronous clock signal is acquired.
It will be appreciated that the clock signal is the basis of sequential logic for determining when the state in the logic cells is updated, and is a fixed period, operation independent semaphore. In this embodiment, the synchronization clock signal may be a signal for controlling the data transmission from the data transmission side to the data reception side.
Specifically, the synchronous clock signal of the data sender is obtained, and when the synchronous clock signal of the data sender is at a high level, the data sender does not send data to the data receiver; when the synchronous clock signal of the data sender is low level, the data sender sends data to the data receiver.
And splitting the target data according to the first bit quantity to obtain at least one data to be transmitted.
It should be explained that the splitting operation may be to split the target data according to the first number of bits.
For example, if the first bit number is 4, splitting the target data 0xD5 into two data to be sent, namely high 4-bit data 0xD and low 4-bit data 0x5; if the first bit number is 8, the target data 0xD5 is directly determined as the data to be sent without splitting the target data 0xD 5.
And sequentially transmitting at least one data to be transmitted to a data receiver according to the synchronous clock signal.
Specifically, after the data to be transmitted is determined, the data to be transmitted is sequentially transmitted to the data receiver when the synchronous clock signal of the data transmitter is at a low level according to the transmission sequence determined according to the attribute information of the data transmitter and the attribute information of the data receiver. The determined transmission sequence may be to transmit the high-order data first and then transmit the low-order data, or may be to transmit the low-order data first and then transmit the high-order data.
Optionally, sequentially sending at least one data to be sent to the data receiver includes:
and D, performing digital-to-analog conversion on the at least one data to be transmitted to obtain at least one first transmission data.
In this embodiment, digital-to-analog conversion refers to converting a digital signal into an electrical signal, where the electrical signal may be a voltage signal or a current signal. Specifically, the digital-to-analog conversion process may be performed by a DAC (Digital Analog Change, digital-to-analog conversion) module installed at the data transmitter.
It should be noted that, the first transmission data may be data to be transmitted by the data transmitting side after performing digital-to-analog conversion on the data to be transmitted.
Specifically, at least one data to be transmitted is subjected to digital-to-analog conversion and converted into an electrical signal (the electrical signal may be a voltage signal or a current signal), so as to obtain at least one first transmission data.
In the actual operation process, two devices of a data sender and a data receiver for data transmission determine the value range of the transmitted electric signal (the maximum value in the value range of the electric signal can be the reference voltage of an ADC module and a DAC module of the data sender and the data receiver, for example), and if the reference voltages of the two devices are inconsistent, the data cannot be normally communicated. Taking voltage signal transmission as an example, for example, the reference voltages of the ADC module and the DAC module of both the data sender and the data receiver are 2560 millivolts, the voltage signal value range may be a minimum value of 0 volts and a maximum value of 2560 millivolts. For example, if the target data is 0xD5, if the first bit number is 4, since the 4-bit data can represent 16 values ranging from 0 to 15, the maximum voltage 2560 millivolts can be divided into 16 parts, i.e. 160 millivolts for each part, so that the corresponding relationship between the 4-bit data and the voltage signal can be obtained, i.e. a=160×d (millivolts), where a is the voltage signal value corresponding to the data to be sent, the unit is millivolts, and D is the data to be sent. Through calculation, the voltage signal value corresponding to the target data 0xD5, the low 4-bit data 0x5 is 800 millivolts, the voltage signal value corresponding to the high 4-bit data 0xD is 2080 millivolts, that is, 800 millivolts and 2080 millivolts are two first sending data.
At least one first transmission data is sequentially transmitted to a data receiver.
Specifically, the data sender sequentially sends at least one first sending data to the data receiver according to the sending sequence. For example, the first sending data corresponding to the high-order data after digital-to-analog conversion is sent to the data receiver, and then the first sending data corresponding to the low-order data after digital-to-analog conversion is sent to the data receiver; or the first sending data corresponding to the low-order data after digital-to-analog conversion is sent to the data receiver, and the first sending data corresponding to the high-order data after digital-to-analog conversion is sent to the data receiver.
Example two
Fig. 2 is a flowchart of a data transmission method according to a second embodiment of the present invention, where the method may be applied to a data transmission case, and the method may be performed by a data transmission device, where the data transmission device may be implemented in hardware and/or software, and the data transmission device may be integrated in any electronic device that provides a data transmission function. As shown in fig. 2, the method is performed by a data receiving side, and the data transmission method includes:
s201, acquiring attribute information of a data sender and attribute information of a data receiver.
Specifically, before data transmission is performed between two devices of a data sender and a data receiver, the data receiver firstly acquires attribute information of the data sender and attribute information of the data receiver, and determines that the data transmission can be performed between the two devices. For example, the attribute information of the data sender may be that 4 bits of data can be sent out at a time, and the higher bits of data are sent first and then the lower bits of data are sent, and the attribute information of the data receiver may be that 4 bits of data can be received at a time, and the higher bits of data are received first and then the lower bits of data are received.
S202, receiving format information is determined according to the attribute information of the data sender and the attribute information of the data receiver.
The receiving format information may be how many bits of data are received at a time (e.g., 4 bits of data or 8 bits of data are received at a time) when the data receiving side receives data, or may be whether higher bits of data are received at first or lower bits of data are received at a time when the data receiving side receives data (e.g., 4 bits of data are received at a time, one byte of data is composed of 8 bits of data, higher 4 bits of data are received first and lower 4 bits of data are received first, or lower 4 bits of data are received first and higher 4 bits of data are received first.
Specifically, the receiving format information is determined according to the attribute information of the data sender and the attribute information of the data receiver, for example, how many bits of data are received at a time when the data receiver receives the data, and whether the data receiver receives the high-order data or the low-order data at first when the data receiver receives the data.
And S203, splicing the received data according to the receiving format information to obtain target data.
It should be noted that the splicing may be to splice and combine the data received by the data receiving party according to the receiving format information.
Specifically, the data receiver splices and combines the received data according to the receiving format information. For example, if the reception format information is that the data receiver receives 4-bit data at a time and receives first high-order data and then low-order data, the data receiver uses the first received 4-bit data as high-order data, uses the later received 4-bit data as low-order data, and concatenates two 4-bit data into one 8-bit, i.e., 1-byte, target data.
According to the embodiment of the invention, the attribute information of the data sender and the attribute information of the data receiver are obtained, the receiving format information is determined according to the attribute information of the data sender and the attribute information of the data receiver, the received data is spliced according to the receiving format information, the target data is obtained, and the data transmission between the data sender and the data receiver is completed.
Optionally, determining the receiving format information according to the attribute information of the data sender and the attribute information of the data receiver includes:
the first number of bits is determined based on the attribute information of the data sender and the attribute information of the data receiver.
Specifically, the number of bits of data which are transmitted by the data transmitter at one time is determined according to the attribute information of the data transmitter, and the number of bits of data which can be received by the data receiver at one time is determined according to the attribute information of the data receiver.
The reception format information is determined according to the first number of bits.
Specifically, the reception format information is determined according to the first number of bits. For example, if the first number of bits is 4, the receiving format information may be to first receive one 4 bits of data and then receive one 4 bits of data, for example, first receive the high 4 bits of data 0xD and then receive the low 4 bits of data 0x5; alternatively, the low 4-bit data 0x5 is received first and then the high 4-bit data 0xD is received. If the first number of bits is 8, the reception format information may be one byte of data received directly.
Optionally, splicing the received data according to the received format information to obtain target data, including:
Time information of the received data is acquired.
The time information may be time sequence information of the data receiver receiving at least one transmission data transmitted by the data transmitter.
Specifically, time information that the data receiving side receives at least one transmission data transmitted by the data transmitting side is acquired.
And splicing the received data according to the receiving format information and the time information to obtain target data.
Specifically, according to the receiving format information and the time information of the data receiving party receiving at least one data, the received at least one data is spliced to obtain the target data. For example, when the data receiving party receives data, the receiving party receives 4 bits of data at a time, receives the upper 4 bits of data and then receives the lower 4 bits of data, the data receiving party receives one 4 bits of data 0xD, receives one 4 bits of data 0x5, and splices the received data 0xD and 0x5 according to the receiving format information and the time information to obtain the target data 0xD5.
Optionally, splicing the received data according to the received format information and the time information to obtain target data, including:
and carrying out analog-to-digital conversion on the received data to obtain first data.
In this embodiment, analog-to-digital conversion refers to converting an electrical signal into a digital signal, where the electrical signal may be a voltage signal or a current signal. In particular, the analog-to-digital conversion process may be performed by an ADC (Analog Digital Change, analog-to-digital conversion) module installed at the data transmitter.
It should be noted that the first data may be data obtained by performing analog-to-digital conversion on data received by the data receiving party.
Specifically, the data received by the data receiving party is subjected to analog-to-digital conversion, and an electric signal (the electric signal may be a voltage signal or a current signal) is converted into a digital signal, so as to obtain first data.
And splicing the first data according to the receiving format information and the time information.
Specifically, the data receiver splices the first data according to the receiving format information and the time information to obtain target data, and completes data transmission.
Example III
Fig. 3 is a schematic diagram of a data transmission method according to a third embodiment of the present invention. The embodiment is applicable to the data transmission situation, and the method can be jointly executed by a data sender and a data receiver.
As shown in fig. 3, the main device, the peripheral device 1, and the peripheral device 2 each include a chip select signal line CS (Chip Select), a synchronization Clock signal line CK (Clock), a data reception signal line DI (Data Input), and a data transmission signal line DO (Data Output). The master device, the peripheral device 1, and the peripheral device 2 can all function as a data sender and a data receiver. Taking a master device as an example, description will be made of each signal line:
The master device can control the chip select signal CS and send the synchronous clock CK, and can realize connection and data transmission with the peripheral device 1 and the peripheral device 2 by controlling and enabling different chip select signals, namely, the chip select signal CS1 controls connection and data transmission with the peripheral device 1, and the chip select signal CS2 controls connection and data transmission with the peripheral device 2.
One chip select signal line CS in the master device corresponds to one peripheral device, the chip select signal line CS is at a high level when idle, the low level gating enables the device with which data is desired to be transmitted, and the signal lines (CK, DI and DO) of the ungated devices are set to a high impedance state, equivalent to disconnection, without affecting the data signal being transmitted on the bus.
The synchronous clock signal line CK in the main equipment is at a high level when idle, the data is output on the falling edge, the data is sampled on the rising edge, and multi-bit data such as 4 bits or 8 bits are transmitted in one clock period so as to improve the transmission rate.
The data lines in the main equipment are divided into a transmitting data line DO and a receiving data line DI, wherein the transmitting data line DO can convert digital signals into electric signals through the DAC module and transmit the electric signals, the receiving data line DI can convert the electric signals into the digital signals through the ADC module and receive the digital signals, namely, the equipment can transmit and receive data simultaneously, and full duplex data transmission can be realized.
The data transmission method will now be described taking the example in which the host device transmits data to the peripheral device 1 and converts the digital signal into a voltage signal:
first, two devices of a data transmitting side and a data receiving side for data transmission determine a transmitted electric signal value range (a maximum value in the electric signal value range may be, for example, reference voltages of an ADC module and a DAC module of the data transmitting side and the data receiving side), and if the reference voltages of the two devices are inconsistent, the data cannot be normally communicated. Taking voltage signal transmission as an example, for example, the reference voltages of the ADC module and the DAC module of both the data sender and the data receiver are 2560 millivolts, the voltage signal value range may be a minimum value of 0 volts, and a maximum value of 2560 millivolts, for example, the master device sends one byte of data 0xD5 to the peripheral device 1.
If it is determined that the transmission format information is 4-bit data to be transmitted to the outside of the data transmission Fang Yici and the upper 4-bit data is transmitted first and then the lower 4-bit data is transmitted according to the attribute information of the data transmission side and the attribute information of the data reception side, the target data 0xD5 is split into the upper 4-bit data 0xD and the lower 4-bit data 0x5. Since the 4-bit data can represent 16 values in the range of 0-15, the maximum voltage 2560 millivolts can be equally divided into 16 parts, namely 160 millivolts for each part, so that the corresponding relation between the 4-bit data and the voltage signal can be obtained, namely a=160×d (millivolts), wherein a is the voltage signal value corresponding to the data to be transmitted, the unit is millivolts, and D is the data to be transmitted. Through calculation, the voltage signal value corresponding to the sent target data 0xD5 and the low 4-bit data 0x5 is 800 millivolts, and the voltage signal value corresponding to the high 4-bit data 0xD is 2080 millivolts. Taking the example of transmitting the lower 4 bits of data first and then the upper 4 bits of data.
Fig. 4 is a schematic diagram of signal variation in a data transmission method according to a third embodiment of the present invention. As shown in fig. 4, at the beginning of the transmission, the master first pulls down the chip select signal CS1 of peripheral device 1, gating communication with peripheral device 1. The master device sends the low 4-bit data 0x5 to the DAC, and the master device outputs the synchronous clock CK at the first falling edge, converts the data 0x5 in the DAC into a voltage signal value of 800 millivolts and outputs the voltage signal value to the data transmission signal line DO and maintains the current electric signal value. When the master outputs the first rising edge of the synchronization clock CK, the peripheral device 1 samples the data reception signal line DI of the peripheral device 1 (i.e., the data transmission signal line DO of the master), and converts the voltage signal value on the line by 800 millivolts back to the digital signal quantity 0x5 with the ADC of the peripheral device 1. The master device sends the high 4-bit data 0xD to the DAC, and the master device outputs a synchronous clock CK with a second falling edge, converts the data 0xD in the DAC into a voltage signal value 2080 mV, outputs the voltage signal value 2080 mV to a data transmission signal line DO and maintains the current electric signal value. When the master outputs the second rising edge of the synchronization clock CK, the peripheral device 1 samples the data reception signal line DI of the peripheral device 1 (i.e., the data transmission signal line DO of the master), and converts the voltage signal value on the line 2080 millivolts back to the digital signal quantity 0xD with the ADC of the peripheral device 1. And finally, the received low 4-bit data and high 4-bit data are combined back to the original one-byte data 0xD5, so that the data transmission process of the master device for transmitting one byte 0xD5 to the peripheral device 1 is realized. If there is more data to be transmitted after this data transmission, the above-mentioned process can be repeated, and if the transmission process is to be ended, the master device pulls the chip select signal CS1 of the peripheral device 1 high, and the transmission process can be ended.
In the above transmission process, each synchronous clock cycle can transmit 4 bits of data, and two synchronous clocks are needed to complete data transmission of 8 bits, namely one byte, while a common serial communication mode is that each synchronous clock transmits 1 bit of data, and at least eight synchronous clock cycles are needed to complete data transmission of one byte.
If the transmission format information is determined to be 8 bits of data, i.e., one byte of data, to be transmitted to the outside of the data transmission Fang Yici based on the attribute information of the data transmission side and the attribute information of the data reception side, the transmission can be completed with only one synchronization clock. Since the value range that can be represented by the 8-bit data is 256 values of 0-255, the maximum voltage 2560 millivolts can be equally divided into 256 parts, that is, each part is 10 millivolts, so that the corresponding relation between the 8-bit data and the voltage signal can be obtained, that is, a=10×d (millivolts), where a is the voltage signal value corresponding to the data to be transmitted, the unit is millivolts, and D is the data to be transmitted. The voltage signal value corresponding to the target data 0xD5 is 2130 millivolt.
Fig. 5 is a schematic diagram of signal variation in another data transmission method according to the third embodiment of the present invention. As shown in fig. 5, at the beginning of the transmission, the master first pulls down the chip select signal CS1 of peripheral device 1, gating communication with peripheral device 1. The master device then sends the 8-bit data 0xD5 to the DAC, and the master device outputs the synchronous clock CK of the first falling edge, converts the data 0xD5 in the DAC into a voltage signal value 2130 millivolts, outputs the voltage signal value 2130 millivolts to the data transmission signal line DO and maintains the current electric signal value. When the master device outputs the first rising clock CK, the peripheral device 1 samples the data receiving signal line DI of the peripheral device 1 (i.e. the data transmitting signal line DO of the master device), and converts the voltage signal value 2130 millivolts on the line back to the digital signal quantity 0xD5 with the ADC of the peripheral device 1, i.e. the data transmission process of the master device transmitting one byte 0xD5 to the peripheral device 1 is realized. If there is more data to be transmitted after this data transmission, the above-mentioned process can be repeated, and if the transmission process is to be ended, the master device pulls the chip select signal CS1 of the peripheral device 1 high, and the transmission process can be ended.
In the above transmission process, 8 bits of data can be transmitted in each synchronous clock cycle, and one synchronous clock is needed to complete data transmission of 8 bits, namely one byte, whereas a common serial communication mode is that each synchronous clock transmits 1 bit of data, and at least eight synchronous clock cycles are needed to complete data transmission of one byte, in contrast, the transmission rate can be improved by 8 times by adopting the technical scheme in the embodiment of the invention.
According to the technical scheme, the data transmission rate can be improved by using a small number of buses, the connection between the devices is convenient, and the number of the ports occupied by the parallel interface is small compared with the number of the ports occupied by the parallel interface.
Example IV
Fig. 6 is a schematic structural diagram of a data transmission device according to a fourth embodiment of the present invention. As shown in fig. 6, the apparatus includes: a first acquisition module 301, a first determination module 302 and a processing module 303.
The first obtaining module 301 is configured to obtain attribute information of a data sender and attribute information of a data receiver;
a first determining module 302, configured to determine transmission format information according to attribute information of the data sender and attribute information of the data receiver;
and the processing module 303 is configured to determine data to be sent according to the sending format information, and send the data to be sent to the data receiver.
Optionally, the first determining module 302 includes:
a first determining unit configured to determine a first number of bits according to attribute information of the data sender and attribute information of the data receiver;
and a second determining unit, configured to determine transmission format information according to the first bit number.
Optionally, the processing module 303 includes:
a first acquisition unit configured to acquire a synchronous clock signal;
the splitting unit is used for splitting the target data according to the first bit number to obtain at least one data to be sent;
and the transmitting unit is used for sequentially transmitting the at least one data to be transmitted to the data receiver according to the synchronous clock signal.
Optionally, the sending unit is specifically configured to:
performing digital-to-analog conversion on the at least one data to be transmitted to obtain at least one first transmission data;
and sequentially transmitting the at least one first transmission data to the data receiver.
The data transmission device provided by the embodiment of the invention can execute the data transmission method provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method.
Example five
Fig. 7 is a schematic structural diagram of a data transmission device according to a fifth embodiment of the present invention. As shown in fig. 7, the apparatus includes: a second acquisition module 401, a second determination module 402 and a stitching module 403.
The second obtaining module 401 is configured to obtain attribute information of a data sender and attribute information of a data receiver;
A second determining module 402, configured to determine receiving format information according to attribute information of the data sender and attribute information of the data receiver;
and the splicing module 403 is configured to splice the received data according to the receiving format information, so as to obtain target data.
Optionally, the second determining module 402 includes:
a third determining unit, configured to determine a first number of bits according to attribute information of the data sender and attribute information of the data receiver;
and a fourth determining unit, configured to determine reception format information according to the first bit number.
Optionally, the splicing module 403 includes:
a second acquisition unit configured to acquire time information of the received data;
and the splicing unit is used for splicing the received data according to the receiving format information and the time information to obtain target data.
Optionally, the splicing unit is specifically configured to:
performing analog-to-digital conversion on the received data to obtain first data;
and splicing the first data according to the receiving format information and the time information.
The data transmission device provided by the embodiment of the invention can execute the data transmission method provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method.
Example six
Fig. 8 shows a schematic diagram of an electronic device 50 that may be used to implement an embodiment of the invention. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. Electronic equipment may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.
As shown in fig. 8, the electronic device 50 includes at least one processor 51, and a memory, such as a Read Only Memory (ROM) 52, a Random Access Memory (RAM) 53, etc., communicatively connected to the at least one processor 51, in which the memory stores a computer program executable by the at least one processor, and the processor 51 may perform various appropriate actions and processes according to the computer program stored in the Read Only Memory (ROM) 52 or the computer program loaded from the storage unit 58 into the Random Access Memory (RAM) 53. In the RAM 53, various programs and data required for the operation of the electronic device 50 can also be stored. The processor 51, the ROM 52 and the RAM 53 are connected to each other via a bus 54. An input/output (I/O) interface 55 is also connected to bus 54.
Various components in the electronic device 50 are connected to the I/O interface 55, including: an input unit 56 such as a keyboard, a mouse, etc.; an output unit 57 such as various types of displays, speakers, and the like; a storage unit 58 such as a magnetic disk, an optical disk, or the like; and a communication unit 59 such as a network card, modem, wireless communication transceiver, etc. The communication unit 59 allows the electronic device 50 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunications networks.
The processor 51 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of processor 51 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, digital Signal Processors (DSPs), and any suitable processor, controller, microcontroller, etc. The processor 51 performs the various methods and processes described above, such as the data transmission method.
In some embodiments, the data transmission method may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as the storage unit 58. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 50 via the ROM 52 and/or the communication unit 59. When the computer program is loaded into RAM 53 and executed by processor 51, one or more steps of the data transmission method described above may be performed. Alternatively, in other embodiments, the processor 51 may be configured to perform the data transmission method in any other suitable way (e.g., by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
A computer program for carrying out methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be implemented. The computer program may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which a user can provide input to the electronic device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.
The computing system may include clients and servers. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service are overcome.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.

Claims (10)

1. A data transmission method, performed by a data sender, the data transmission method comprising:
acquiring attribute information of a data sender and attribute information of a data receiver;
determining transmission format information according to the attribute information of the data sender and the attribute information of the data receiver;
determining data to be transmitted according to the transmission format information, and transmitting the data to be transmitted to the data receiver;
Wherein determining transmission format information according to the attribute information of the data sender and the attribute information of the data receiver includes:
determining a first bit number according to the attribute information of the data sender and the attribute information of the data receiver, wherein the first bit number is 4;
and determining transmission format information according to the first bit quantity.
2. The method of claim 1, wherein determining data to be transmitted according to the transmission format information and transmitting the data to be transmitted to the data receiver comprises:
acquiring a synchronous clock signal;
splitting target data according to the first bit number to obtain at least one data to be transmitted;
and sequentially transmitting the at least one data to be transmitted to the data receiver according to the synchronous clock signal.
3. The method of claim 2, wherein sequentially transmitting the at least one data to be transmitted to the data receiver comprises:
performing digital-to-analog conversion on the at least one data to be transmitted to obtain at least one first transmission data;
and sequentially transmitting the at least one first transmission data to the data receiver.
4. A data transmission method, performed by a data receiver, the data transmission method comprising:
acquiring attribute information of a data sender and attribute information of a data receiver;
determining receiving format information according to the attribute information of the data sender and the attribute information of the data receiver;
splicing the received data according to the receiving format information to obtain target data;
wherein determining the receiving format information according to the attribute information of the data sender and the attribute information of the data receiver includes:
determining a first bit number according to the attribute information of the data sender and the attribute information of the data receiver, wherein the first bit number is 4;
and determining the receiving format information according to the first bit quantity.
5. The method of claim 4, wherein splicing the received data according to the received format information to obtain the target data comprises:
acquiring time information of received data;
and splicing the received data according to the receiving format information and the time information to obtain target data.
6. The method of claim 5, wherein concatenating the received data based on the received format information and the time information to obtain target data comprises:
Performing analog-to-digital conversion on the received data to obtain first data;
and splicing the first data according to the receiving format information and the time information.
7. A data transmission apparatus, comprising:
the first acquisition module is used for acquiring attribute information of a data sender and attribute information of a data receiver;
a first determining module, configured to determine transmission format information according to attribute information of the data sender and attribute information of the data receiver;
the processing module is used for determining data to be transmitted according to the transmission format information and transmitting the data to be transmitted to the data receiver;
wherein the first determining module includes:
a first determining unit, configured to determine a first number of bits according to attribute information of the data sender and attribute information of the data receiver, where the first number of bits is 4;
and a second determining unit, configured to determine transmission format information according to the first bit number.
8. A data transmission apparatus, comprising:
the second acquisition module is used for acquiring attribute information of the data sender and attribute information of the data receiver;
The second determining module is used for determining receiving format information according to the attribute information of the data sender and the attribute information of the data receiver;
the splicing module is used for splicing the received data according to the receiving format information to obtain target data;
wherein the second determining module includes:
a third determining unit, configured to determine a first number of bits according to attribute information of the data sender and attribute information of the data receiver, where the first number of bits is 4;
and a fourth determining unit, configured to determine reception format information according to the first bit number.
9. An electronic device, the electronic device comprising:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein,
the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the data transmission method of any one of claims 1-3 or the data transmission method of any one of claims 4-6.
10. A computer readable storage medium storing computer instructions for causing a processor to perform the data transmission method of any one of claims 1-3 or the data transmission method of any one of claims 4-6 when executed.
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