CN116016724B - Message parsing method, device, equipment and medium - Google Patents

Message parsing method, device, equipment and medium Download PDF

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Publication number
CN116016724B
CN116016724B CN202310018226.3A CN202310018226A CN116016724B CN 116016724 B CN116016724 B CN 116016724B CN 202310018226 A CN202310018226 A CN 202310018226A CN 116016724 B CN116016724 B CN 116016724B
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signal
message
byte
bit
determining
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CN116016724A (en
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郭睿
王明卿
李东
陈铁
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FAW Jiefang Automotive Co Ltd
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FAW Jiefang Automotive Co Ltd
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Abstract

The embodiment of the application discloses a method, a device, equipment and a medium for analyzing a message. Wherein the method comprises the following steps: determining a corresponding analysis type according to preset bit information in the message; the analysis type of the message comprises an Intel type and a Motorola type; the preset bit information is determined by a message sender; determining a corresponding analysis mode according to the analysis type; the analysis modes comprise an Intel analysis mode and a Motorola analysis mode; and analyzing the message according to the analysis mode to determine a signal value. According to the technical scheme, the analysis type of the message can be determined through the preset flag bit, and the corresponding analysis mode is further determined, so that the message of the Intel type and the message of the Motorola type can be directly analyzed through the corresponding analysis mode, the problem that the signals of the message of the Motorola type need to be processed and converted one by one in the prior art is avoided, the effect of processing the messages of the Intel type and/or the Motorola type in batches is achieved, and the message processing efficiency is improved.

Description

Message parsing method, device, equipment and medium
Technical Field
The present invention relates to the field of vehicle communications technologies, and in particular, to a method, an apparatus, a device, and a medium for parsing a message.
Background
CAN (Controller Area Network) is a controller local area network, and is widely applied to the fields of automobile electronics, ship electronics and the like. In the vehicle control system based on the CAN network, control commands and signal transmission are carried out through the CAN network, so that the communication functions of an engine ECU (Electronic Control Unit, an electronic control unit), a whole vehicle, intelligent devices, a diagnostic instrument, an instrument and the like CAN be realized.
The traditional method for analyzing the CAN message by the vehicle is generally in an Intel format, however, along with the popularization of vehicle intellectualization and electric drive, more and more intelligent components and sensors are arranged on the vehicle, and most of the intelligent components adopt a message analysis mode of Motorola, so that under the analysis framework of Intel, signals of the message adopting the Motorola analysis mode CAN only be processed and converted one by one, and batch processing cannot be carried out, thereby influencing the message processing efficiency.
Disclosure of Invention
The invention provides a message analysis method, a device, equipment and a medium, which are used for realizing batch processing and analysis of messages in an Intel format and a Motorola format.
According to an aspect of the present invention, there is provided a method for parsing a message, the method including:
Determining a corresponding analysis type according to preset bit information in the message; the analysis type of the message comprises an Intel type and a Motorola type; the preset bit information is determined by a message sender;
Determining a corresponding analysis mode according to the analysis type; the analysis modes comprise an Intel analysis mode and a Motorola analysis mode;
and analyzing the message according to the analysis mode to determine a signal value.
According to another aspect of the present invention, there is provided a message parsing apparatus, including:
the analysis type determining module is used for determining a corresponding analysis type according to preset bit information in the message; the analysis type of the message comprises an Intel type and a Motorola type; the preset bit information is determined by a message sender;
the analysis mode determining module is used for determining a corresponding analysis mode according to the analysis type; the analysis modes comprise an Intel analysis mode and a Motorola analysis mode;
And the signal value determining module is used for analyzing the message according to the analysis mode to determine the signal value.
According to another aspect of the present invention, there is provided an electronic apparatus including:
at least one processor; and
A memory communicatively coupled to the at least one processor; wherein,
The memory stores a computer program executable by the at least one processor, the computer program being executable by the at least one processor to enable the at least one processor to perform the method for parsing a message according to any of the embodiments of the present invention.
According to another aspect of the present invention, there is provided a computer readable storage medium storing computer instructions for causing a processor to implement a method for parsing a message according to any embodiment of the present invention when executed.
The technical scheme of the embodiment of the application comprises the following steps: determining a corresponding analysis type according to preset bit information in the message; the analysis type of the message comprises an Intel type and a Motorola type; the preset bit information is determined by a message sender; determining a corresponding analysis mode according to the analysis type; the analysis modes comprise an Intel analysis mode and a Motorola analysis mode; and analyzing the message according to the analysis mode to determine a signal value. According to the technical scheme, the analysis type of the message can be determined through the preset flag bit, and the corresponding analysis mode is further determined, so that the message of the Intel type and the message of the Motorola type can be directly analyzed through the corresponding analysis mode, the problem that the signals of the message of the Motorola type need to be processed and converted one by one in the prior art is avoided, the effect of processing the messages of the Intel type and/or the Motorola type in batches is achieved, and the message processing efficiency is improved.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flowchart of a method for parsing a message according to a first embodiment of the present application;
FIG. 2 is a diagram of an Intel small end format of a message parsing method according to an embodiment of the present application;
fig. 3 is a schematic diagram of Motorola big-end format of a message parsing method according to an embodiment of the present application;
fig. 4 is a flowchart of a method for parsing a message according to a second embodiment of the present application;
FIG. 5 is an Intel format schematic diagram of a method for parsing a message according to an embodiment of the present application;
Fig. 6 is a flowchart of a method for parsing a message according to a third embodiment of the present application;
Fig. 7 is a Motorola format schematic diagram of a message parsing method according to an embodiment of the present application;
Fig. 8 is a schematic structural diagram of a message parsing device according to a fourth embodiment of the present application;
fig. 9 is a schematic structural diagram of an electronic device for implementing a method for parsing a message according to an embodiment of the present application.
Detailed Description
In order that those skilled in the art will better understand the present application, a technical solution in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present application without making any inventive effort, shall fall within the scope of the present application.
It should be noted that the terms "first," "second," "target," and the like in the description and claims of the present invention and in the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Example 1
Fig. 1 is a flowchart of a method for parsing a message according to an embodiment of the present application, where the method may be implemented by a message parsing device, and the message parsing device may be implemented in hardware and/or software, and the message parsing device may be configured in an electronic device with data processing capability. As shown in fig. 1, the method includes:
S110, determining a corresponding analysis type according to preset bit information in the message; the analysis type of the message comprises an Intel type and a Motorola type; the preset bit information is determined by a message sender.
The preset bit information may reflect an analysis type of the message, and the preset bit information may be configured in the message, and exemplary preset bit information may be 0 and 1, which respectively represent an Intel type and a Motorola type.
Specifically, if the message sender encodes the message in Intel format, configuring preset bit information corresponding to the Intel type in the message, and sending the message to one or more message receivers through the CAN bus. And the message receiver determines that the analysis type of the message is an Intel type according to the preset bit information in the received message.
Further, if the message sender encodes the message in Motorola format, configuring preset bit information corresponding to Motorola type in the message, and sending the message to one or more message receivers through the CAN bus. And the message receiver determines that the analysis type of the message is a Motorola type according to the preset bit information in the received message.
S120, determining a corresponding analysis mode according to the analysis type; the analysis modes comprise an Intel analysis mode and a Motorola analysis mode.
Note that the encoding format of Intel is a small-end format, i.e., the high address represents the high byte, as shown in fig. 2, the signal occupies byte 3, byte 4, and byte 5, LSB (LEAST SIGNIFICANT Bit ) of the signal is stored in byte 3, and MSB (Most Significant Bit ) of the signal is stored in byte 5. The Motorola encoding format is a big-end format, i.e. the low address represents a high byte, as shown in fig. 3, the signal occupies bytes 1,2 and 3, the LSB of the signal is stored in byte 3, and the MSB of the signal is stored in byte 1.
In the embodiment of the application, because the encoding modes of the Intel type message and the Motorola type message are different, the message needs to be analyzed by different analysis modes. Specifically, after determining the parsing type of the message, determining the parsing mode of the message of the Intel type as the Intel parsing mode, and determining the parsing mode of the message of the Motorola type as the Motorola parsing mode. Further, the Intel parsing method may be a parsing function corresponding to the Intel type, and the function may be pre-written and stored, and similarly, the Motorola parsing method may be a parsing function corresponding to the Motorola type, and the function may be pre-written and stored.
S130, analyzing the message according to the analysis mode to determine a signal value.
The signal values may be the analysis result of the message, and different signal values may correspond to different signals. Specifically, if the message is of an Intel type, analyzing the message in an Intel analysis mode, and determining an analysis result as a signal value; if the message is of the Motorola type, the message is resolved by a Motorola resolving mode, and the resolving result is determined to be a signal value.
The technical scheme of the embodiment of the application comprises the following steps: determining a corresponding analysis type according to preset bit information in the message; the analysis type of the message comprises an Intel type and a Motorola type; the preset bit information is determined by a message sender; determining a corresponding analysis mode according to the analysis type; the analysis modes comprise an Intel analysis mode and a Motorola analysis mode; and analyzing the message according to the analysis mode to determine a signal value. According to the technical scheme, the analysis type of the message can be determined through the preset flag bit, and the corresponding analysis mode is further determined, so that the message of the Intel type and the message of the Motorola type can be directly analyzed through the corresponding analysis mode, the problem that the signals of the message of the Motorola type need to be processed and converted one by one in the prior art is avoided, the effect of processing the messages of the Intel type and/or the Motorola type in batches is achieved, and the message processing efficiency is improved.
In the embodiment of the present application, optionally, the message is parsed according to the parsing method, and before the signal value is determined, the method further includes steps A1-A3:
and step A1, determining bytes of a signal start bit and bytes of a signal stop bit in the message data section according to the message.
The message data segment may store the message content, as shown in fig. 2, where the message data segment generally has 8 bytes and occupies 64 bits, each bit corresponds to a number, and the number range is 0 to 63. When the range of the signal start bit is 0 to 7, corresponding to byte 0; when the range of the signal start bit is 8 to 15, corresponding to byte 1; when the range of the signal start bit is 16 to 23, the corresponding byte 2 is the same as the rest of the corresponding relation.
Specifically, relevant information can be extracted from the message, and adaptively operated to determine the bytes of the signal start bit and the signal stop bit in the message data segment. For example: if the signal start bit in the message is 11 and the signal stop bit is 20, it can be determined that the byte of the signal start bit in the message data segment is byte 1 and the byte of the signal stop bit is byte 2. If the signal start bit in the message is 11 and the signal length is 16, it can be determined that the byte of the signal start bit in the message data segment is byte 1 and the byte of the signal stop bit is byte 3.
In the embodiment of the present application, optionally, determining, according to the message, a byte in which a signal start bit and a byte in which a signal stop bit are located in the message data segment includes: determining the byte of the signal start bit according to the signal bit offset value in the message; and determining the byte of the signal stop bit according to the analysis mode, the signal bit offset value and the signal length in the message.
The signal bit offset value and the signal start bit may be equal, for example, the signal start bit is 5 if the signal bit offset value is 5. Specifically, the signal start bit can be determined according to the signal bit offset value, then the byte where the signal start bit is located is determined, then the relative position relationship between the byte where the signal stop bit is located and the byte where the signal start bit is located is determined according to the analysis mode, and then the byte where the signal stop bit is located can be determined by combining the signal length.
For example, if the signal offset value is 10, the signal length is 9, and the parsing mode is Intel parsing mode, then the byte of the signal start bit is byte 1, and the byte of the signal stop bit is byte 2; if the resolution is Motorola, the byte of the signal start bit is byte 1 and the byte of the signal stop bit is byte 0.
And step A2, determining the bytes occupied by the signals according to the bytes of the signal start bit and the bytes of the signal stop bit.
For example, if the byte of the signal start bit is byte 1 and the byte of the signal stop bit is byte 0, then the bytes of the signal are byte 0 and byte 1. If the byte of the signal start bit is byte 1 and the byte of the signal stop bit is byte 3, the bytes of the signal are byte 1, byte 2 and byte 3.
And step A3, determining a signal value according to the bytes occupied by the signal, the analysis mode and the message.
Specifically, according to the content of bytes occupied by the signal, extracting signal information in the byte, and adaptively analyzing the byte in an Intel analysis mode or a Motorola analysis mode to obtain a signal value.
Example two
Fig. 4 is a flowchart of a method for parsing a message according to a second embodiment of the present application, where the embodiment of the present application is based on the foregoing embodiment to embody parsing an Intel type message.
As shown in fig. 4, the method in the embodiment of the present application specifically includes the following steps:
S210, determining a corresponding analysis type according to preset bit information in the message; the analysis type of the message comprises an Intel type and a Motorola type; the preset bit information is determined by a message sender.
S220, determining a corresponding analysis mode according to the analysis type; the analysis modes comprise an Intel analysis mode and a Motorola analysis mode.
S230, right shifting the binary number corresponding to the signal bit offset value by 3 bits to obtain the byte of the signal start bit of the message.
Specifically, the result obtained by right shifting the binary number corresponding to the signal bit offset value by 3 bits is equal to the quotient of the signal bit offset value divided by 8, that is, the result obtained by right shifting the binary number corresponding to the signal bit offset value by 3 bits is the same as the serial number of the byte where the signal start bit is located. For example, as shown in fig. 5, if the signal bit offset value is 10, its binary number is 1010, and the result obtained by right shifting 3 bits is 1, then the byte in which the signal start bit is located is determined to be byte 1.
S240, performing bitwise operation on the binary number of the signal length and the binary number of the first preset value, and if the operation result is greater than zero, determining that the byte of the signal stop bit in the data segment of the message is the next byte of the signal start bit.
The first preset value may be determined according to an actual situation, which is not limited in the embodiment of the present application. For example, the first preset value may be 0x07, where the binary number of 0x07 is 111, if the signal length is 9, the binary number of the signal length is 1001, performing bitwise and operation on the binary number of the signal length and the binary number of the first preset value, if the operation result is greater than zero, determining that the signal exceeds 1 byte, and further determining that the byte where the signal stop bit is located in the data segment of the message is the next byte where the signal start bit is located. It should be noted that the above scheme is applicable to Intel type messages.
In the embodiment of the application, the Intel type coding mode and the Motorola type coding mode are different when a single signal spans bytes, so that the condition that the single signal does not span bytes is not repeated.
S250, determining the bytes occupied by the signals according to the bytes of the signal start bit and the bytes of the signal stop bit.
In the embodiment of the present application, optionally, determining the bytes occupied by the signal according to the bytes occupied by the start bit and the stop bit of the signal includes: and determining the bytes of the signal start bit, the bytes of the signal stop bit and the bytes between the bytes of the signal start bit and the bytes of the signal stop bit as the bytes occupied by the signal.
Specifically, if the byte of the signal start bit and the byte of the signal stop bit are two consecutive bytes, the byte of the signal is the byte of the signal start bit and the byte of the signal stop bit. If the bytes of the signal start bit and the signal stop bit are discontinuous two bytes, the bytes of the signal are the bytes of the signal start bit, the bytes of the signal stop bit and the bytes between the bytes of the signal start bit and the bytes of the signal stop bit.
S260, right-shifting binary numbers of the byte content occupied by the signal by a first number of bits to obtain a first result; and the binary number of the first number of the signal bit offset values is equal to the binary number of the first preset value.
Illustratively, as shown in fig. 5, the bytes occupied by the signal are Byte1 and Byte2 (Byte 1 and Byte2 in the corresponding diagram), and then the binary number of the content of the bytes occupied by the signal is: 0111 1100 01111001 if the signal bit offset value is 10 and the first preset value is 0x07, the first number is equal to 2, and further, the binary number of the byte content occupied by the signal is shifted to the right by 2 bits to obtain a first result: 0001 11110001 1110.
S270, right shifting binary numbers of a second preset value by a second number of digits to obtain a second result; wherein the second number is equal to 32 minus the signal length.
The second preset value may be determined according to practical situations, for example: the second preset value may be 0xFFFFFFFF. For example, if the signal length is equal to 9, the second number is equal to 23, and the binary number of the second preset value is shifted to the right by the second number, the second result is: 00000000 00000000 0000 0001 1111 1111.
S280, performing bit-wise AND operation on the first result and the second result to obtain a signal value.
And performing bit-wise AND operation on the first result and the second result to obtain: 1 0001 1110, converting the signal into decimal, namely, a signal value: 286. it should be noted that, the specific values used in the above schemes are only examples of embodiments of the present application, and the embodiments of the present application are not limited to the specific values.
The technical scheme of the embodiment of the application provides a specific analysis method for Intel type messages, the operation process is simple, and the message receiver can process the messages in batches according to the technical scheme.
Example III
Fig. 6 is a flowchart of a method for parsing a message according to a third embodiment of the present application, where the method according to the third embodiment of the present application is based on the foregoing embodiment to embody parsing a Motorola type message.
As shown in fig. 6, the method in the embodiment of the present application specifically includes the following steps:
s310, determining a corresponding analysis type according to preset bit information in the message; the analysis type of the message comprises an Intel type and a Motorola type; the preset bit information is determined by a message sender.
S320, determining a corresponding analysis mode according to the analysis type; the analysis modes comprise an Intel analysis mode and a Motorola analysis mode.
S330, right shifting the binary number corresponding to the signal bit offset value by 3 bits to obtain the byte of the signal start bit of the message.
S340, performing bitwise operation on the binary number of the signal length and the binary number of the first preset value, and if the operation result is greater than zero, determining that the byte of the data segment of the message where the signal stop bit is located is the last byte of the byte where the signal start bit is located.
For example, the first preset value may be 0x07, where the binary number of 0x07 is 111, if the signal length is 9, the binary number of the signal length is 1001, performing bitwise and operation on the binary number of the signal length and the binary number of the first preset value, if the operation result is greater than zero, determining that the signal exceeds 1 byte, and further determining that the byte in which the signal stop bit is located in the data segment of the message is the last byte of the byte in which the signal start bit is located. It should be noted that the above scheme is applicable to Motorola type messages.
S350, determining the bytes occupied by the signal according to the bytes of the signal start bit and the signal stop bit.
In the embodiment of the present application, optionally, determining the bytes occupied by the signal according to the bytes occupied by the start bit and the stop bit of the signal includes: and determining the bytes of the signal start bit, the bytes of the signal stop bit and the bytes between the bytes of the signal start bit and the bytes of the signal stop bit as the bytes occupied by the signal.
S360, exchanging the low byte part and the high byte part of the byte content of the stored signal to obtain storage area data.
It should be noted that, because of the difference between the Intel type and the Motorola type in the encoding mode, after caching the byte content occupied by the Motorola type signal, the low byte portion and the high byte portion of the byte content occupied by the stored signal need to be exchanged to obtain the storage area data.
By way of example, as shown in FIG. 7, the binary number of the memory area data may be: 0111 1101 01111001.
S370, shifting the binary number of the storage area data to the right by a third number of bits to obtain a third result; and the third number is equal to the result of performing bitwise AND operation on the binary number of the remainder of the division of the signal bit offset value by 8 and the binary number of 0x 07.
For example, as shown in fig. 7, if the signal bit offset value is 10, the remainder of dividing the signal bit offset value by 8 is 2, and the result of performing bitwise and operation on the binary number of 2 and the binary number of 0x07 is taken as the third number, the third number is equal to 2, and the third result is: 0001 1111 0101 1110.
S380, right shifting binary numbers of the second preset value by a fourth number of bits to obtain a fourth result; wherein the fourth number is equal to 32 minus the signal length.
The second preset value may be, for example, 0xFFFFFFFF. If the signal length is 9, the fourth number is equal to 23, and the binary number of the second preset value is shifted to the right by 23 bits, so as to obtain a fourth result as follows: 0000 0000 0000 0000 0000 0001 1111 1111.
S390, the third result and the fourth result are processed by bit-wise AND operation to obtain the signal value.
Illustratively, the third result and the fourth result are bitwise and operated to obtain 1 01011110, i.e. the signal value is 350. It should be noted that, the specific values used in the above schemes are only examples of embodiments of the present application, and the embodiments of the present application are not limited to the specific values.
The technical scheme of the embodiment of the application provides a specific analysis method for the Motorola type message, the operation process is simple and convenient, and the message receiver can process the message in batches according to the technical scheme.
Example IV
Fig. 8 is a schematic structural diagram of a message parsing device according to a fourth embodiment of the present application, where the device may execute the message parsing method according to any embodiment of the present application, and has functional modules and beneficial effects corresponding to the execution method. As shown in fig. 8, the apparatus includes:
The parsing type determining module 410 is configured to determine a corresponding parsing type according to preset bit information in the message; the analysis type of the message comprises an Intel type and a Motorola type; the preset bit information is determined by a message sender;
The parsing scheme determining module 420 is configured to determine a corresponding parsing scheme according to the parsing type; the analysis modes comprise an Intel analysis mode and a Motorola analysis mode;
the signal value determining module 430 is configured to parse the message according to the parsing manner, and determine a signal value.
Optionally, the apparatus further includes:
the byte determining module is used for determining bytes where signal start bits are located and bytes where signal stop bits are located in the message data section according to the message;
The signal occupied byte determining module is used for determining the signal occupied byte according to the byte where the signal start bit is and the byte where the signal stop bit is;
and the message signal value determining module is used for determining a signal value according to the bytes occupied by the signal, the analysis mode and the message.
Optionally, the byte determination module includes:
A start bit byte determining unit, configured to determine a byte where the signal start bit is located according to a signal bit offset value in the packet;
and the stop bit byte determining unit is used for determining the byte where the signal stop bit is located according to the analysis mode, the signal bit offset value and the signal length in the message.
Optionally, the start bit byte determining unit includes:
and the starting bit byte determining subunit is used for right shifting the binary number corresponding to the signal bit offset value by 3 bits to obtain the byte where the signal starting bit of the message is located.
Optionally, the signal occupied byte determining module is specifically configured to:
And determining the bytes of the signal start bit, the bytes of the signal stop bit and the bytes between the bytes of the signal start bit and the bytes of the signal stop bit as the bytes occupied by the signal.
Optionally, the analysis mode is an Intel analysis mode;
A stop bit byte determination unit comprising:
a first stop bit byte determining subunit, configured to perform bitwise operation on the binary number of the signal length and a binary number of a first preset value, and if the operation result is greater than zero, determine that a byte in which the signal stop bit is located in the data segment of the message is a next byte in which the signal start bit is located;
The message signal value determining module comprises:
a first result determining unit, configured to shift the binary number of the byte content occupied by the signal by a first number of bits to the right, to obtain a first result; wherein, the binary number of the first quantity equals to the signal bit offset value and the binary number of the first preset value are bitwise and operated;
A second result determining unit, configured to shift the binary number of the second preset value to the right by a second number of digits, to obtain a second result; wherein the second number is equal to 32 minus the signal length;
and the first signal value determining unit is used for performing bit-wise AND operation on the first result and the second result to obtain a signal value.
Optionally, the analysis mode is a Motorola analysis mode;
A stop bit byte determination unit comprising:
a second stop bit byte determining subunit, configured to perform bitwise and operation on the binary number of the signal length and the binary number of the first preset value, and if the operation result is greater than zero, determine that the byte in the data segment of the message where the signal stop bit is located is the last byte of the byte in which the signal start bit is located;
The message signal value determining module comprises:
A storage area data determining unit for exchanging the low byte part and the high byte part of the content of the bytes occupied by the stored signals to obtain storage area data;
A third result determining unit for right-shifting the binary number of the storage area data by a third number of bits to obtain a third result; wherein the third number is equal to the result of bitwise AND operation of the binary number of the remainder of the signal bit offset value divided by 8 and the binary number of 0x 07;
A fourth result determining unit, configured to shift the binary number of the second preset value by a fourth number of bits to obtain a fourth result; wherein the fourth number is equal to 32 minus the signal length;
And the second signal value determining unit is used for performing bit-wise AND operation on the third result and the fourth result to obtain a signal value.
The message analysis device provided by the embodiment of the application can execute the message analysis method provided by any embodiment of the application, and has the corresponding functional modules and beneficial effects of the execution method.
Example five
Fig. 9 shows a schematic diagram of an electronic device 10 that may be used to implement an embodiment of the invention. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. Electronic equipment may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.
As shown in fig. 9, the electronic device 10 includes at least one processor 11, and a memory, such as a Read Only Memory (ROM) 12, a Random Access Memory (RAM) 13, etc., communicatively connected to the at least one processor 11, in which the memory stores a computer program executable by the at least one processor, and the processor 11 may perform various appropriate actions and processes according to the computer program stored in the Read Only Memory (ROM) 12 or the computer program loaded from the storage unit 18 into the Random Access Memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 may also be stored. The processor 11, the ROM 12 and the RAM 13 are connected to each other via a bus 14. An input/output (I/O) interface 15 is also connected to bus 14.
Various components in the electronic device 10 are connected to the I/O interface 15, including: an input unit 16 such as a keyboard, a mouse, etc.; an output unit 17 such as various types of displays, speakers, and the like; a storage unit 18 such as a magnetic disk, an optical disk, or the like; and a communication unit 19 such as a network card, modem, wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunication networks.
The processor 11 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, digital Signal Processors (DSPs), and any suitable processor, controller, microcontroller, etc. The processor 11 performs the various methods and processes described above, such as the parsing of messages.
In some embodiments, the method of parsing a message may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as the storage unit 18. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 10 via the ROM 12 and/or the communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the method of parsing a message described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the parsing method of the message in any other suitable way (e.g. by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
A computer program for carrying out methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be implemented. The computer program may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which a user can provide input to the electronic device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.
The computing system may include clients and servers. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service are overcome.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.

Claims (6)

1. The method for analyzing the message is characterized by comprising the following steps:
Determining a corresponding analysis type according to preset bit information in the message; the analysis type of the message comprises an Intel type and a Motorola type; the preset bit information is determined by a message sender;
Determining a corresponding analysis mode according to the analysis type; the analysis modes comprise an Intel analysis mode and a Motorola analysis mode;
Determining the byte of the signal start bit according to the signal bit offset value in the message;
determining a byte where the signal stop bit is located according to the analysis mode, the signal bit offset value and the signal length in the message;
Determining the bytes occupied by the signal according to the bytes of the signal start bit and the bytes of the signal stop bit;
determining a signal value according to the bytes occupied by the signals, the analysis mode and the message;
Wherein, the analysis mode is an Intel analysis mode;
Determining the byte where the signal stop bit is located according to the parsing mode, the signal bit offset value and the signal length in the message, including:
Performing bitwise operation on the binary number of the signal length and the binary number of the first preset value, and if the operation result is greater than zero, determining that the byte of the signal stop bit in the data segment of the message is the next byte of the signal start bit;
determining a signal value according to the bytes occupied by the signal, the parsing mode and the message, including:
Right-shifting binary numbers of the byte content occupied by the signal by a first number of bits to obtain a first result; wherein, the binary number of the first quantity equals to the signal bit offset value and the binary number of the first preset value are bitwise and operated;
right shifting binary numbers of a second preset value by a second number of digits to obtain a second result; wherein the second number is equal to 32 minus the signal length;
performing bit-wise AND operation on the first result and the second result to obtain a signal value;
wherein the analysis mode is a Motorola analysis mode;
Determining the byte where the signal stop bit is located according to the parsing mode, the signal bit offset value and the signal length in the message, including:
Performing bitwise operation on the binary number of the signal length and the binary number of the first preset value, and if the operation result is greater than zero, determining that the byte of the data segment of the message where the signal stop bit is located is the last byte of the byte where the signal start bit is located;
determining a signal value according to the bytes occupied by the signal, the parsing mode and the message, including:
exchanging the low byte part and the high byte part of the byte content of the stored signal to obtain storage area data;
right shifting the binary number of the storage area data by a third number of bits to obtain a third result; wherein the third number is equal to the result of bitwise AND operation of the binary number of the remainder of the signal bit offset value divided by 8 and the binary number of 0x 07;
Right shifting the binary number of the second preset value by a fourth number of bits to obtain a fourth result; wherein the fourth number is equal to 32 minus the signal length;
and performing bit-wise AND operation on the third result and the fourth result to obtain a signal value.
2. The method of claim 1 wherein determining the byte in which the signal start bit is based on the signal bit offset value in the message comprises:
And right shifting the binary number corresponding to the signal bit offset value by 3 bits to obtain the byte of the signal start bit of the message.
3. The method of claim 2, wherein determining the bytes occupied by the signal based on the bytes occupied by the start bit and the stop bit of the signal comprises:
And determining the bytes of the signal start bit, the bytes of the signal stop bit and the bytes between the bytes of the signal start bit and the bytes of the signal stop bit as the bytes occupied by the signal.
4. A message parsing apparatus, comprising:
the analysis type determining module is used for determining a corresponding analysis type according to preset bit information in the message; the analysis type of the message comprises an Intel type and a Motorola type; the preset bit information is determined by a message sender;
the analysis mode determining module is used for determining a corresponding analysis mode according to the analysis type; the analysis modes comprise an Intel analysis mode and a Motorola analysis mode;
A byte determination module comprising:
A start bit byte determining unit, configured to determine a byte where the signal start bit is located according to a signal bit offset value in the packet;
a stop bit byte determining unit, configured to determine a byte in which the signal stop bit is located according to the parsing mode, the signal bit offset value, and the signal length in the message;
The signal occupied byte determining module is used for determining the signal occupied byte according to the byte where the signal start bit is and the byte where the signal stop bit is;
the message signal value determining module is used for determining a signal value according to the bytes occupied by the signal, the analysis mode and the message;
Wherein, the analysis mode is an Intel analysis mode;
A stop bit byte determination unit comprising:
a first stop bit byte determining subunit, configured to perform bitwise operation on the binary number of the signal length and a binary number of a first preset value, and if the operation result is greater than zero, determine that a byte in which the signal stop bit is located in the data segment of the message is a next byte in which the signal start bit is located;
The message signal value determining module comprises:
a first result determining unit, configured to shift the binary number of the byte content occupied by the signal by a first number of bits to the right, to obtain a first result; wherein, the binary number of the first quantity equals to the signal bit offset value and the binary number of the first preset value are bitwise and operated;
A second result determining unit, configured to shift the binary number of the second preset value to the right by a second number of digits, to obtain a second result; wherein the second number is equal to 32 minus the signal length;
The first signal value determining unit is used for performing bit-wise AND operation on the first result and the second result to obtain a signal value;
wherein the analysis mode is a Motorola analysis mode;
A stop bit byte determination unit comprising:
a second stop bit byte determining subunit, configured to perform bitwise and operation on the binary number of the signal length and the binary number of the first preset value, and if the operation result is greater than zero, determine that the byte in the data segment of the message where the signal stop bit is located is the last byte of the byte in which the signal start bit is located;
The message signal value determining module comprises:
A storage area data determining unit for exchanging the low byte part and the high byte part of the content of the bytes occupied by the stored signals to obtain storage area data;
A third result determining unit for right-shifting the binary number of the storage area data by a third number of bits to obtain a third result; wherein the third number is equal to the result of bitwise AND operation of the binary number of the remainder of the signal bit offset value divided by 8 and the binary number of 0x 07;
A fourth result determining unit, configured to shift the binary number of the second preset value by a fourth number of bits to obtain a fourth result; wherein the fourth number is equal to 32 minus the signal length;
And the second signal value determining unit is used for performing bit-wise AND operation on the third result and the fourth result to obtain a signal value.
5. An electronic device, the electronic device comprising:
at least one processor; and
A memory communicatively coupled to the at least one processor; wherein,
The memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the method of parsing a message according to any one of claims 1-3.
6. A computer readable storage medium storing computer instructions for causing a processor to perform the method of parsing a message according to any one of claims 1-3.
CN202310018226.3A 2023-01-06 2023-01-06 Message parsing method, device, equipment and medium Active CN116016724B (en)

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