CN115079768A - Band-gap reference circuit with wide power supply voltage range - Google Patents

Band-gap reference circuit with wide power supply voltage range Download PDF

Info

Publication number
CN115079768A
CN115079768A CN202210773328.1A CN202210773328A CN115079768A CN 115079768 A CN115079768 A CN 115079768A CN 202210773328 A CN202210773328 A CN 202210773328A CN 115079768 A CN115079768 A CN 115079768A
Authority
CN
China
Prior art keywords
transistor
resistor
supply voltage
drain
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202210773328.1A
Other languages
Chinese (zh)
Inventor
张章
任洪涛
张曦
王桉楠
程心
解光军
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hefei University of Technology
Original Assignee
Hefei University of Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hefei University of Technology filed Critical Hefei University of Technology
Priority to CN202210773328.1A priority Critical patent/CN115079768A/en
Publication of CN115079768A publication Critical patent/CN115079768A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
    • G05F1/567—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor for temperature compensation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

The invention discloses a band-gap reference circuit with a wide power supply voltage range. The bias circuit irrelevant to the power supply voltage eliminates the influence of the power supply voltage on the whole circuit and provides stable bias current for the whole circuit, the positive temperature coefficient voltage generates a voltage signal in direct proportion to the temperature through two groups of NPN triodes, the reference voltage generating circuit receives the positive temperature coefficient voltage signal and generates reference voltage, and the reference voltage is not influenced by temperature change or power supply voltage, so that high-precision and high-stability reference voltage is obtained.

Description

Band-gap reference circuit with wide power supply voltage range
Technical Field
The invention belongs to the technical field of integrated circuits, and particularly relates to a band-gap reference circuit with a wide power supply voltage range.
Background
With the rapid development of integrated circuits, more and more industries are developing toward informatization and intellectualization. The band-gap reference circuit is used as an important component in an integrated circuit, so that important guarantee is provided for normal operation of other circuits, and performance indexes of the band-gap reference circuit influence the performance and quality of the whole chip. Such as high precision comparators, flash memory, analog/digital converters and digital/analog converters all have high requirements on the bandgap reference circuit.
In a CMOS process, the base electrode-emitter electrode voltage of an NPN triode has a negative temperature coefficient, the voltage difference between the base electrode and the emitter electrode has a positive temperature coefficient, and the two voltages with different temperature coefficients are superposed to generate a band gap reference voltage. In the prior art circuit, the bases of the transistor Q0 and the transistor Q1 are connected to the collector, and the emitter-base area ratio of the transistor Q1 to the transistor Q2 is n: 1, the base-emitter voltage difference of the Q0 transistor and the Q1 transistor thus provides a temperature-positive voltage Δ V BE ＝V T ln n is used as the index. On the other hand, the base-emitter voltage of the transistor Q1 has a negative temperature coefficient, and the voltage is marked as V BE1 . The positive end of the operational amplifier is connected with the collector of the Q0 triode, and the connection point is marked as point A; the negative terminal of the operational amplifier is connected to the middle of the R2 resistor and the R0 resistor, and the connection point is marked as point B, so that the point A and the point B have the same voltage. The current flowing through the resistor R0 is
Figure BDA0003725186940000011
The expression of the bandgap reference voltage VBG can thus be obtained as:
Figure BDA0003725186940000012
it can be seen from the above derivation of the bandgap reference circuit that if a stable VBG bandgap reference voltage is obtained, the temperature coefficient needs to be carefully adjusted, but since the transistor Q1 provides a negative temperature coefficient and generates a positive temperature coefficient voltage difference together with the transistor Q0, the adjustment of the high-stability bandgap reference voltage is difficult.
Disclosure of Invention
The invention aims to: in order to solve the above-mentioned proposed problems, a bandgap reference circuit of a wide power supply voltage range is provided.
The technical scheme adopted by the invention is as follows: the band-gap reference circuit with the wide power supply voltage range comprises a positive temperature coefficient generating circuit, a band-gap reference voltage generating circuit and a bias circuit irrelevant to the power supply voltage, and the circuit structure of the band-gap reference circuit is shown in figure 1;
the positive temperature coefficient generating circuit comprises six PMOS tubes MP7-MP12, two NMOS tubes MN4 and MN5, two NPN triodes Q1 and Q2 and a resistor R10; the MP7 and MP8 transistors are connected in series, and the drain of the MP8 transistor is connected to the collector of the Q1 transistor;
the band-gap reference voltage generating circuit comprises three PMOS tubes MP13-MP15, four resistors R0-R3 and an NPN triode Q0; the MP13 transistor and the MP14 transistor are connected in series, and the drain electrode of the MP14 transistor is connected with the source electrode of the MP15 transistor;
the bias circuit irrelevant to the power supply voltage comprises seven PMOS tubes MP0-MP6, four NMOS tubes MN0-MN3 and six resistors R4-R9; the MP0 transistor, the MP1 transistor, and the MP2 transistor generate bias voltages.
In a preferred embodiment, the MP11 and MP12 transistors are connected in series and connected to an R10 resistor, and the other end of the R10 resistor is connected to the drain of the MN5 transistor, so that the MP11 transistor and the MP12 transistor provide a stable bias for the MN15 transistor, and the gate of the MN15 transistor is connected to the collector of the transistor Q1.
In a preferred embodiment, the drain of the MN5 transistor is connected to the gate of the MP15 transistor, controlling the operation of the MP15 transistor; the resistor R0 is connected to the drain electrode of the MP14 transistor, the resistors R1 and R2 and the resistor R0 are connected in series, the base electrode of the transistor Q0 is connected with the collector electrode and connected to the resistor R2, the emitter electrode of the transistor Q0 is connected with the resistor R3, and the other end of the resistor R3 is connected to the ground; the base of the Q2 triode is connected between the R0 resistor and the R1 resistor, and the base of the Q1 triode is connected between the R1 resistor and the R2 resistor.
In a preferred embodiment, the MN0 transistor, MN1 transistor, and MN3 transistor form a feedback loop.
In a preferred embodiment, the MP9 and MP10 transistors are connected in series, and the drain of the MP10 transistor is connected to the collector of the Q2 triode.
In a preferred embodiment, the drain of the MP15 transistor is connected to ground, so that the MP13 transistor and the MP14 transistor provide bias current for the MP15 transistor.
In summary, due to the adoption of the technical scheme, the invention has the beneficial effects that:
1. in the invention, the positive temperature coefficient generating circuit and the band gap reference generating circuit are mutually separated, so that the current flowing through the Q1 triode and the Q2 triode and the current flowing through the Q0 triode can be independently set, the voltage difference between the base electrodes and the emitter electrodes of the Q1 triode and the Q2 triode and the voltage between the base electrodes and the emitter electrodes of the Q0 are not influenced mutually, and the adjustment of the band gap reference voltage is simple.
2. In the invention, the bias circuit in a feedback form is adopted, so that the stability of bias current can be kept when the power supply voltage fluctuates in a larger range, and the stability of bias can be kept in the range of 1.5V to 7V of power supply voltage. The MN0 transistor and the MN1 transistor control the resistance of the access circuit by detecting the magnitude of the power supply voltage, and the stability of the magnitude of the bias current is ensured.
Drawings
FIG. 1 is a circuit diagram of a wide supply voltage range bandgap reference circuit of the present invention;
FIG. 2 is a graph showing the variation of bandgap reference voltage with temperature when the power supply voltage is 1.5V;
FIG. 3 is a graph showing the bandgap reference voltage as a function of temperature for a power supply voltage of 7V in the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
With reference to figures 1-3 of the drawings,
example (b):
the band-gap reference circuit with wide power supply voltage range comprises a positive temperature coefficient voltage generating circuit, a band-gap reference voltage generating circuit and a bias circuit irrelevant to power supply voltage.
The positive temperature coefficient generating circuit comprises the following structures: six PMOS tubes MP7-MP12, two NMOS tubes MN4 and MN5, two NPN triodes Q1 and Q2, and a resistor R10. The MP7 transistor and the MP8 transistor are connected in series, and the drain of the MP8 transistor is connected to the collector of the Q1 transistor, providing a stable current bias for the Q1 transistor. The MP9 transistor and the MP10 transistor are connected in series, and the drain of the MP10 transistor is connected to the collector of the Q2 transistor, providing a stable current bias for the Q2 transistor. The emitters of the Q1 transistor and the Q2 transistor are connected together and to the drain of the MN4 transistor, and the gate of the MN4 transistor is connected to the collector of the Q2 transistor, so that the collector voltage of the Q2 transistor controls the operation of the MN4 transistor. The MP11 transistor and the MP12 transistor are connected in series and are connected to the R10 resistor, the other end of the R10 resistor is connected to the drain electrode of the MN5 transistor, so that the MP11 transistor and the MP12 transistor provide stable bias for the MN15 transistor, the grid electrode of the MN15 transistor is connected to the collector electrode of the Q1 triode, and the collector voltage of the Q1 triode controls the operation of the MN5 transistor. The magnitude of the bias current provided by the MP7 transistor, the MP8 transistor, the MP9 transistor and the MP10 transistor is equal, and the magnitude of the bias current provided by the MP11 transistor and the MP12 transistor is twice that provided by the MP7 transistor and the MP8 transistor, so that the magnitude of the current received by the MN4 transistor from the Q1 transistor and the Q2 transistor is equal to that of the current flowing through the MN5 transistor. The same voltage level is provided for the collectors of the transistor Q1 and the transistor Q2 as the input of the operational amplifier, namely the transistor MN4 and the transistor MN 5. Therefore, the transistor Q1 and the transistor Q2 operate under the same conditions, since the base-emitter area ratio of the transistor Q1 to the transistor Q2 is N: 1, it can be concluded that the difference between the base voltages of the transistor Q1 and the transistor Q2 exhibits a positive temperature dependence.
The current flowing through the collector of the triode is as follows:
I C and base-emitter voltage V BE The relationship of (a) is as follows:
I C ＝I S exp(V BE /V T )；
the base-emitter voltage V can be calculated BE Can be represented by the following formula:
Figure BDA0003725186940000051
thus, the base-emitter voltage difference of the Q1 transistor and the Q2 transistor is:
Figure BDA0003725186940000052
the temperature is subjected to partial derivation to obtain the following formula:
Figure BDA0003725186940000053
it can be seen that the base-emitter voltage difference of the Q1 transistor and the Q2 transistor exhibits a positive temperature coefficient, and that the temperature coefficient is independent of both the temperature itself and the magnitude of the collector current. The emitter voltages of the transistor Q1 and the transistor Q2 are the same, so the difference between the base voltages of the transistor Q1 and the transistor Q2 is a positive temperature coefficient voltage.
The structure of the band-gap reference voltage generating circuit is as follows: three PMOS tubes MP13-MP15, four resistors R0-R3 and an NPN triode Q0. The MP13 transistor and the MP14 transistor are connected in series, the drain of the MP14 transistor is connected with the source of the MP15 transistor, and the drain of the MP15 transistor is connected with the ground, so that the MP13 transistor and the MP14 transistor provide bias current for the MP15 transistor. The drain of the MN5 transistor is connected to the gate of the MP15 transistor, controlling the operation of the MP15 transistor. The resistor R0 is connected to the drain of the transistor MP14, the resistors R1 and R2 and the resistor R0 are connected in series, the base of the transistor Q0 is connected with the collector and connected to the resistor R2, the emitter of the transistor Q0 is connected with the resistor R3, and the other end of the resistor R3 is connected to the ground. The base of the Q2 triode is connected between the R0 resistor and the R1 resistor, and the base of the Q1 triode is connected between the R1 resistor and the R2 resistor.
This produces a bandgap reference voltage at the drain of MP 14: v BG 。
A voltage with a positive temperature coefficient is applied across the R1 resistor, resulting in a current of:
Figure BDA0003725186940000061
the bandgap reference voltage is therefore:
Figure BDA0003725186940000062
at a bandgap reference voltage V BG In the expression of (1), V T ln has a positive temperature coefficient, V BE0 Has negative temperature coefficient, and can generate a reference voltage independent of temperature through the adjustment of the resistor.
The structure of the bias circuit independent of the power supply voltage is as follows: seven PMOS tubes MP0-MP6, four NMOS tubes MN0-MN3 and six resistors R4-R9. The gate and the drain of the MP0 transistor are connected, the R7 resistor is connected to the drain of the MP0 transistor, the drain of the MN0 transistor is connected to the drain of the MP0 transistor, and the R6 resistor is connected to the source of the MN0 transistor, so that the MN0 transistor controls the size of the resistor connected to the drain of the MP0 transistor. The drain of the MP1 transistor is connected with the source of the MP2 transistor, the gate of the MP1 transistor is connected with the drain of the MP2 transistor, and the gate of the MP2 transistor is connected with the gate of the MP0 transistor, so that the MP1 and MP2 transistors connected in this way provide bias for the later parallel PMOS transistors; the R9 resistor is connected to the drain of the MP2 transistor, the drain of the MN1 transistor is connected to the drain of the MP2 transistor, and the R8 resistor is connected to the source of the MN1, so that the MN1 transistor controls the resistor connected to the drain of the MP2 transistor. The drain of the MP3 transistor is connected with the source of the MP4 transistor, the gate of the MP3 transistor is connected with the gate of the MP1 transistor, the gate of the MP4 transistor is connected with the gate of the MP2 transistor, the R4 resistor is connected with the drain of the MP4 transistor, the gate of the MN2 transistor is connected with the drain, the other end of the R4 resistor is connected with the drain of the MN2 transistor, and the R5 resistor is connected with the source of the MN2 transistor; the MP3 transistor and the MP4 transistor provide bias for the R4 resistor and the MN2 transistor. The drain of the MP5 transistor is connected with the source of the MP6 transistor, the gate of the MP5 transistor is connected with the gate of the MP1 transistor, the gate of the MP6 transistor is connected with the gate of the MP2 transistor, the drain of the MN3 transistor is connected with the source of the MP6 transistor, the gate of the MN3 transistor is connected with the drain of the MP4 transistor, and the source of the MN3 transistor is connected with the source of the MN2 transistor; the MP5 transistor and the MP6 transistor provide a bias for the MN3 transistor.
The bias current provided by the MP3 and MP4 transistors is equal to the bias current provided by the MP5 and MP6 transistors, and the bias current is marked as I bias The voltage from the drain of the MP4 transistor to the source of the MN2 transistor is expressed as follows:
Figure BDA0003725186940000071
the size ratio of the MN2 transistor to the MN3 transistor is 4: 1, i.e. that
Figure BDA0003725186940000072
Substituting this relationship into the above expression can result in:
Figure BDA0003725186940000073
it can be seen that the bias current is independent of the magnitude of the power supply voltage, and is only dependent on the device size of the NMOS transistor and the resistance of the resistor. The bias current formed in this way is free from the influence of the supply voltage on the bias current.
The gates of the MN0 transistor and the MN1 transistor are connected to the drain of the MP6 transistor, so that the drain voltage of the MP6 transistor controls the operation of the MN0 transistor and the MN1 transistor, and a feedback loop is formed, so that the stability of bias current in a wide power supply voltage range can be realized. The resistance value of the R7 resistor is larger than that of the R6 resistor, the resistance value of the R9 resistor is larger than that of the R8 resistor, when the power voltage is reduced to 1.5V, the small-resistance resistor R6 and the R8 resistor are respectively used as main load resistors of an MP0 transistor and an MP2 transistor, and the current flowing through the R7 resistor and the R9 resistor is very small; when the power supply voltage is as high as 7V, the R6 resistor and the R7 resistor are commonly used as the load of the MP0 transistor, and the R8 resistor and the R9 resistor are commonly used as the load of the MP2 transistor. When the power supply voltage is between 1.5V and 7V, the drain terminal voltage of the MP6 transistor dynamically adjusts the gate voltages of the MN0 transistor and the MN1 transistor so as to achieve the stability of the bias current in a wide power supply voltage range.
The simulation results are shown in fig. 2 and fig. 3, and it can be seen from the simulation results that the bandgap reference voltage shows good stability no matter the power supply voltage is as low as 1.5V or as high as 7V, the deviation of the maximum value and the minimum value is about 1mV, and the accuracy is high.
The invention adopts the method that the positive temperature coefficient voltage generating circuit is separated from the band gap reference voltage generating circuit and adopts the feedback loop mode to stabilize the biasing circuit, thereby realizing the stability of the band gap reference voltage in a wide power voltage range, wherein the band gap reference voltage has only 1mV deviation in the temperature range of minus 55 ℃ to 170 ℃.
The band-gap reference circuit with the wide power supply voltage range is suitable for analog circuits and mixed signal circuits, and meets the requirement of providing accurate band-gap reference voltage in the wide power supply voltage range.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.

Claims (7)

1. A wide supply voltage range bandgap reference circuit, characterized by: the band-gap reference circuit with the wide power supply voltage range comprises a positive temperature coefficient generating circuit, a band-gap reference voltage generating circuit and a bias circuit irrelevant to the power supply voltage;
the positive temperature coefficient generating circuit comprises six PMOS tubes MP7-MP12, two NMOS tubes MN4 and MN5, two NPN triodes Q1 and Q2 and a resistor R10; the MP7 and MP8 transistors are connected in series, and the drain of the MP8 transistor is connected to the collector of the Q1 transistor;
the band-gap reference voltage generating circuit comprises three PMOS tubes MP13-MP15, four resistors R0-R3 and an NPN triode Q0; the MP13 transistor and the MP14 transistor are connected in series, and the drain electrode of the MP14 transistor is connected with the source electrode of the MP15 transistor;
the bias circuit irrelevant to the power supply voltage comprises seven PMOS tubes MP0-MP6, four NMOS tubes MN0-MN3 and six resistors R4-R9; the MP0 transistor, the MP1 transistor, and the MP2 transistor generate bias voltages.
2. A wide supply voltage range bandgap reference circuit as claimed in claim 1 wherein: the emitters of the Q1 and Q2 transistors are connected together and to the drain of the MN4 transistor, and the gate of the MN4 transistor is connected to the collector of the Q2 transistor, so that the collector voltage of the Q2 transistor controls the operation of the MN4 transistor.
3. A wide supply voltage range bandgap reference circuit as claimed in claim 1 wherein: the MP11 and MP12 transistors are connected in series and are connected to an R10 resistor, the other end of the R10 resistor is connected to the drain electrode of the MN5 transistor, so that the MP11 transistor and the MP12 transistor provide stable bias for the MN15 transistor, and the grid electrode of the MN15 transistor is connected to the collector electrode of the Q1 triode.
4. A wide supply voltage range bandgap reference circuit as claimed in claim 1, wherein: the drain electrode of the MN5 transistor is connected with the gate electrode of the MP15 transistor, and the MP15 transistor is controlled to work; the resistor R0 is connected to the drain electrode of the MP14 transistor, the resistors R1 and R2 and the resistor R0 are connected in series, the base electrode of the transistor Q0 is connected with the collector electrode and connected to the resistor R2, the emitter electrode of the transistor Q0 is connected with the resistor R3, and the other end of the resistor R3 is connected to the ground; the base of the Q2 triode is connected between the R0 resistor and the R1 resistor, and the base of the Q1 triode is connected between the R1 resistor and the R2 resistor.
5. A wide supply voltage range bandgap reference circuit as claimed in claim 1 wherein: the MN0 transistor, MN1 transistor, and MN3 transistor form a feedback loop.
6. A wide supply voltage range bandgap reference circuit as claimed in claim 1 wherein: the MP9 and MP10 transistors are connected in series, and the drain of the MP10 transistor is connected to the collector of the Q2 triode.
7. A wide supply voltage range bandgap reference circuit as claimed in claim 1, wherein: the drain of the MP15 transistor is connected to ground, so that the MP13 transistor and the MP14 transistor provide bias current for the MP15 transistor.
CN202210773328.1A 2022-07-01 2022-07-01 Band-gap reference circuit with wide power supply voltage range Pending CN115079768A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210773328.1A CN115079768A (en) 2022-07-01 2022-07-01 Band-gap reference circuit with wide power supply voltage range

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210773328.1A CN115079768A (en) 2022-07-01 2022-07-01 Band-gap reference circuit with wide power supply voltage range

Publications (1)

Publication Number Publication Date
CN115079768A true CN115079768A (en) 2022-09-20

Family

ID=83258631

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210773328.1A Pending CN115079768A (en) 2022-07-01 2022-07-01 Band-gap reference circuit with wide power supply voltage range

Country Status (1)

Country Link
CN (1) CN115079768A (en)

Similar Documents

Publication Publication Date Title
CN111190454B (en) Curvature compensation low-temperature drift band gap reference voltage source circuit
WO2016015523A1 (en) Bandgap reference source having low offset voltage and high psrr
CN109491434B (en) CMOS integrated circuit band-gap reference source applied to 5G millimeter wave base station
CN111781983A (en) High power supply rejection ratio sub-threshold MOSFET compensation band-gap reference voltage circuit
CN113359929B (en) Band-gap reference circuit and low-offset high-power-supply-rejection-ratio band-gap reference source
CN108536210B (en) Smooth temperature compensation band gap reference source circuit
CN114840049A (en) Band-gap reference circuit with second-order curvature compensation
CN111045470B (en) Band-gap reference circuit with low offset voltage and high power supply rejection ratio
CN109491439B (en) Reference voltage source and working method thereof
WO2024093602A1 (en) Voltage reference generation circuit, and chip and electronic device
CN115437446B (en) High-precision curvature compensation band gap reference circuit
CN110166029B (en) Hysteresis comparator circuit
CN111752325A (en) High-precision linear voltage stabilizing circuit
CN219016862U (en) Exponential temperature compensation band-gap reference circuit without operational amplifier
CN114740938B (en) Reference circuit and reference voltage ware applied to Sigma-Delta ADC
CN215340874U (en) Zero temperature coefficient current generating circuit with band gap reference
CN113655841B (en) Band gap reference voltage circuit
CN115657781A (en) Band-gap reference source circuit of self-buffering loop control technology
CN115079768A (en) Band-gap reference circuit with wide power supply voltage range
CN112256078B (en) Positive temperature coefficient current source and zero temperature coefficient current source
CN115167596A (en) Novel sectional compensation band gap reference circuit
CN113791661A (en) Low-voltage band-gap reference voltage generating circuit
Zhang et al. High precision low power CMOS bandgap for RFID
CN113485511B (en) Band gap reference circuit with low temperature coefficient
CN110109500B (en) Band-gap reference voltage source capable of self-excitation compensation

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination