CN115061318A - Display panel and display device - Google Patents
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- CN115061318A CN115061318A CN202210772840.4A CN202210772840A CN115061318A CN 115061318 A CN115061318 A CN 115061318A CN 202210772840 A CN202210772840 A CN 202210772840A CN 115061318 A CN115061318 A CN 115061318A
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- 239000010409 thin film Substances 0.000 claims abstract description 161
- 239000000758 substrate Substances 0.000 claims abstract description 55
- 230000007423 decrease Effects 0.000 claims description 12
- 239000004973 liquid crystal related substance Substances 0.000 claims description 8
- 230000000694 effects Effects 0.000 abstract description 11
- 238000010586 diagram Methods 0.000 description 19
- 238000000034 method Methods 0.000 description 3
- 229910003460 diamond Inorganic materials 0.000 description 2
- 239000010432 diamond Substances 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
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- 238000006467 substitution reaction Methods 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention discloses a display panel and a display device. The display panel comprises a display area and a non-display area surrounding the display area; the display area comprises a plurality of pixel electrodes arranged in an array, a plurality of thin film transistors, a plurality of data lines extending along a first direction and a plurality of scanning lines extending along a second direction; the non-display area comprises a data voltage output end and a scanning voltage output end, the data voltage output end is connected with the data line, and the scanning voltage output end is connected with the scanning line; the display panel further comprises a first substrate and a light shielding layer located on one side of the first substrate, the light shielding layer covers at least part of an active region of the thin film transistor along a direction perpendicular to the first substrate, and the overlapping area of the light shielding layer and the active region of the thin film transistor is reduced along a direction parallel to the first direction and far away from the data voltage output end. Through the technical scheme, the brightness difference of different sub-pixel areas can be balanced, the problem of uneven display of the display panel is solved, and the display effect of the display panel is improved.
Description
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a display panel and a display device.
Background
With the development of display technology, the application field of display devices is gradually expanding. For a large or special-shaped display device, such as a vehicle-mounted display device, because the signal lines are long or different in length, the existence of voltage drop of the electrical signals during transmission through the signal lines may cause the problem that the display in different areas of the display device is uneven, thereby affecting the display effect. In view of the above problems, no better solution is available at present.
Disclosure of Invention
In view of the above, the present invention provides a display panel and a display device to improve the display uniformity of the display panel and the display device and improve the display effect.
In a first aspect, an embodiment of the present invention provides a display panel, including a display area and a non-display area surrounding the display area;
the display area comprises a plurality of pixel electrodes arranged in an array, a plurality of thin film transistors, a plurality of data lines extending along a first direction and a plurality of scanning lines extending along a second direction, and the first direction is crossed with the second direction;
first ends of a plurality of thin film transistors arranged along the first direction are connected with the same data line, and second ends of the thin film transistors are connected with the pixel electrode;
the control ends of the plurality of thin film transistors arranged along the second direction are connected with the same scanning line;
the non-display area comprises a data voltage output end and a scanning voltage output end, the data voltage output end is connected with the data line, and the scanning voltage output end is connected with the scanning line;
the display panel further comprises a first substrate and a light shielding layer located on one side of the first substrate, the light shielding layer covers at least part of an active region of the thin film transistor along a direction perpendicular to the first substrate, and the overlapping area of the light shielding layer and the active region of the thin film transistor is reduced along a direction parallel to the first direction and far away from the data voltage output end.
In a second aspect, an embodiment of the present invention further provides a display device, including the display panel according to the first aspect of the present invention.
The display panel provided by the embodiment of the invention comprises a display area and a non-display area surrounding the display area; the display area comprises a plurality of pixel electrodes arranged in an array, a plurality of thin film transistors, a plurality of data lines extending along a first direction and a plurality of scanning lines extending along a second direction; the non-display area comprises a data voltage output end and a scanning voltage output end, the data voltage output end is connected with the data line, and the scanning voltage output end is connected with the scanning line; the display panel further comprises a first substrate and a light shielding layer located on one side of the first substrate, the light shielding layer covers at least part of an active region of the thin film transistor along a direction perpendicular to the first substrate, and the overlapping area of the light shielding layer and the active region of the thin film transistor is reduced along a direction parallel to the first direction and far away from the data voltage output end. When the overlapping area of the shading layer and the active area is reduced, the capacitance at the position of the thin film transistor is correspondingly reduced, the leakage current at the position of the thin film transistor is increased, the charging efficiency of the pixel electrode is higher, and the brightness of the corresponding sub-pixel area is improved, so that the brightness difference of different sub-pixel areas is balanced, the problem of uneven display of the display panel is solved, and the display effect of the display panel is improved.
Drawings
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
FIG. 2 is an enlarged schematic view of FIG. 1 at A;
FIG. 3 is a schematic cross-sectional view taken along line B-B' of FIG. 2;
FIG. 4 is a schematic cross-sectional view taken along line C-C' of FIG. 2;
fig. 5 is a schematic diagram of a partial enlarged structure of a display panel according to an embodiment of the present invention;
fig. 6 is a schematic partial enlarged structure view of another display panel according to an embodiment of the invention;
fig. 7 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 8 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 9 is an enlarged schematic view of FIG. 8 at E;
fig. 10 is a schematic partial enlarged structural view of another display panel according to an embodiment of the invention;
fig. 11 is a schematic cross-sectional structure diagram of a display panel according to an embodiment of the present invention;
fig. 12 is a schematic partial enlarged structure view of another display panel according to an embodiment of the invention;
fig. 13 is a schematic partial enlarged structural view of another display panel according to an embodiment of the invention;
fig. 14 is a schematic structural diagram of a display device according to an embodiment of the present invention;
fig. 15 is a schematic structural diagram of another display device according to an embodiment of the disclosure.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention, fig. 2 is an enlarged structural diagram of fig. 1 at a point a, fig. 3 is a schematic structural diagram of a cross section of fig. 2 along a direction B-B ', fig. 4 is a schematic structural diagram of a cross section of fig. 2 along a direction C-C', and referring to fig. 1 to 4, in an embodiment of the present invention, the display panel includes a display area AA and a non-display area NA surrounding the display area AA; the display area AA includes a plurality of pixel electrodes 1 arranged in an array, a plurality of thin film transistors 2, a plurality of data lines 3 extending along a first direction X, and a plurality of scan lines 4 extending along a second direction Y, where the first direction X intersects the second direction Y;
first ends of a plurality of thin film transistors 2 arranged along a first direction X are connected with the same data line 3, and second ends of the thin film transistors 2 are connected with the pixel electrode 1; the control ends of a plurality of thin film transistors 2 arranged along the second direction Y are connected with the same scanning line 4; the non-display area NA comprises a data voltage output end 5 and a scanning voltage output end 6, wherein the data voltage output end 5 is connected with the data line 3, and the scanning voltage output end 6 is connected with the scanning line 4;
the display panel further comprises a first substrate 7 and a light shielding layer 8 positioned on one side of the first substrate 7, the light shielding layer 8 covers at least part of the active region 9 of the thin film transistor 2 along a direction perpendicular to the first substrate 7, and an overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 is reduced along a direction parallel to the first direction X and away from the data voltage output terminal 5.
Specifically, as shown in fig. 1 to 4, the display panel includes a display area AA and a non-display area NA, wherein the display area AA is provided with a plurality of pixel electrodes 1 arranged in an array, a plurality of thin film transistors 2, a plurality of data lines 3 extending along a first direction X, and a plurality of scan lines 4 extending along a second direction Y. The first direction X and the second direction Y intersect with each other, and the first direction X and the second direction Y are perpendicular to each other as shown in fig. 1 and 2, but the actual arrangement is not limited thereto.
Wherein, the plurality of data lines 3 extend along a first direction X and are arranged along a second direction Y; the plurality of scanning lines 4 extend in the second direction Y and are arranged in the first direction X, and each pixel electrode 1 is separated by two data lines 3 and two scanning lines 4 adjacent thereto, constituting a sub-pixel region. In each sub-pixel region, a thin film transistor 2 is correspondingly arranged, and each pixel electrode 1 is electrically connected with a data line 3 and a scanning line 4 through the thin film transistor 2.
Specifically, first ends 201 of a plurality of thin film transistors 2 arranged in the first direction X are connected to the same data line 3, and second ends 202 of the thin film transistors 2 are connected to the pixel electrode 1; the control terminals 203 of the plurality of thin film transistors 2 arranged in the second direction Y are connected to the same scanning line 4. The control terminal 203 of the thin film transistor 2 may be a gate of the thin film transistor 2, the first terminal 201 of the thin film transistor 2 may be a source of the thin film transistor 2, and the second terminal 202 may be a drain of the thin film transistor 2, or the first terminal 201 may be a drain of the thin film transistor 2 and the second terminal 202 may be a source of the thin film transistor 2.
Further, with reference to fig. 1 to 4, the non-display area NA of the display panel is provided with a data voltage output terminal 5 and a scan voltage output terminal 6, the data voltage output terminal 5 is connected to each data line 3, and the scan voltage output terminal 6 is connected to each scan line 4. The data voltage output terminal 5 transmits a data signal to the first terminal 201 of each thin film transistor 2 through the data line 3, and the scan voltage output terminal 6 transmits a scan signal to the control terminal 203 of each thin film transistor 2 through the scan line 4. When the thin film transistor 2 is controlled to be turned on by the scan signal output from the scan voltage output terminal 6, the first terminal 201 and the second terminal 202 of the thin film transistor 2 are electrically connected to transmit the data signal to each pixel electrode 1, so as to charge each pixel electrode 1.
Further, referring to fig. 1 to 4, the display panel further includes a first substrate 7 and a light shielding layer 8 on one side of the first substrate 7. The first substrate 7 may be a substrate, a light-shielding layer 8 may be provided on one side of the first substrate 7, and the thin film transistor 2, the data line 3, the scan line 4, the pixel electrode 2, and the like may be formed on one side of the light-shielding layer 8 away from the first substrate 7. The light-shielding layer 8 covers at least part of the active region 9 of each thin film transistor 2 in a direction perpendicular to the first substrate 7. Since the active region 9 of the thin film transistor 2 is sensitive to light irradiation, in order to prevent light from irradiating the active region 9 of the thin film transistor 2 to generate light leakage, a light shielding layer 8 may be disposed between the active region 9 of each thin film transistor 2 and the first substrate 7, and the light shielding layer 8 and the vertical projection portion of the thin film transistor 2 on the first substrate 7 are overlapped, so as to reduce the influence of light on the thin film transistor 2.
It is worth mentioning that, as shown in fig. 1 to fig. 4, in the present invention, the overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 is reduced along a direction parallel to the first direction X and away from the data voltage output terminal 5. The overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 is the overlapping area of the light shielding layer 8 and the active region 9 of each thin film transistor 2 projected perpendicularly to the first substrate 7. In this embodiment, along the first direction X, the overlapping area of the active region 9 and the light shielding layer 8 of the thin film transistor 2 in the sub-pixel region which is arranged closer to the data voltage output terminal 5 is larger; the overlapping area of the active region 9 and the light shielding layer 8 of the thin film transistor 2 in the sub-pixel region which is far from the data voltage output terminal 5 is small, in other words, the overlapping area of the active region 9 and the light shielding layer 8 of each thin film transistor 2 connected to the same data line 3 is gradually reduced along the first direction X. For example, in the two sub-pixel regions shown in fig. 2, along the first direction X, the thin film transistor 2 of the first sub-pixel region is closer to the data voltage output terminal 5, and the thin film transistor 2 of the second sub-pixel region is farther from the data voltage output terminal 5, and along the first direction X in fig. 2, the overlapping area of the active region 9 of the first thin film transistor 2 and the light shielding layer 8 is larger than the overlapping area of the active region 9 of the second thin film transistor 2 and the light shielding layer 8.
In the prior art, when a data signal is transmitted from the data voltage output terminal 5 to each thin film transistor 2, the longer the length of the data line 3 is, the larger the generated impedance is, the larger the voltage drop of the data signal at the thin film transistor 2 which is far from the data voltage output terminal 5 is, the lower the charging efficiency of the pixel electrode 1 connected to the thin film transistor 2 is, the darker the luminance of the sub-pixel region is caused, and the display uniformity of the display panel is affected. In the invention, the overlapping area of the light shielding layer 8 far away from the data voltage output end 5 and the active region 9 of the thin film transistor 2 is reduced, when the overlapping area of the light shielding layer 8 and the active region 9 is reduced, the capacitance at the thin film transistor 2 is correspondingly reduced, the leakage current at the thin film transistor 2 is increased, the conduction degree of the thin film transistor is increased, the charging efficiency of the pixel electrode 1 is higher, the brightness of the corresponding sub-pixel region is improved, namely, the brightness of the sub-pixel region far away from the data voltage output end 5 is improved, so that the brightness difference of different sub-pixel regions is balanced, the problem of display unevenness of the display panel is improved, and the display effect of the display panel is improved.
In the embodiment of the invention, the display panel comprises a display area and a non-display area surrounding the display area; the display area comprises a plurality of pixel electrodes arranged in an array, a plurality of thin film transistors, a plurality of data lines extending along a first direction and a plurality of scanning lines extending along a second direction; the non-display area comprises a data voltage output end and a scanning voltage output end, the data voltage output end is connected with the data line, and the scanning voltage output end is connected with the scanning line; the display panel further comprises a first substrate and a light shielding layer located on one side of the first substrate, the light shielding layer covers at least part of an active region of the thin film transistor along a direction perpendicular to the first substrate, and the overlapping area of the light shielding layer and the active region of the thin film transistor is reduced along a direction parallel to the first direction and far away from the data voltage output end. According to the invention, the overlapping area of the light shielding layer far away from the data voltage output end and the active area of the thin film transistor is reduced, when the overlapping area of the light shielding layer and the active area is reduced, the capacitance at the thin film transistor is correspondingly reduced, the leakage current at the thin film transistor is increased, the charging efficiency of the pixel electrode is higher, and the brightness of the corresponding sub-pixel area is improved, so that the brightness difference of different sub-pixel areas is balanced, the problem of uneven display of the display panel is solved, and the display effect of the display panel is improved.
Alternatively, referring still to fig. 1 to 4, in a possible embodiment, the data voltage output terminal 5 is connected to the first end 31 of the data line 3, and the overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 is reduced along a direction in which the first end 31 of the data line 3 points to the second end 32.
Specifically, in this embodiment, only one data voltage output terminal 5 may be provided, one data voltage output terminal 5 is used to drive each thin film transistor 2, and one data voltage output terminal 5 is provided, so that the area of the non-display area NA at the edge of the display panel can be reduced, and a narrow frame can be realized. In this arrangement, the first end 31 of each data line 3 is electrically connected to the data voltage output terminal 5, each data line 3 extends from the first end 31 along the first direction X, and the second end 32 of the data line 3 is the end of the display panel where the data line 3 is farthest from the data voltage output terminal 5.
Further, in a direction in which each data line 3 is directed from the first end 31 to the second end 32, an overlapping area of the light shielding layer 8 at each sub-pixel region and the active region 9 of the corresponding thin film transistor 2 is reduced, thereby ensuring that an overlapping area of the active region 9 of the thin film transistor 2 and the light shielding layer 8 of the sub-pixel region farthest from the data voltage output terminal 5 in the first direction X is minimized.
Alternatively, in a possible embodiment, the overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 decreases by a constant difference in a direction parallel to the first direction X and away from the data voltage output terminal 5.
Specifically, in the embodiment of the present invention, along a direction parallel to the first direction X and away from the data voltage output end 5, the overlapping area between the light shielding layer 8 and the active region 9 of the thin film transistor 2 may be set to decrease by a constant difference, that is, along a direction in which the first end 31 of the data line 3 points to the second end 32, the overlapping area between the active region 9 of each adjacent thin film transistor 2 connected to the same data line 3 and the light shielding layer 8 decreases by the same magnitude. In this arrangement, the leakage current at each of the tfts 2 arranged along the first direction X increases at a constant rate, and the uniformity of the display luminance of each of the sub-pixel regions arranged along the first direction X is further improved.
Optionally, for a specific manner of reducing the overlapping area of the active region 9 and the light shielding layer 8 of the thin film transistor 2, the embodiment of the present invention is not limited, and those skilled in the art may set the overlapping area according to actual requirements.
For example, referring still to fig. 1 to 4, in a possible embodiment, the area of the light shielding layer 8 may be reduced along a direction parallel to the first direction X and away from the data voltage output terminal 5.
Specifically, as shown in fig. 1 to 4, in the present embodiment, the overlapping area of the light shielding layer 8 and the active region 9 of each thin film transistor 2 can be adjusted by changing the area of the light shielding layer 8 corresponding to each thin film transistor 2. That is, the area of the light-shielding layer 8 corresponding to each thin-film transistor 2 can be reduced in the direction in which the first end 31 of the data line 3 is directed to the second end 32. The advantage of setting up like this lies in, need not to change the area that sets up of the active area 9 of each thin-film transistor 2, only can realize the adjustment that has active area 9 and light shield layer 8 overlapping area through the area that sets up of adjustment light shield layer 8, has reduced display panel's the preparation degree of difficulty, improves preparation efficiency.
Of course, in the practical application process, a person skilled in the art may select other possible design schemes for reducing the overlapping area of the active region 9 and the light shielding layer 8 of the thin film transistor 2 according to practical situations, for example, adjust the area size of the active region 9 of each thin film transistor 2, adjust the misalignment between the light shielding layer 8 and the active region 9, or adjust the relative area ratio between the light shielding layer 8 and the active region 9 of the thin film transistor 2, and the like, and any method capable of reducing the overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 in the direction pointing to the second end 32 along the first end 31 of the data line 3 is within the scope of the technical solution protected by the embodiment of the present invention.
Accordingly, in one possible embodiment, the area of the light-shielding layer 8 may be arranged to decrease by a constant difference in a direction parallel to the first direction X and away from the data voltage output terminal 5.
Specifically, when the overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 is adjusted by changing the area of the light shielding layer 8 corresponding to each thin film transistor 2, the area of the light shielding layer 8 corresponding to each thin film transistor 2 arranged along the direction from the first end 31 to the second end 32 of the data line 3 can be reduced by a constant difference, and the improvement effect on the brightness uniformity of different regions of the display panel is improved.
Optionally, fig. 5 is a schematic diagram of a partial enlarged structure of a display panel according to an embodiment of the present invention, fig. 6 is a schematic diagram of a partial enlarged structure of another display panel according to an embodiment of the present invention, and referring to fig. 5 and fig. 6, in a possible embodiment, the thin film transistor 2 is a dual-gate transistor, the active region 9 of the thin film transistor 2 includes a first active region 91 and a second active region 92, the light shielding layer 8 includes a first light shielding region 81 and a second light shielding region 82, the first light shielding region 81 covers the first active region 91, the second light shielding region 82 covers at least a portion of the second active region 92, and an area of the second light shielding region 82 decreases along a direction parallel to the first direction X and away from the data voltage output terminal 5.
In this embodiment, the thin film transistor 2 may be a double-gate transistor, and the double-gate transistor can reduce parasitic parameters of the thin film transistor 2 and improve the cut-off frequency of the thin film transistor 2. The double-gate transistor is mainly grounded through the second gate, so that an effective electrostatic shielding effect is achieved between the first gate and the drain, the feedback capacitance between the gate and the drain of the thin film transistor 2 is greatly reduced, and the cut-off frequency is improved.
Specifically, as shown in fig. 5 and 6, when the thin film transistor 2 is a double gate transistor, the active region 9 of the thin film transistor 2 includes a first active region 91 and a second active region 92, and positions where the first active region 91 and the second active region 92 overlap with the scan line 4 correspond to the first gate and the second gate of the thin film transistor 2. Correspondingly, at this time, the light shielding layer 8 may also include a first light shielding region 81 and a second light shielding region 82, where the first light shielding region 81 covers the first active region 91, that is, a vertical projection of the first active region 91 on the light shielding layer 8 is located in the first light shielding region 81; meanwhile, the second light shielding region 82 covers at least a portion of the second active region 92, that is, a perpendicular projection of the second active region 92 on the light shielding layer 8 at least partially overlaps with the second light shielding region 82.
Further, in the present embodiment, the areas of the first light-shielding regions 81 of the thin film transistors 2 may be set to be the same, and the overlapping area between the light-shielding layer 8 and the active region 9 of the thin film transistor 2 may be adjusted by adjusting the area of the second light-shielding region 82. Specifically, in a direction parallel to the first direction X and away from the data voltage output terminal 5, the area of the second light-shielding region 82 may be set to be reduced, thereby reducing an overlapping area of the second light-shielding region 81 and the second active region 92 vertically projected on the first substrate in the extending direction of the data line 3. In a direction parallel to the first direction X and away from the data voltage output terminal 5, the distance between the thin film transistor 2 and the data voltage output terminal 5 shown in fig. 5 is relatively short, and the area of the second light-shielding region 82 is relatively large; the thin film transistor 2 shown in fig. 6 is farther from the data voltage output terminal 5, and the area of the second light-shielding region 82 is smaller.
Alternatively, the foregoing embodiment is described by taking an example that each thin film transistor 2 is driven by the same data voltage output terminal 5, and in other possible embodiments, each thin film transistor 2 may be driven and controlled by a different data voltage output terminal 5.
Fig. 7 is a schematic structural diagram of another display panel according to an embodiment of the present invention, and referring to fig. 7, the data voltage output terminal 5 may include a first data voltage output terminal 51 and a second data voltage output terminal 52, the first data voltage output terminal 51 is connected to the first end 31 of the data line 3, the second data voltage output terminal 52 is connected to the second end 32 of the data line 3, and an overlapping area between the light shielding layer 8 and the active region 9 of the thin film transistor 2 is reduced along a direction in which the two ends of the data line 3 point to the center.
Specifically, as shown in fig. 7, in the present embodiment, the data voltage output terminal 5 may include a first data voltage output terminal 51 and a second data voltage output terminal 52, wherein the first data voltage output terminal 51 is connected to the first end 31 of the data line 3, and the second data voltage output terminal 52 is connected to the second end 32 of the data line 3. The first data voltage output terminal 51 transmits a first data signal to each thin film transistor 2 through the data line 3, the second data voltage output terminal 52 transmits a second data signal to each thin film transistor 2 through the data line 3, and each thin film transistor 2 connected to the same data line 3 simultaneously receives the first data signal and the second data signal provided by the first data voltage output terminal 51 and the second data voltage output terminal 52, and further transmits the first data signal and the second data signal to the pixel electrode 1 to charge the pixel electrode 1.
At this time, along the first direction X, the distances between the thin film transistor 2 located at the center of the display panel and the first data voltage output terminal 51 and the second data voltage output terminal 52 are relatively long, the voltage drop of the first data signal and the data signal when the first data signal and the data signal are transmitted to the thin film transistor 2 at the center is relatively large, and the voltage of the data signal received by the pixel electrode 1 connected to the thin film transistor 2 is relatively small, which may affect the display brightness. Therefore, in the present embodiment, along the direction in which the two ends of the data line 3 point to the center, it may be arranged that the overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 is reduced, that is, the overlapping area of the active region 9 of the thin film transistor 2 closest to the two ends of the data line 3 and the light shielding layer 8 corresponding thereto is the largest, and the overlapping area of the active region 9 of the thin film transistor 2 located at the center of the data line 3 and the light shielding layer 8 corresponding thereto is the smallest. And further, the brightness difference of the sub-pixel area at the center of the display panel, which is generated due to the problem of voltage drop, is balanced, and the display uniformity of the display panel is ensured.
In this embodiment, two data voltage output terminals 5 are provided, and the two data voltage output terminals 5 charge the pixel electrodes 1 together, so that the problem of increased voltage drop of data signals transmitted through the longer data line 3 is avoided; the design of the overlapping area of the active region 9 and the light shielding layer 8 of the thin film transistor 2 is combined, so that the overall display brightness of the display panel can be kept consistent to a greater extent, and the display effect of the display panel is improved.
Optionally, fig. 8 is a schematic structural diagram of another display panel according to an embodiment of the present invention, and fig. 9 is an enlarged structural diagram of fig. 8 at E, as shown in fig. 8 and fig. 9, in a possible embodiment, the display area AA may include a plurality of data lines 3 with different lengths; in a direction parallel to the second direction Y, an overlapping area of the light shielding layer 8 and the active region 9 of the first thin film transistor 21 is smaller than an overlapping area of the light shielding layer 8 and the active region 9 of the second thin film transistor 22; the first thin film transistor 21 is connected to the first data line 33, the second thin film transistor 22 is connected to the second data line 34, and the length of the first data line 33 is greater than the length of the second data line 34.
Specifically, in this embodiment, the display panel may be a special-shaped display panel. In the special-shaped display panel, the display area AA may include a plurality of data lines 3 having different lengths. The length of each data line 3 in the display area AA is also adjusted according to the specific shape of the display panel. The display panel shown in fig. 8 and 9 has a circular shape, and the display area AA has a corresponding circular shape, and the length of each data line 3 arranged along the second direction Y should be increased and then decreased, and when the display panel has another shape, the length of each data line 3 is different. Taking the circular display panel as an example, along the second direction Y, the length of the data line 3 located at the center D of the circular display area AA is longest, and the closer to the edge of the display area AA, the shorter the length of the data line 3 is.
In this embodiment, in a direction parallel to the second direction Y, an overlapping area of the light shielding layer 8 and the active region 9 of the first thin film transistor 21 may be set smaller than an overlapping area of the light shielding layer 8 and the active region 9 of the second thin film transistor 22. The first thin film transistor 21 is connected to the first data line 33, the second thin film transistor 22 is connected to the second data line 34, and the length of the first data line 33 is greater than that of the second data line 34.
It can be understood that, when the data lines 3 have different lengths, which results in different impedances of the data lines 3, and the data signals are transmitted from the data voltage output terminal 5 to the pixel electrodes 1 arranged along the second direction Y, the voltage magnitudes of the data signals may be different, so that the differences of the light-emitting luminance of the sub-pixel regions arranged along the second direction Y occur. The larger the length of the data line 3 is, the larger the impedance on the data line 3 is, the higher the charging efficiency of the pixel electrode 1 connected on the data line 3 is, and the larger the light-emitting luminance of the sub-pixel region is; the shorter the length of the data line 3 is, the lower the impedance on the data line 3 is, the lower the charging efficiency of the pixel electrode 1 connected to the data line 3 is, and the smaller the light emitting luminance in the sub-pixel region is.
In the present embodiment, of the thin film transistors 2 in two adjacent sub-pixel regions along the second direction Y, the overlapping area of the active region 9 of the first thin film transistor 21 connected to the longer first data line 33 and the light shielding layer 8 is smaller than the overlapping area of the active region 9 of the second thin film transistor 22 connected to the shorter second data line 34 and the light shielding layer 8. By reducing the overlapping area of the active region 9 of the first thin film transistor 21 connected with the longer first data line 33 and the light shielding layer 8, the leakage current at the first thin film transistor 21 is increased, so that the larger impedance on the first data line 33 is balanced, the uniformity of the light emitting brightness of each sub-pixel region is improved, and the display effect of the display panel is improved.
Fig. 10 is a schematic partial enlarged structure view of another display panel according to an embodiment of the present invention, in which fig. 10 (a) corresponds to an area a1 in fig. 8, fig. 10 (b) corresponds to an area a2 in fig. 8, fig. 10 (c) corresponds to an area D from the center of circle in fig. 8, fig. 10 (D) corresponds to an area A3 in fig. 8, and fig. 10 (e) corresponds to an area a4 in fig. 8. In fig. 10, the thin film transistors in the respective regions are described as double-gate transistors, and in order to clearly describe the arrangement of the light-shielding layer 8 and the active region 9 of the thin film transistor, the entire structure is not shown in fig. 10, and only a part of the structure is shown. Referring to fig. 8 and 10, the length of the data line 3 corresponding to the region a1, the circle center D, and the region a4 is longest, and the length of the data line 3 corresponding to the regions a2 and A3 is shorter, so that, along the second direction Y, the overlapping area of the second light-shielding region 82 at the circle center D and the second active region 92 of the corresponding thin film transistor may be made smaller than the overlapping area of the second light-shielding region 82 at the regions a2 and A3 and the second active region 92 of the corresponding thin film transistor; meanwhile, the distances from the region a4, the center D, and the region a1 to the data voltage output terminal 5 gradually increase along the first direction X, and thus, the overlapping area of the second light-shielding region 82 at the region a4, the center D, and the region a1 with the second active region 92 of the corresponding thin film transistor may be set to decrease, thereby balancing the luminance difference of each sub-pixel region of the display panel.
Alternatively, and still referring to fig. 8, in one possible embodiment, the shape of the display area AA includes a circle or an ellipse. The arrangement mode of the active area and the light shielding layer of the thin film transistor is suitable for the display panel with the display area AA in a circular or oval shape. The circular or oval display panel has more application fields, for example, smart watches, vehicle-mounted display devices, and the like, and when the display panel has other special-shaped structures, the arrangement modes of the active regions and the light shielding layers of the thin film transistors corresponding to the data lines can be correspondingly adjusted, so as to ensure the display uniformity of the display panel.
Optionally, fig. 11 is a schematic cross-sectional structure diagram of a display panel according to an embodiment of the present invention, as shown in fig. 11, in a possible embodiment, the display panel may further include a second substrate 10 disposed opposite to the first substrate 7, and a liquid crystal layer 11 located between the first substrate 7 and the second substrate 10; the backlight module 12 is disposed on a side of the first substrate 7 away from the second substrate 10.
Specifically, in this embodiment, the display panel may be a liquid crystal display panel, the display panel further includes a second substrate 10 disposed opposite to the first substrate 7, the second substrate 10 may be a color filter substrate, and a liquid crystal layer 11 is disposed between the first substrate 7 and the second substrate 10. The display panel may further include a common electrode (not shown in the figure), the common electrode receives a common electrode signal, the data voltage output terminal provides a driving signal to the pixel electrode 1, an electric field is formed between the pixel electrode 1 and the common electrode, and liquid crystal in the liquid crystal layer 11 is driven to turn over, thereby implementing normal display.
The display panel further comprises a backlight module 12, and the backlight module 12 is disposed on a side of the first substrate 7 away from the second substrate 10. Since the liquid crystal itself cannot emit light, the backlight module 12 needs to be disposed, and light emitted from the backlight module 12 passes through the light shielding layer 8, the first substrate 7, and the liquid crystal layer 11 and then is emitted from the light emitting surface of the second substrate 10.
Other film layers may be further included in the display panel, and those skilled in the art may set the other film layers in the display panel according to actual requirements, which are not described herein too much.
Alternatively, fig. 12 is a schematic partial enlarged structure of another display panel according to an embodiment of the present invention, fig. 13 is a schematic partial enlarged structure of another display panel according to an embodiment of the present invention, and referring to fig. 12 and fig. 13, in some possible embodiments, a projection shape of the light shielding layer 8 on the first substrate 7, which is different from an overlapping area of the active region 9 of the thin film transistor 2, may be set.
Specifically, in the present embodiment, the overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 can be adjusted by changing the projection shape of the light shielding layer 8 overlapping the active region 9 of each thin film transistor 2 on the first substrate 7. For convenience of description, the projection shape of the light shielding layer 8 on the first substrate 7 will be referred to as the shape of the light shielding layer 8.
For example, as shown in fig. 12, among the thin film transistors 2 connected to the same data line 3, the light shielding layer 8 corresponding to the active region 9 of the thin film transistor 2 that is closer to the data voltage output terminal 5 may be shaped as rectangles having a length and a width of d1 and d2, respectively; the light shielding layers 8 corresponding to the active regions 9 of the thin film transistors 2, which are distant from the data voltage output terminals 5, may be disposed in a diamond shape having two diagonal line lengths d1 and d2, respectively, thereby achieving a reduction in the overlapping area of the light shielding layers 8 and the active regions 9 of the thin film transistors 2 in a direction parallel to the first direction X and distant from the data voltage output terminals.
For example, as shown in fig. 13, in the second direction Y, the light shielding layer 8 corresponding to the active region 9 of the first thin film transistor 21 connected to the longer first data line 33 may be shaped as a diamond having two diagonal line lengths of d1 and d2, respectively; the shape of the light-shielding layer 8 corresponding to the active region 9 of the second thin film transistor 22 connected to the shorter second data line 34 is an ellipse whose major and minor axes are d1 and d2, respectively, thereby achieving that the area of overlap of the light-shielding layer 8 and the active region 9 of the first thin film transistor 21 is smaller than the area of overlap of the light-shielding layer 8 and the active region 9 of the second thin film transistor 22 in a direction parallel to the second direction Y.
The shape of the light shielding layer 8 is only an optional setting manner, and in an actual application process, a person skilled in the art may adjust the shape of the light shielding layer 8 overlapped with the thin film transistor 2 according to actual requirements, and any specific manner of adjusting the overlapped area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 by changing the shape of the light shielding layer 8 is within the technical solution protected by the embodiment of the present invention.
Based on the same inventive concept, the embodiment of the invention also provides a display device. Fig. 14 is a schematic structural diagram of a display device according to an embodiment of the present invention, and as shown in fig. 14, the display device includes the display panel 100 according to any embodiment of the present invention, so that the display device according to the embodiment of the present invention has the corresponding beneficial effects of the display panel 100 according to the embodiment of the present invention, and details thereof are not repeated herein.
Fig. 15 is a schematic structural diagram of another display device according to an embodiment of the present invention, and as shown in fig. 15, in a possible embodiment, the display device is an in-vehicle display device. The vehicle-mounted display device is generally of a special-shaped structure, such as a circle or an ellipse. By utilizing the display panel 100 to manufacture the vehicle-mounted display device, the problem that the existing vehicle-mounted display device is uneven in display can be better solved, and the display effect of the vehicle-mounted display device is improved.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments illustrated herein, but is capable of various obvious modifications, rearrangements, combinations and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (13)
1. A display panel characterized by comprising a display area and a non-display area surrounding the display area;
the display area comprises a plurality of pixel electrodes arranged in an array, a plurality of thin film transistors, a plurality of data lines extending along a first direction and a plurality of scanning lines extending along a second direction, and the first direction is crossed with the second direction;
first ends of a plurality of thin film transistors arranged along the first direction are connected with the same data line, and second ends of the thin film transistors are connected with the pixel electrode;
the control ends of the plurality of thin film transistors arranged along the second direction are connected with the same scanning line;
the non-display area comprises a data voltage output end and a scanning voltage output end, the data voltage output end is connected with the data line, and the scanning voltage output end is connected with the scanning line;
the display panel further comprises a first substrate and a light shielding layer located on one side of the first substrate, the light shielding layer covers at least part of an active region of the thin film transistor along a direction perpendicular to the first substrate, and the overlapping area of the light shielding layer and the active region of the thin film transistor is reduced along a direction parallel to the first direction and far away from the data voltage output end.
2. The display panel according to claim 1, wherein an overlapping area of the light shielding layer and the active region of the thin film transistor decreases by a constant difference in a direction parallel to the first direction and away from the data voltage output terminal.
3. The display panel according to claim 1, wherein an area of the light-shielding layer decreases in a direction parallel to the first direction and away from the data voltage output terminal.
4. The display panel according to claim 3, wherein the area of the light-shielding layer decreases by a constant difference in a direction parallel to the first direction and away from the data voltage output terminal.
5. The display panel according to claim 3, wherein the thin film transistor is a double gate transistor, the active region of the thin film transistor includes a first active region and a second active region, the light shielding layer includes a first light shielding region and a second light shielding region, the first light shielding region covers the first active region, the second light shielding region covers at least a part of the second active region, and an area of the second light shielding region decreases in a direction parallel to the first direction and away from the data voltage output terminal.
6. The display panel according to claim 1, wherein the data voltage output terminal is connected to a first end of the data line, and an overlapping area of the light shielding layer and the active region of the thin film transistor decreases in a direction in which the first end of the data line points to a second end.
7. The display panel according to claim 1, wherein the data voltage output terminal comprises a first data voltage output terminal and a second data voltage output terminal, the first data voltage output terminal is connected to a first end of the data line, the second data voltage output terminal is connected to a second end of the data line, and an overlapping area of the light shielding layer and the active region of the thin film transistor decreases in a direction in which both ends of the data line point to a center.
8. The display panel according to claim 1, wherein the display region includes a plurality of the data lines having different lengths;
in a direction parallel to the second direction, an overlapping area of the light shielding layer and the active region of the first thin film transistor is smaller than an overlapping area of the light shielding layer and the active region of the second thin film transistor;
the first thin film transistor is connected with a first data line, the second thin film transistor is connected with a second data line, and the length of the first data line is greater than that of the second data line.
9. The display panel of claim 8, wherein the shape of the display area comprises a circle or an ellipse.
10. The display panel according to claim 1, further comprising a second substrate disposed opposite to the first substrate, and a liquid crystal layer between the first substrate and the second substrate;
the backlight module is positioned on one side of the first substrate, which is far away from the second substrate.
11. The display panel according to claim 1, wherein a projection shape of the light shielding layer on the first substrate is different from an overlapping area of the active region of the thin film transistor.
12. A display device comprising the display panel according to any one of claims 1 to 11.
13. The display device according to claim 12, wherein the display device is an in-vehicle display device.
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Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0730120A (en) * | 1993-07-09 | 1995-01-31 | Toshiba Corp | Thin film transistor and liquid crystal display device using same |
| KR20050073652A (en) * | 2004-01-09 | 2005-07-18 | 삼성전자주식회사 | Array substrate, color filter substrate and display panel having the same |
| CN1664681A (en) * | 2002-10-16 | 2005-09-07 | Lg.菲利浦Lcd株式会社 | Array substrate for liquid crystal device and producing method thereof |
| KR20140077002A (en) * | 2012-12-13 | 2014-06-23 | 엘지디스플레이 주식회사 | Organic light-emitting diode display device |
| CN104009045A (en) * | 2014-05-29 | 2014-08-27 | 京东方科技集团股份有限公司 | Array base plate and displaying device |
| CN106405963A (en) * | 2016-10-31 | 2017-02-15 | 厦门天马微电子有限公司 | Array substrate and display panel comprising same |
| GB201918689D0 (en) * | 2018-12-31 | 2020-01-29 | Lg Display Co Ltd | n |
| EP3674787A1 (en) * | 2018-12-31 | 2020-07-01 | LG Display Co., Ltd. | Liquid crystal display device |
| CN112068376A (en) * | 2020-09-28 | 2020-12-11 | 成都中电熊猫显示科技有限公司 | Array substrate and display device |
-
2022
- 2022-06-30 CN CN202210772840.4A patent/CN115061318B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0730120A (en) * | 1993-07-09 | 1995-01-31 | Toshiba Corp | Thin film transistor and liquid crystal display device using same |
| CN1664681A (en) * | 2002-10-16 | 2005-09-07 | Lg.菲利浦Lcd株式会社 | Array substrate for liquid crystal device and producing method thereof |
| KR20050073652A (en) * | 2004-01-09 | 2005-07-18 | 삼성전자주식회사 | Array substrate, color filter substrate and display panel having the same |
| KR20140077002A (en) * | 2012-12-13 | 2014-06-23 | 엘지디스플레이 주식회사 | Organic light-emitting diode display device |
| CN104009045A (en) * | 2014-05-29 | 2014-08-27 | 京东方科技集团股份有限公司 | Array base plate and displaying device |
| CN106405963A (en) * | 2016-10-31 | 2017-02-15 | 厦门天马微电子有限公司 | Array substrate and display panel comprising same |
| GB201918689D0 (en) * | 2018-12-31 | 2020-01-29 | Lg Display Co Ltd | n |
| EP3674787A1 (en) * | 2018-12-31 | 2020-07-01 | LG Display Co., Ltd. | Liquid crystal display device |
| CN112068376A (en) * | 2020-09-28 | 2020-12-11 | 成都中电熊猫显示科技有限公司 | Array substrate and display device |
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