CN115061318B - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN115061318B CN115061318B CN202210772840.4A CN202210772840A CN115061318B CN 115061318 B CN115061318 B CN 115061318B CN 202210772840 A CN202210772840 A CN 202210772840A CN 115061318 B CN115061318 B CN 115061318B
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- 239000010409 thin film Substances 0.000 claims abstract description 161
- 239000000758 substrate Substances 0.000 claims abstract description 55
- 230000007423 decrease Effects 0.000 claims description 8
- 239000004973 liquid crystal related substance Substances 0.000 claims description 8
- 230000000694 effects Effects 0.000 abstract description 11
- 238000010586 diagram Methods 0.000 description 12
- 239000010408 film Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 229910003460 diamond Inorganic materials 0.000 description 2
- 239000010432 diamond Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000008707 rearrangement Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Geometry (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention discloses a display panel and a display device. The display panel comprises a display area and a non-display area surrounding the display area; the display area comprises a plurality of pixel electrodes, a plurality of thin film transistors, a plurality of data lines and a plurality of scanning lines, wherein the pixel electrodes are arranged in an array manner, the data lines extend along a first direction, and the scanning lines extend along a second direction; the non-display area comprises a data voltage output end and a scanning voltage output end, the data voltage output end is connected with the data line, and the scanning voltage output end is connected with the scanning line; the display panel further comprises a first substrate and a shading layer positioned on one side of the first substrate, the shading layer covers at least part of the active area of the thin film transistor along the direction perpendicular to the first substrate, and the overlapping area of the shading layer and the active area of the thin film transistor is reduced along the direction parallel to the first direction and far away from the data voltage output end. Through the technical scheme, the brightness difference of different sub-pixel areas can be balanced, the problem of uneven display of the display panel is solved, and the display effect of the display panel is improved.
Description
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a display panel and a display device.
Background
With the development of display technology, the application field of display devices is gradually expanding. For large or special-shaped display devices, such as vehicle-mounted display devices, because the signal lines are longer or shorter, the presence of voltage drop during transmission of the electric signals through the signal lines may cause uneven display in different areas of the display device, and affect the display effect. In view of the above problems, there is no better solution at present.
Disclosure of Invention
In view of the above, the present invention provides a display panel and a display device, so as to improve the uniformity of display of the display panel and the display device and enhance the display effect.
In a first aspect, an embodiment of the present invention provides a display panel, including a display area and a non-display area surrounding the display area;
the display area comprises a plurality of pixel electrodes, a plurality of thin film transistors, a plurality of data lines and a plurality of scanning lines, wherein the pixel electrodes are arranged in an array mode, the data lines extend along a first direction, the scanning lines extend along a second direction, and the first direction and the second direction are intersected;
first ends of a plurality of the thin film transistors arranged along the first direction are connected with the same data line, and second ends of the thin film transistors are connected with the pixel electrode;
the control ends of the thin film transistors arranged along the second direction are connected with the same scanning line;
the non-display area comprises a data voltage output end and a scanning voltage output end, the data voltage output end is connected with the data line, and the scanning voltage output end is connected with the scanning line;
the display panel further comprises a first substrate and a shading layer positioned on one side of the first substrate, the shading layer covers at least part of the active area of the thin film transistor along the direction perpendicular to the first substrate, and the overlapping area of the shading layer and the active area of the thin film transistor is reduced along the direction parallel to the first direction and far away from the data voltage output end.
In a second aspect, an embodiment of the present invention further provides a display apparatus, including a display panel according to the first aspect of the present invention.
The display panel provided by the embodiment of the invention comprises a display area and a non-display area surrounding the display area; the display area comprises a plurality of pixel electrodes, a plurality of thin film transistors, a plurality of data lines and a plurality of scanning lines, wherein the pixel electrodes are arranged in an array manner, the data lines extend along a first direction, and the scanning lines extend along a second direction; the non-display area comprises a data voltage output end and a scanning voltage output end, the data voltage output end is connected with the data line, and the scanning voltage output end is connected with the scanning line; the display panel further comprises a first substrate and a shading layer positioned on one side of the first substrate, the shading layer covers at least part of the active area of the thin film transistor along the direction perpendicular to the first substrate, and the overlapping area of the shading layer and the active area of the thin film transistor is reduced along the direction parallel to the first direction and far away from the data voltage output end. When the overlapping area of the shading layer and the active area is reduced, the capacitance of the thin film transistor is correspondingly reduced, the leakage current of the thin film transistor is increased, the charging efficiency of the pixel electrode is higher, the brightness of the corresponding sub-pixel area is improved, the brightness difference of different sub-pixel areas is balanced, the problem of uneven display of the display panel is solved, and the display effect of the display panel is improved.
Drawings
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
FIG. 2 is an enlarged schematic view of FIG. 1 at A;
FIG. 3 is a schematic cross-sectional view of FIG. 2 along the direction B-B';
FIG. 4 is a schematic cross-sectional view of FIG. 2 along the direction C-C';
fig. 5 is a schematic diagram of a partial enlarged structure of a display panel according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a partial enlarged structure of another display panel according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 9 is an enlarged schematic view of FIG. 8 at E;
fig. 10 is a schematic view of a partial enlarged structure of a display panel according to another embodiment of the present invention;
FIG. 11 is a schematic cross-sectional view of a display panel according to an embodiment of the present invention;
FIG. 12 is a schematic view of a partial enlarged structure of a display panel according to another embodiment of the present invention;
FIG. 13 is a schematic view of a partially enlarged structure of a display panel according to another embodiment of the present invention;
fig. 14 is a schematic structural diagram of a display device according to an embodiment of the present invention;
fig. 15 is a schematic structural diagram of another display device according to an embodiment of the invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
Fig. 1 is a schematic structural view of a display panel according to an embodiment of the present invention, fig. 2 is an enlarged structural view at a of fig. 1, fig. 3 is a schematic structural view of a cross section of fig. 2 along a direction B-B ', fig. 4 is a schematic structural view of a cross section of fig. 2 along a direction C-C', and referring to fig. 1 to fig. 4, in an embodiment of the present invention, the display panel includes a display area AA and a non-display area NA surrounding the display area AA; the display area AA includes a plurality of pixel electrodes 1 arranged in an array, a plurality of thin film transistors 2, a plurality of data lines 3 extending in a first direction X, and a plurality of scan lines 4 extending in a second direction Y, the first direction X intersecting the second direction Y;
first ends of a plurality of thin film transistors 2 arranged along a first direction X are connected to the same data line 3, and second ends of the thin film transistors 2 are connected to the pixel electrode 1; the control ends of the thin film transistors 2 arranged along the second direction Y are connected with the same scanning line 4; the non-display area NA comprises a data voltage output end 5 and a scanning voltage output end 6, the data voltage output end 5 is connected with the data line 3, and the scanning voltage output end 6 is connected with the scanning line 4;
the display panel further comprises a first substrate 7 and a light shielding layer 8 on one side of the first substrate 7, wherein the light shielding layer 8 covers at least part of the active region 9 of the thin film transistor 2 along a direction perpendicular to the first substrate 7, and the overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 is reduced along a direction parallel to the first direction X and away from the data voltage output terminal 5.
Specifically, as shown in fig. 1 to 4, the display panel includes a display area AA provided with a plurality of pixel electrodes 1 arranged in an array, a plurality of thin film transistors 2, a plurality of data lines 3 extending in a first direction X, and a plurality of scan lines 4 extending in a second direction Y, and a non-display area NA. The first direction X and the second direction Y intersect, and fig. 1 and 2 show that the first direction X and the second direction Y are perpendicular, and the actual arrangement manner is not limited thereto.
Wherein, the plurality of data lines 3 extend along the first direction X and are arranged along the second direction Y; the plurality of scanning lines 4 extend in the second direction Y and are arranged in the first direction X, and each pixel electrode 1 is partitioned by two data lines 3 and two scanning lines 4 adjacent thereto to constitute a sub-pixel region. In each sub-pixel region, a thin film transistor 2 is correspondingly disposed, and each pixel electrode 1 is electrically connected to a data line 3 and a scan line 4 through the thin film transistor 2.
Specifically, the first ends 201 of the plurality of thin film transistors 2 arranged in the first direction X are connected to the same data line 3, and the second ends 202 of the thin film transistors 2 are connected to the pixel electrode 1; the control terminals 203 of the plurality of thin film transistors 2 arranged in the second direction Y are connected to the same scanning line 4. The control terminal 203 of the thin film transistor 2 may be a gate of the thin film transistor 2, the first terminal 201 of the thin film transistor 2 may be a source of the thin film transistor 2, the second terminal 202 may be a drain of the thin film transistor 2, or the first terminal 201 may be a drain of the thin film transistor 2, and the second terminal 202 may be a source of the thin film transistor 2.
Further, as shown in fig. 1 to 4, the non-display area NA of the display panel is provided with a data voltage output terminal 5 and a scan voltage output terminal 6, the data voltage output terminal 5 is connected to each data line 3, and the scan voltage output terminal 6 is connected to each scan line 4. The data voltage output terminal 5 transmits a data signal to the first terminal 201 of each thin film transistor 2 through the data line 3, and the scan voltage output terminal 6 transmits a scan signal to the control terminal 203 of each thin film transistor 2 through the scan line 4. When the scanning signal output by the scanning voltage output terminal 6 controls the thin film transistor 2 to be turned on, the first terminal 201 and the second terminal 202 of the thin film transistor 2 are electrically connected to transmit the data signal to each pixel electrode 1, so as to charge each pixel electrode 1.
Further, referring to fig. 1 to 4, the display panel further includes a first substrate 7 and a light shielding layer 8 positioned at one side of the first substrate 7. The first substrate 7 may be a substrate, a light shielding layer 8 is disposed on one side of the first substrate 7, and the thin film transistor 2, the data line 3, the scan line 4, the pixel electrode 2, and the like may be formed on a side of the light shielding layer 8 away from the first substrate 7. The light shielding layer 8 covers at least part of the active region 9 of each thin film transistor 2 in a direction perpendicular to the first substrate 7. Since the active regions 9 of the thin film transistors 2 are sensitive to the irradiation of light, in order to avoid the light from leaking when the light irradiates the active regions 9 of the thin film transistors 2, a light shielding layer 8 may be disposed between the active regions 9 of each thin film transistor 2 and the first substrate 7, and the light shielding layer 8 may overlap with the vertical projection portion of the thin film transistor 2 on the first substrate 7, so as to reduce the influence of the light on the thin film transistor 2.
It should be noted that, as shown in fig. 1 to 4, in the present invention, the overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 is reduced along the direction parallel to the first direction X and away from the data voltage output terminal 5. The overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2, i.e., the overlapping area of the light shielding layer 8 and the vertical projection of the active region 9 of each thin film transistor 2 on the first substrate 7. In this embodiment, along the first direction X, the overlapping area of the active region 9 of the thin film transistor 2 and the light shielding layer 8 in the sub-pixel region closer to the data voltage output terminal 5 is larger; the overlapping area of the active region 9 of the thin film transistor 2 and the light shielding layer 8 in the sub-pixel region farther from the data voltage output terminal 5 is smaller, in other words, the overlapping area of the active region 9 of each thin film transistor 2 and the light shielding layer 8 connected to the same data line 3 is gradually reduced along the first direction X. For example, in the two sub-pixel regions shown in fig. 2, the thin film transistor 2 of the first sub-pixel region is closer to the data voltage output terminal 5 along the first direction X, the thin film transistor 2 of the second sub-pixel region is farther from the data voltage output terminal 5, and in the first direction X in fig. 2, the overlapping area of the active region 9 of the first thin film transistor 2 and the light shielding layer 8 is larger than the overlapping area of the active region 9 of the second thin film transistor 2 and the light shielding layer 8.
In the prior art, when a data signal is transmitted from a data voltage output terminal 5 to each thin film transistor 2, the longer the length of a data line 3 is, the larger the generated impedance is, which results in the larger voltage drop of the data signal at the thin film transistor 2 far from the data voltage output terminal 5, the lower the charging efficiency of the pixel electrode 1 connected with the thin film transistor 2, which results in the darker the light-emitting brightness of the sub-pixel region, and the display uniformity of the display panel is affected. In the invention, the overlapping area of the shading layer 8 and the active area 9 of the thin film transistor 2, which are far away from the data voltage output end 5, is reduced, when the overlapping area of the shading layer 8 and the active area 9 is reduced, the capacitance at the thin film transistor 2 is correspondingly reduced, the current leakage at the thin film transistor 2 is increased, the conduction degree of the current leakage is increased, the charging efficiency of the pixel electrode 1 is higher, the brightness of the corresponding sub-pixel area is improved, namely the brightness of the sub-pixel area far away from the data voltage output end 5 is improved, so that the brightness difference of different sub-pixel areas is balanced, the display non-uniformity problem of the display panel is improved, and the display effect of the display panel is improved.
In the embodiment of the invention, the display panel comprises a display area and a non-display area surrounding the display area; the display area comprises a plurality of pixel electrodes, a plurality of thin film transistors, a plurality of data lines and a plurality of scanning lines, wherein the pixel electrodes are arranged in an array manner, the data lines extend along a first direction, and the scanning lines extend along a second direction; the non-display area comprises a data voltage output end and a scanning voltage output end, the data voltage output end is connected with the data line, and the scanning voltage output end is connected with the scanning line; the display panel further comprises a first substrate and a shading layer positioned on one side of the first substrate, the shading layer covers at least part of the active area of the thin film transistor along the direction perpendicular to the first substrate, and the overlapping area of the shading layer and the active area of the thin film transistor is reduced along the direction parallel to the first direction and far away from the data voltage output end. According to the invention, the overlapping area of the shading layer and the active area of the thin film transistor is reduced, when the overlapping area of the shading layer and the active area is reduced, the capacitance of the thin film transistor is correspondingly reduced, the leakage current of the thin film transistor is increased, the charging efficiency of the pixel electrode is higher, and the brightness of the corresponding sub-pixel area is improved, so that the brightness difference of different sub-pixel areas is balanced, the problem of uneven display of the display panel is solved, and the display effect of the display panel is improved.
Alternatively, referring still to fig. 1 to 4, in a possible embodiment, the data voltage output terminal 5 is connected to the first terminal 31 of the data line 3, and the overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 is reduced along the direction in which the first terminal 31 of the data line 3 is directed to the second terminal 32.
Specifically, in this embodiment, only one data voltage output terminal 5 may be provided, and driving of each thin film transistor 2 is completed by one data voltage output terminal 5, and setting one data voltage output terminal 5 can reduce the setting area of the non-display area NA at the edge of the display panel, so as to realize a narrow frame. In this arrangement, the first ends 31 of the data lines 3 are electrically connected to the data voltage output terminals 5, and the second ends 32 of the data lines 3 are the ends of the data lines 3 on the display panel farthest from the data voltage output terminals 5, wherein the data lines 3 extend from the first ends 31 along the first direction X.
Further, in a direction in which each data line 3 is directed from the first end 31 to the second end 32, an overlapping area of the light shielding layer 8 at each sub-pixel region and the active region 9 of the corresponding thin film transistor 2 is reduced, thereby ensuring that an overlapping area of the active region 9 of the thin film transistor 2 and the light shielding layer 8 of the sub-pixel region farthest from the data voltage output terminal 5 in the first direction X is minimized.
Alternatively, in a possible embodiment, the overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 decreases by a constant difference in a direction parallel to the first direction X and away from the data voltage output terminal 5.
Specifically, in the embodiment of the present invention, along the direction parallel to the first direction X and away from the data voltage output terminal 5, the overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 may be set to decrease by a constant difference, that is, along the direction in which the first end 31 of the data line 3 points to the second end 32, where the overlapping area of the active region 9 and the light shielding layer 8 of each adjacent thin film transistor 2 connected to the same data line 3 decreases by the same magnitude. In this arrangement, the leakage current at each of the thin film transistors 2 arranged in the first direction X is increased at a constant rate, further improving the uniformity of the display luminance of each of the sub-pixel regions arranged in the first direction X.
Alternatively, the embodiment of the present invention is not limited to a specific manner of reducing the overlapping area of the active region 9 and the light shielding layer 8 of the thin film transistor 2, and those skilled in the art may set the embodiment according to actual requirements.
For example, referring still to fig. 1 to 4, in one possible embodiment, the area of the light shielding layer 8 may be reduced in a direction parallel to the first direction X and away from the data voltage output terminal 5.
Specifically, as shown in fig. 1 to 4, in the present embodiment, the overlapping area of the light shielding layer 8 and the active region 9 of each thin film transistor 2 can be adjusted by changing the area of the light shielding layer 8 corresponding to each thin film transistor 2. That is, the arrangement area of the light shielding layer 8 corresponding to each thin film transistor 2 can be reduced along the direction in which the first end 31 of the data line 3 points to the second end 32. The advantage of this arrangement is that the adjustment of the overlapping area of the active region 9 and the light shielding layer 8 can be realized by adjusting the arrangement area of the light shielding layer 8 without changing the arrangement area of the active region 9 of each thin film transistor 2, thereby reducing the manufacturing difficulty of the display panel and improving the manufacturing efficiency.
Of course, in the practical application process, a person skilled in the art may select other possible designs for reducing the overlapping area of the active area 9 and the light shielding layer 8 of the thin film transistor 2 according to the practical situation, for example, adjust the area size of the active area 9 of each thin film transistor 2, adjust the misalignment between the light shielding layer 8 and the active area 9, or adjust the relative area ratio of the light shielding layer 8 and the active area 9 of the thin film transistor 2, etc., and any method capable of reducing the overlapping area of the light shielding layer 8 and the active area 9 of the thin film transistor 2 in the direction of pointing the first end 31 to the second end 32 of the data line 3 is within the scope of the technical solution protected in the embodiment of the present invention.
Accordingly, in one possible embodiment, the area of the light shielding layer 8 may be set to decrease by a constant difference in a direction parallel to the first direction X and away from the data voltage output terminal 5.
Specifically, when the overlapping area of the active regions 9 of the thin film transistors 2 in the light shielding layer 8 is adjusted by changing the area of the light shielding layer 8 corresponding to each thin film transistor 2, the area of the light shielding layer 8 corresponding to each thin film transistor 2 arranged along the direction of the first end 31 of the data line 3 toward the second end 32 can be reduced by a constant difference, and the effect of improving the uniformity of brightness in different areas of the display panel can be improved.
Alternatively, fig. 5 is a schematic view of a partially enlarged structure of a display panel according to an embodiment of the present invention, fig. 6 is a schematic view of a partially enlarged structure of another display panel according to an embodiment of the present invention, referring to fig. 5 and 6, in a possible embodiment, the thin film transistor 2 is a double gate transistor, the active region 9 of the thin film transistor 2 includes a first active region 91 and a second active region 92, the light shielding layer 8 includes a first light shielding region 81 and a second light shielding region 82, the first light shielding region 81 covers the first active region 91, the second light shielding region 82 covers at least a portion of the second active region 92, and the area of the second light shielding region 82 decreases along a direction parallel to the first direction X and away from the data voltage output terminal 5.
In this embodiment, the thin film transistor 2 may be configured as a double-gate transistor, which can reduce parasitic parameters of the thin film transistor 2 and increase the cut-off frequency of the thin film transistor 2. The double-gate transistor is grounded mainly through the second gate, so that an effective electrostatic shielding effect is achieved between the first gate and the drain, feedback capacitance between the gate and the drain of the thin film transistor 2 is greatly reduced, and cut-off frequency is improved.
Specifically, as shown in fig. 5 and 6, when the thin film transistor 2 is a double gate transistor, the active region 9 of the thin film transistor 2 includes a first active region 91 and a second active region 92, and the positions where the first active region 91 and the second active region 92 overlap the scanning line 4 correspond to the first gate and the second gate of the thin film transistor 2. Correspondingly, the light shielding layer 8 may also include a first light shielding region 81 and a second light shielding region 82, where the first light shielding region 81 covers the first active region 91, that is, a vertical projection of the first active region 91 on the light shielding layer 8 is located in the first light shielding region 81; at the same time, the second light-shielding region 82 covers at least part of the second active region 92, i.e. the vertical projection of the second active region 92 onto the light-shielding layer 8 at least partially overlaps the second light-shielding region 82.
Further, in the present embodiment, the areas of the first light shielding regions 81 of the thin film transistors 2 may be set to be the same, and the overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 may be adjusted by adjusting the area of the second light shielding region 82. Specifically, in a direction parallel to the first direction X and away from the data voltage output terminal 5, the area of the second light shielding region 82 may be reduced, thereby reducing an overlapping area of the second light shielding region 81 and the second active region 92 vertically projected on the first substrate in the extending direction of the data line 3. In a direction parallel to the first direction X and away from the data voltage output terminal 5, the thin film transistor 2 shown in fig. 5 is closer to the data voltage output terminal 5, and the area of the second light shielding region 82 is larger; the thin film transistor 2 shown in fig. 6 is farther from the data voltage output terminal 5, and the area of the second light shielding region 82 is smaller.
Alternatively, the above embodiment is described by taking the example that each of the thin film transistors 2 is driven by the same data voltage output terminal 5, and in other possible embodiments, each of the thin film transistors 2 may be driven and controlled by different data voltage output terminals 5.
Fig. 7 is a schematic structural diagram of another display panel according to an embodiment of the present invention, referring to fig. 7, the data voltage output terminal 5 may include a first data voltage output terminal 51 and a second data voltage output terminal 52, the first data voltage output terminal 51 is connected to the first end 31 of the data line 3, the second data voltage output terminal 52 is connected to the second end 32 of the data line 3, and the overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 is reduced along the direction of the center of the two ends of the data line 3.
Specifically, as shown in fig. 7, in the present embodiment, the data voltage output terminal 5 may include a first data voltage output terminal 51 and a second data voltage output terminal 52, where the first data voltage output terminal 51 is connected to the first terminal 31 of the data line 3, and the second data voltage output terminal 52 is connected to the second terminal 32 of the data line 3. The first data voltage output terminal 51 transmits a first data signal to each of the thin film transistors 2 through the data line 3, the second data voltage output terminal 52 transmits a second data signal to each of the thin film transistors 2 through the data line 3, and each of the thin film transistors 2 connected to the same data line 3 receives the first data signal and the second data signal provided by the first data voltage output terminal 51 and the second data voltage output terminal 52 at the same time, and further transmits the first data signal and the second data signal to the pixel electrode 1 to charge the pixel electrode 1.
At this time, the thin film transistor 2 located at the center of the display panel is far from the first data voltage output terminal 51 and the second data voltage output terminal 52 along the first direction X, the voltage drop of the first data signal and the data signal when transmitted to the thin film transistor 2 at the center is large, and the voltage of the data signal received by the pixel electrode 1 connected to the thin film transistor 2 is small, which may affect the display brightness. Therefore, in this embodiment, along the direction in which both ends of the data line 3 are directed toward the center, the overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 may be reduced, that is, the overlapping area of the active region 9 of the thin film transistor 2 closest to both ends of the data line 3 and its corresponding light shielding layer 8 is the largest, and the overlapping area of the active region 9 of the thin film transistor 2 located at the center of the data line 3 and its corresponding light shielding layer 8 is the smallest. And further, the brightness difference of the sub-pixel area at the center of the display panel due to the voltage drop problem is balanced, so that the display uniformity of the display panel is ensured.
In this embodiment, two data voltage output terminals 5 are provided, and the two data voltage output terminals 5 charge each pixel electrode 1 together, so as to avoid the problem of increasing voltage drop when the data signal is transmitted by the longer data line 3; by combining the design of the overlapping area of the active region 9 and the shading layer 8 of the thin film transistor 2, the display brightness of the whole display panel can be kept consistent to a large extent, and the display effect of the display panel is improved.
Optionally, fig. 8 is a schematic structural diagram of another display panel provided in an embodiment of the present invention, and fig. 9 is an enlarged structural diagram of fig. 8 at E, as shown in fig. 8 and fig. 9, in a possible embodiment, the display area AA may include a plurality of data lines 3 with different lengths; in a direction parallel to the second direction Y, an overlapping area of the light shielding layer 8 and the active region 9 of the first thin film transistor 21 is smaller than an overlapping area of the light shielding layer 8 and the active region 9 of the second thin film transistor 22; the first thin film transistor 21 is connected to the first data line 33, the second thin film transistor 22 is connected to the second data line 34, and the length of the first data line 33 is longer than the length of the second data line 34.
Specifically, in this embodiment, the display panel may be a special-shaped display panel. In the special-shaped display panel, the display area AA may include a plurality of data lines 3 having different lengths. The length of each data line 3 in the display area AA is also adjusted according to the specific shape of the display panel. The display panel shown in fig. 8 and 9 is circular, and the display area AA is correspondingly circular, and the lengths of the data lines 3 arranged in the second direction Y should be increased and then decreased, and when the display panel is of other shapes, the lengths of the data lines 3 are different. Taking a circular display panel as an example, along the second direction Y, the length of the data line 3 located at the center D of the circular display area AA is longest, and the closer to the edge of the display area AA, the smaller the length of the data line 3.
In this embodiment, along the direction parallel to the second direction Y, the overlapping area of the light shielding layer 8 and the active region 9 of the first thin film transistor 21 may be set smaller than the overlapping area of the light shielding layer 8 and the active region 9 of the second thin film transistor 22. The first thin film transistor 21 is connected to the first data line 33, the second thin film transistor 22 is connected to the second data line 34, and the length of the first data line 33 is longer than that of the second data line 34.
It will be appreciated that the different lengths of the data lines 3 cause different impedances of the data lines 3, and that when the data signals are transmitted from the data voltage output terminals 5 to the pixel electrodes 1 arranged along the second direction Y, the voltage levels of the data signals may be different, so that the light emitting brightness of the sub-pixel regions arranged along the second direction Y may be different. The longer the data line 3 is, the larger the impedance on the data line 3 is, the higher the charging efficiency of the pixel electrode 1 connected on the data line 3 is, and the light-emitting brightness of the sub-pixel area is larger; the shorter the length of the data line 3, the smaller the impedance on the data line 3, the lower the charging efficiency of the pixel electrode 1 connected to the data line 3, and the lower the luminance of the sub-pixel region.
In the present embodiment, in the thin film transistor 2 disposed in the adjacent two sub-pixel regions along the second direction Y, the overlapping area of the active region 9 of the first thin film transistor 21 connected to the longer first data line 33 and the light shielding layer 8 is smaller than the overlapping area of the active region 9 of the second thin film transistor 22 connected to the shorter second data line 34 and the light shielding layer 8. By reducing the overlapping area of the active region 9 of the first thin film transistor 21 and the light shielding layer 8 connected with the longer first data line 33, the leakage current at the first thin film transistor 21 is increased, so that the larger impedance on the first data line 33 is balanced, the uniformity of the light emitting brightness of each sub-pixel area is improved, and the display effect of the display panel is improved.
Fig. 10 is a schematic view of a partial enlarged structure of a display panel according to an embodiment of the present invention, where fig. 10 (a) corresponds to a region A1 in fig. 8, fig. 10 (b) corresponds to a region A2 in fig. 8, fig. 10 (c) corresponds to a region D of fig. 8, fig. 10 (D) corresponds to a region A3 in fig. 8, and fig. 10 (e) corresponds to a region A4 in fig. 8. In fig. 10, the thin film transistors in each region are illustrated as double gate transistors, and in order to clearly illustrate the arrangement of the light shielding layer 8 and the active region 9 of the thin film transistor, the entire structure is not shown in fig. 10, and only a part of the structure is shown. Referring to fig. 8 and 10, the lengths of the data lines 3 corresponding to the region A1, the center D, and the region A4 are longest, and the lengths of the data lines 3 corresponding to the regions A2 and A3 are shorter, so that the overlapping area of the second light-shielding region 82 at the center D and the second active region 92 of the corresponding thin film transistor may be made smaller than the overlapping area of the second light-shielding region 82 at the regions A2 and A3 and the second active region 92 of the corresponding thin film transistor along the second direction Y; meanwhile, the distances between the region A4, the center D and the region A1 and the data voltage output terminal 5 are gradually increased along the first direction X, so that the overlapping area of the second light shielding region 82 at the positions of the region A4, the center D and the region A1 and the corresponding second active region 92 of the thin film transistor is reduced, thereby balancing the brightness difference of each sub-pixel region of the display panel.
Alternatively, and still referring to fig. 8, in one possible embodiment, the shape of the display area AA includes a circle or oval. The arrangement mode of the active area and the shading layer of the thin film transistor is suitable for a display panel with a circular or oval display area AA. The application fields of the round or oval display panel are more, such as an intelligent watch, a vehicle-mounted display device and the like, and when the display panel is of other special-shaped structures, the arrangement modes of the active area and the shading layer of the thin film transistor corresponding to each data line can be correspondingly adjusted so as to ensure the display uniformity of the display panel.
Optionally, fig. 11 is a schematic cross-sectional structure of a display panel according to an embodiment of the present invention, as shown in fig. 11, in a possible embodiment, the display panel may further include a second substrate 10 disposed opposite to the first substrate 7, and a liquid crystal layer 11 disposed between the first substrate 7 and the second substrate 10; the backlight module 12 is located at one side of the first substrate 7 away from the second substrate 10.
Specifically, in this embodiment, the display panel may be a liquid crystal display panel, and the display panel further includes a second substrate 10 disposed opposite to the first substrate 7, where the second substrate 10 may be a color film substrate, and a liquid crystal layer 11 is disposed between the first substrate 7 and the second substrate 10. The display panel may further include a common electrode (not shown in the drawing), the common electrode receiving a common electrode signal, and the data voltage output terminal providing a driving signal to the pixel electrode 1, an electric field being formed between the pixel electrode 1 and the common electrode, driving the liquid crystal in the liquid crystal layer 11 to be turned over, thereby realizing normal display.
The display panel further comprises a backlight module 12, and the backlight module 12 is disposed on a side of the first substrate 7 away from the second substrate 10. Since the liquid crystal cannot emit light, the backlight module 12 needs to be disposed, and the light emitted by the backlight module 12 is emitted from the light emitting surface of the second substrate 10 after passing through the light shielding layer 8, the first substrate 7 and the liquid crystal layer 11.
Other film layers can be further included in the display panel, and those skilled in the art can set other film layers in the display panel according to actual requirements, which are not described herein.
Alternatively, fig. 12 is a schematic view of a partially enlarged structure of a further display panel according to an embodiment of the present invention, and fig. 13 is a schematic view of a partially enlarged structure of a further display panel according to an embodiment of the present invention, and referring to fig. 12 and fig. 13, in some possible embodiments, a projection shape of a light shielding layer 8 on a first substrate 7, which is different from an overlapping area of an active region 9 of a thin film transistor 2, may be provided.
Specifically, in the present embodiment, the overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 can be adjusted by changing the projected shape of the light shielding layer 8 overlapping the active region 9 of each thin film transistor 2 on the first substrate 7. For convenience of description, the projection shape of the light shielding layer 8 on the first substrate 7 is hereinafter referred to as the shape of the light shielding layer 8.
As shown in fig. 12, for example, in each of the thin film transistors 2 connected to the same data line 3, the light shielding layer 8 corresponding to the active region 9 of the thin film transistor 2 having a shorter distance from the data voltage output terminal 5 may be shaped as a rectangle having a length and a width d1 and d2, respectively; the light shielding layer 8 corresponding to the active region 9 of the thin film transistor 2 farther from the data voltage output terminal 5 may be provided in a diamond shape having two diagonal lengths d1 and d2, respectively, thereby achieving a reduction in overlapping area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 in a direction parallel to the first direction X and away from the data voltage output terminal.
As illustrated in fig. 13, the light shielding layer 8 corresponding to the active region 9 of the first thin film transistor 21 connected to the longer first data line 33 may be provided in a shape of a diamond having two diagonal lengths d1 and d2, respectively, along the second direction Y; the light shielding layer 8 corresponding to the active region 9 of the second thin film transistor 22 connected to the shorter second data line 34 has an elliptical shape with major and minor axes d1 and d2, respectively, thereby realizing that an overlapping area of the light shielding layer 8 and the active region 9 of the first thin film transistor 21 is smaller than an overlapping area of the light shielding layer 8 and the active region 9 of the second thin film transistor 22 in a direction parallel to the second direction Y.
The shape of the light shielding layer 8 is only an optional setting manner, and in the practical application process, a person skilled in the art can adjust the shape of the light shielding layer 8 overlapped with the thin film transistor 2 according to practical requirements, and any specific manner of adjusting the overlapped area of the light shielding layer 8 and the active region 9 of the thin film transistor 2 by changing the shape of the light shielding layer 8 is within the scope of the technical solution protected by the embodiment of the present invention.
Based on the same inventive concept, the embodiment of the invention also provides a display device. Fig. 14 is a schematic structural diagram of a display device according to an embodiment of the present invention, and as shown in fig. 14, the display device includes a display panel 100 according to any embodiment of the present invention, so that the display device according to the embodiment of the present invention has the corresponding beneficial effects of the display panel 100 according to the embodiment of the present invention, which are not described herein again.
Fig. 15 is a schematic structural diagram of another display device according to an embodiment of the present invention, as shown in fig. 15, and in a possible embodiment, the display device is a vehicle-mounted display device. The vehicle-mounted display device is generally in a special-shaped structure, such as a circular shape or an oval shape. The display panel 100 in the application is utilized to manufacture the vehicle-mounted display device, so that the problem of uneven display of the existing vehicle-mounted display device can be better improved, and the display effect of the vehicle-mounted display device is improved.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, and that various obvious changes, rearrangements, combinations, and substitutions can be made by those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.
Claims (13)
1. A display panel comprising a display region and a non-display region surrounding the display region;
the display area comprises a plurality of pixel electrodes, a plurality of thin film transistors, a plurality of data lines and a plurality of scanning lines, wherein the pixel electrodes are arranged in an array mode, the data lines extend along a first direction, the scanning lines extend along a second direction, and the first direction and the second direction are intersected;
first ends of a plurality of the thin film transistors arranged along the first direction are connected with the same data line, and second ends of the thin film transistors are connected with the pixel electrode;
the control ends of the thin film transistors arranged along the second direction are connected with the same scanning line;
the non-display area comprises a data voltage output end and a scanning voltage output end, the data voltage output end is connected with the data line, and the scanning voltage output end is connected with the scanning line;
the display panel further comprises a first substrate and a shading layer positioned on one side of the first substrate, the shading layer covers at least part of the active area of the thin film transistor along the direction perpendicular to the first substrate, and the overlapping area of the shading layer and the active area of the thin film transistor is reduced along the direction parallel to the first direction and far away from the data voltage output end.
2. The display panel according to claim 1, wherein an overlapping area of the light shielding layer and the active region of the thin film transistor decreases by a constant difference in a direction parallel to the first direction and away from the data voltage output terminal.
3. The display panel according to claim 1, wherein an area of the light shielding layer decreases in a direction parallel to the first direction and away from the data voltage output terminal.
4. A display panel according to claim 3, wherein the area of the light shielding layer decreases by a constant difference in a direction parallel to the first direction and away from the data voltage output terminal.
5. The display panel according to claim 3, wherein the thin film transistor is a double gate transistor, an active region of the thin film transistor includes a first active region and a second active region, the light shielding layer includes a first light shielding region and a second light shielding region, the first light shielding region covers the first active region, the second light shielding region covers at least a part of the second active region, and an area of the second light shielding region is reduced in a direction parallel to the first direction and away from the data voltage output terminal.
6. The display panel according to claim 1, wherein the data voltage output terminal is connected to the first terminal of the data line, and the overlapping area of the light shielding layer and the active region of the thin film transistor is reduced along the direction in which the first terminal of the data line is directed to the second terminal.
7. The display panel according to claim 1, wherein the data voltage output terminal includes a first data voltage output terminal connected to a first end of the data line and a second data voltage output terminal connected to a second end of the data line, the overlapping area of the light shielding layer and the active region of the thin film transistor is reduced along a direction in which both ends of the data line are directed toward the center.
8. The display panel according to claim 1, wherein the display region includes a plurality of the data lines having different lengths;
an overlapping area of the light shielding layer and the active region of the first thin film transistor is smaller than an overlapping area of the light shielding layer and the active region of the second thin film transistor along a direction parallel to the second direction;
the first thin film transistor is connected with a first data line, the second thin film transistor is connected with a second data line, and the length of the first data line is larger than that of the second data line.
9. The display panel of claim 8, wherein the shape of the display area comprises a circle or an oval.
10. The display panel according to claim 1, further comprising a second substrate disposed opposite to the first substrate and a liquid crystal layer between the first substrate and the second substrate;
the backlight module is positioned at one side of the first substrate far away from the second substrate.
11. The display panel according to claim 1, wherein a projected shape of a light shielding layer on the first substrate is different from an overlapping area of active regions of the thin film transistors.
12. A display device comprising the display panel according to any one of claims 1 to 11.
13. The display device of claim 12, wherein the display device is an in-vehicle display device.
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