CN115039210B - 用于在介电层顶上由下而上间隙填充的选择性沉积钨的方法 - Google Patents

用于在介电层顶上由下而上间隙填充的选择性沉积钨的方法

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Publication number
CN115039210B
CN115039210B CN202180012393.6A CN202180012393A CN115039210B CN 115039210 B CN115039210 B CN 115039210B CN 202180012393 A CN202180012393 A CN 202180012393A CN 115039210 B CN115039210 B CN 115039210B
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CN
China
Prior art keywords
tungsten
atop
thickness
tungsten portion
substrate
Prior art date
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Active
Application number
CN202180012393.6A
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English (en)
Chinese (zh)
Other versions
CN115039210A (zh
Inventor
雷伟
徐翼
雷雨
河泰泓
雷蒙德·洪
希里什语·A·佩特
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Applied Materials Inc
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Applied Materials Inc
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Publication of CN115039210A publication Critical patent/CN115039210A/zh
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Publication of CN115039210B publication Critical patent/CN115039210B/zh
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/44—Physical vapour deposition [PVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
    • H10P14/6314—Formation by oxidation, e.g. oxidation of the substrate of a metallic layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6319—Formation by plasma treatments, e.g. plasma oxidation of the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/267—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Physical Vapour Deposition (AREA)
  • Semiconductor Memories (AREA)
CN202180012393.6A 2020-04-10 2021-04-08 用于在介电层顶上由下而上间隙填充的选择性沉积钨的方法 Active CN115039210B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US16/845,749 US11417568B2 (en) 2020-04-10 2020-04-10 Methods for selective deposition of tungsten atop a dielectric layer for bottom up gapfill
US16/845,749 2020-04-10
PCT/US2021/026446 WO2021207537A1 (en) 2020-04-10 2021-04-08 Methods for selective deposition of tungsten atop a dielectric layer for bottom up gapfill

Publications (2)

Publication Number Publication Date
CN115039210A CN115039210A (zh) 2022-09-09
CN115039210B true CN115039210B (zh) 2026-06-23

Family

ID=78006845

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202180012393.6A Active CN115039210B (zh) 2020-04-10 2021-04-08 用于在介电层顶上由下而上间隙填充的选择性沉积钨的方法

Country Status (6)

Country Link
US (1) US11417568B2 (enExample)
JP (1) JP7704758B2 (enExample)
KR (1) KR20220167369A (enExample)
CN (1) CN115039210B (enExample)
TW (1) TWI868345B (enExample)
WO (1) WO2021207537A1 (enExample)

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US10573522B2 (en) 2016-08-16 2020-02-25 Lam Research Corporation Method for preventing line bending during metal fill process
CN113169056A (zh) 2018-11-19 2021-07-23 朗姆研究公司 用于钨的钼模板
CN116970925A (zh) 2019-01-28 2023-10-31 朗姆研究公司 金属膜的沉积
EP4018471A4 (en) 2019-08-22 2024-01-17 Lam Research Corporation Substantially carbon-free molybdenum-containing and tungsten-containing films in semiconductor device manufacturing
US12334351B2 (en) 2019-09-03 2025-06-17 Lam Research Corporation Molybdenum deposition
US12327762B2 (en) 2019-10-15 2025-06-10 Lam Research Corporation Molybdenum fill
JP7686761B2 (ja) 2021-02-23 2025-06-02 ラム リサーチ コーポレーション ３ｄ－ｎａｎｄ用の酸化物表面上へのモリブデン膜の堆積
JP2024514605A (ja) 2021-04-14 2024-04-02 ラム リサーチ コーポレーション モリブデンの堆積
KR20240008230A (ko) 2021-05-14 2024-01-18 램 리써치 코포레이션 고 선택도 도핑된 하드마스크 막들
US12652972B2 (en) 2022-04-06 2026-06-09 Applied Materials, Inc. Field suppressed metal gapfill
US20250259894A1 (en) * 2022-04-19 2025-08-14 Lam Research Corporation Molybdenum integration and void-free fill
US20230343643A1 (en) * 2022-04-25 2023-10-26 Applied Materials, Inc. Gradient oxidation and etch for pvd metal as bottom liner in bottom up gap fill
KR20250022865A (ko) * 2022-06-22 2025-02-17 어플라이드 머티어리얼스, 인코포레이티드 텅스텐 갭-충전을 위한 텅스텐 표면의 처리
US12559836B2 (en) 2022-07-29 2026-02-24 Applied Materials, Inc. Bottom up molybdenum gapfill
US12588443B2 (en) * 2022-09-27 2026-03-24 Applied Materials Inc. Methods for forming low resistivity contacts
KR20240073394A (ko) * 2022-11-18 2024-05-27 삼성전자주식회사 반도체 장치
US12652980B2 (en) 2023-05-03 2026-06-09 Applied Materials, Inc. Silicon nitride damage-free dry etch method for tungsten removal in middle of line bottom-up tungsten integration
US12685046B2 (en) 2023-06-15 2026-07-14 Applied Materials, Inc. Doped silicon oxide for bottom-up deposition
US12374568B2 (en) * 2023-08-29 2025-07-29 Applied Materials, Inc. One chamber multi-station selective metal removal
US20250259886A1 (en) * 2024-02-12 2025-08-14 Applied Materials, Inc. Methods of manufacturing interconnect structures

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JPH0590204A (ja) * 1991-03-20 1993-04-09 Philips Gloeilampenfab:Nv 半導体デバイスの製造方法
JP2020501344A (ja) * 2016-11-08 2020-01-16 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ パターニング用途のためのボトムアップ柱状体の形状制御

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0590204A (ja) * 1991-03-20 1993-04-09 Philips Gloeilampenfab:Nv 半導体デバイスの製造方法
JP2020501344A (ja) * 2016-11-08 2020-01-16 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ パターニング用途のためのボトムアップ柱状体の形状制御

Also Published As

Publication number Publication date
JP2023520835A (ja) 2023-05-22
JP7704758B2 (ja) 2025-07-08
WO2021207537A1 (en) 2021-10-14
TW202141585A (zh) 2021-11-01
KR20220167369A (ko) 2022-12-20
CN115039210A (zh) 2022-09-09
US11417568B2 (en) 2022-08-16
TWI868345B (zh) 2025-01-01
US20210320034A1 (en) 2021-10-14

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