CN115037415A - Error correction coding method, device and terminal based on CRC - Google Patents

Error correction coding method, device and terminal based on CRC Download PDF

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CN115037415A
CN115037415A CN202210612618.8A CN202210612618A CN115037415A CN 115037415 A CN115037415 A CN 115037415A CN 202210612618 A CN202210612618 A CN 202210612618A CN 115037415 A CN115037415 A CN 115037415A
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CN115037415B (en
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孙谦
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Jiangsu Yixin Aerospace Technology Co ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0061Error detection codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/0001Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0009Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the channel coding
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0061Error detection codes
    • H04L1/0063Single parity check

Abstract

The invention discloses a CRC-based error correction coding method, which comprises the following steps: performing CRC coding on an original information sequence with the length of N to obtain a first coding sequence with the length of N + M; grouping the first coding sequence to obtain one or more first groups with equal length; performing parity check coding on each first packet to obtain a second packet; the second packets are combined in sequence to obtain a second code sequence and sent to the transmission channel. The invention adds parity check and error correction coding on the basis of using CRC coding, so that a receiving end does not need to inform a transmitting end to retransmit but directly corrects the error to obtain correct communication data, thereby improving the reliability and real-time performance of communication, supporting unidirectional communication and reducing the occupation of channel resources.

Description

Error correction coding method, device and terminal based on CRC
Technical Field
The present invention relates to the field of communications, and in particular, to a method, an apparatus, and a terminal for error correction coding based on CRC.
Background
After communication data is transmitted through a communication channel, error codes are generated due to the influence of the channel, and therefore, it is necessary to perform error control by using channel coding. Fig. 1 is a schematic diagram of an error control coded communication system. In the figure, X is the output signal of the source encoder (or encryptor, transcoder, scrambler) and Y is the output signal of the channel decoder. The channel encoder inserts parity symbols (also called check symbols) in the information symbols according to a certain rule, resulting in a sequence X'. After being transmitted through a coding channel, X ' is changed into Y ', and the influence of Y ' during channel transmission can often generate noise and error codes, and a decoder is required to check to determine whether the noise and the error codes exist. Specifically, the channel decoder checks whether the relationship between the information symbols and the parity symbols (also referred to as check symbols) is corrupted, and if so, indicating an error, takes some action to reduce the error rate.
Cyclic Redundancy Check (CRC) is an error control coding and decoding method that uses the principle of polynomial division and its remainder to detect errors. The method comprises the steps of taking a data bit sequence to be transmitted as a coefficient of an information polynomial u (x), removing an agreed generator polynomial g (x) during transmission to obtain a remainder polynomial v (x), adding the remainder polynomial to the information polynomial, and transmitting to a receiving end, removing a received receiving polynomial r (x) by the receiving end by the generator polynomial g (x), wherein if the received receiving polynomial r (x) can be divided by a whole number, no error code exists, and if the received receiving polynomial cannot be divided by a whole number, error code exists. The CRC realizes the function of error detection by using the principles of division and remainder, and has the advantages of clear principle, simple implementation, and the like.
However, CRC has only a function of detecting an error, and cannot correct the error, so if CRC is used directly, both communication sides need to maintain a duplex link, and as shown in fig. 2, when a receiving side detects an error, the receiving side notifies a transmitting side to perform retransmission, which results in poor real-time performance of communication, and cannot meet the demand of a communication field with a high real-time performance requirement.
Disclosure of Invention
In order to solve the problem that the error control coding and decoding scheme based on the CRC cannot perform real-time error correction, the invention provides a method, a device and a terminal for error correction coding based on the CRC, which can perform error correction processing on a receiving end only by a unidirectional channel without notifying a transmitting end of retransmission, thereby improving the reliability and the real-time performance of communication (the communication principle is shown in fig. 3). The technical scheme is as follows:
in one aspect, the present invention provides a CRC-based error correction coding method, including the steps of:
s101: performing CRC coding on an original information sequence with the length of N to obtain a first coding sequence with the length of N + M, wherein M is the length of a check element sequence;
s102: grouping the first coding sequence to obtain one or more first groups with equal length;
s103: performing parity check coding on each first packet to obtain a second packet;
s104: the second packets are combined in sequence to obtain a second code sequence and sent to the transmission channel.
Further, step S101 further includes:
s1011: acquiring an original information sequence polynomial V (x) according to the original information sequence;
s1012: setting the length M of a check element sequence;
s1013: setting a generator polynomial g (x) according to M, wherein the highest order of the generator polynomial g (x) is equal to M;
s1014: carrying out division calculation on an original information sequence polynomial V (x) and a generating polynomial g (x) to obtain a check element polynomial R (x);
s1015: carrying out addition calculation on the check element polynomial R (x) and the original information sequence polynomial V (x) to obtain a coding polynomial A (x);
s1016: obtaining a first coding sequence a with the length of N + M according to the coding polynomial A (x).
Further, the original information sequence polynomial v (x) is as follows:
Figure BDA0003673398110000021
where N is the length of the original information sequence, v i Is the coefficient of the ith bit in the polynomial V (x) of the original information sequence, corresponding to the coded value of the ith bit of the original information sequence.
Further, the check element polynomial r (x) is calculated by:
Figure BDA0003673398110000022
wherein the polynomial p (x) is a portion of the original information sequence polynomial v (x) divided by the generator polynomial g (x).
Further, the calculation method of the coding polynomial a (x) is:
Figure BDA0003673398110000023
wherein the coding polynomial A (x) is a polynomial which can be divided by the generator polynomial g (x), a i Is the coefficient of the ith bit in the coding polynomial a (x).
Further, step S1016 includes: will encode the coefficient a of the polynomial A (x) i Obtaining a first coding sequence a in sequence, wherein the first coding sequence a is an original information sequence [ v 0 v 1 ...v N-1 ]And check element sequence [ r ] 0 r 1 ...r M-1 ]As follows:
a=[v 0 v 1 ...v N-1 r 0 r 1 ...r M-1 ]=[a 0 a 1 ...a N+M-1 ],
wherein, the check element sequence [ r 0 r 1 ...r M-1 ]The coefficients of the check element polynomial R (x) are arranged in sequence.
Further, step S102 includes:
the length of each first packet is Q, and the number of groups H of the first packets is:
Figure BDA0003673398110000031
when the last group is not enough to Q bit, zero filling is carried out, and the number of zero filling is as follows:
c(0)=H*Q-N-M。
further, the generator matrix of parity check coding is:
Figure BDA0003673398110000032
where a is the identity matrix Q x Q and B is the full 1 column vector of length Q.
In another aspect, the present invention provides an apparatus for error correction coding based on CRC, comprising: the CRC encoding module, the code grouping module, the parity check encoding module and the code merging module;
the CRC coding module performs CRC coding on the original information sequence and converts the original information sequence into a first coding sequence;
the coding grouping module groups the first coding sequence to obtain one to more first groups with the length of Q, and when the length of the last first group is smaller than Q, zero padding is carried out at the tail to enable the length of the last first group to be equal to Q, wherein Q is a positive integer;
the parity check coding module carries out parity check coding on each first packet and converts the first packet into a second packet, wherein the length of the second packet is 1 bit more than that of the first packet;
the code combining module combines the second packets and converts the combined packets into a second code sequence, and the second code sequence is a code sequence finally sent into the communication channel.
In still another aspect, the present invention provides a terminal including the above apparatus for error correction coding based on CRC.
The invention has the beneficial effects that: by using the scheme of the invention, on the basis of using CRC coding, parity check and error correction coding are added, so that the receiving end does not need to inform the transmitting end to retransmit but directly carries out error correction to obtain correct communication data, thereby improving the reliability and real-time performance of communication, supporting unidirectional communication and reducing the occupation of channel resources.
Drawings
FIG. 1 is a schematic diagram of a communication system with error control;
FIG. 2 is a schematic diagram of the error control method with error detection only;
FIG. 3 is a schematic diagram of an error control method with error correction;
FIG. 4 is a flowchart of an embodiment of a method for CRC-based error correction coding according to the present invention;
FIG. 4a is a sub-flowchart of FIG. 4;
FIG. 5 is a flowchart of an embodiment of a method for CRC-based error correction decoding according to the present invention;
FIG. 6 is a sub-flowchart of FIG. 5;
FIG. 7 is a diagram illustrating an embodiment of an apparatus for CRC-based error correction coding according to the present invention;
FIG. 8 is a block diagram illustrating an apparatus for CRC-based error correction decoding according to an embodiment of the present invention;
Detailed Description
In order to facilitate an understanding of the invention, reference will now be made in detail to the present embodiments of the invention, examples of which are illustrated in the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It is to be noted that, unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
As shown in fig. 3, the scheme provided by the present invention can implement error control of unidirectional communication, and when detecting an error, the receiving end does not need to notify the transmitting end to perform retransmission, but directly performs error correction to obtain correct communication data.
Example one
As shown in fig. 4, in one aspect, the present invention provides a CRC-based error correction coding method, which adds parity check and error correction coding on the basis of using CRC coding, so that a receiving end does not need to notify a transmitting end to perform retransmission, and performs error correction directly to obtain correct communication data, thereby improving reliability and real-time performance of communication, supporting unidirectional communication, and reducing occupation of channel resources.
The method comprises the following steps:
s101: performing CRC coding on an original information sequence with the length of N to obtain a first coding sequence with the length of N + M, wherein M is the length of a check element sequence;
s102: grouping the first coding sequence to obtain one or more first groups with equal length;
s103: performing parity check coding on each first packet to obtain a second packet;
s104: the second packets are combined in sequence to obtain a second code sequence and sent to the transmission channel.
Further, referring to fig. 4a, step S101 includes:
s1011: acquiring an original information sequence polynomial according to the original information sequence;
s1012: setting the length M of the check element sequence;
s1013: setting a generator polynomial according to the M, wherein the highest order of the generator polynomial is equal to the M;
s1014: carrying out division calculation on the original information sequence polynomial and the generating polynomial to obtain a check element polynomial;
s1015: performing addition calculation on the check element polynomial and the original information sequence polynomial to obtain a coding polynomial;
s1016: and obtaining a first coding sequence with the length of N + M according to the coding polynomial.
Specifically, for step S1011: each bit in the original information sequence v to be transmitted takes a value of 0 or 1, and different original information sequences v will include different information bits, which is embodied in the form of 1001 … 11. When the original information sequence v has a length N, the original information sequence v can be represented by an original information polynomial v (x) in a Galois field (Galois Dield, GF (2)):
Figure BDA0003673398110000051
specifically, the coded value of each bit in the original information sequence v is sequentially assigned to the coefficients of the original information polynomial v (x).
The following examples of three polynomials are provided, taking N ═ 7 as an example:
original information sequence v ═ (1001110), and its corresponding original messageThe polynomial is: x is a radical of a fluorine atom 6 +x 3 +x 2 +x 1
The original information sequence v ═ (1001111), where the corresponding original information polynomial is: x is the number of 6 +x 3 +x 2 +x 1 +1;
The original information sequence v is (0001111), and the corresponding original information polynomial is: x is the number of 3 +x 2 +x 1 +1;
Specifically, for step S1012: setting the length M of the check symbol sequence, where the value of M is generally an integer, such as 8 bits, 16 bits, 24 bits, 32 bits, etc., preferably, M < N, where N is the length of the original information sequence v.
For step S1013: and generating a polynomial g (x) according to the M setting, wherein the highest order of the polynomial g (x) is equal to M. For example, when M ═ 16, then its generator polynomial may be:
g(x)=x 16 +x 12 +x 5 +x 0
for step S1014: the check polynomial r (x) is a remainder obtained by dividing the original information polynomial v (x) by the generator polynomial g (x), and is expressed as:
Figure BDA0003673398110000052
wherein the polynomial p (x) is a portion of the original information sequence polynomial v (x) divided by the generator polynomial g (x).
For step S1015: the coding polynomial a (x) is shown below:
Figure BDA0003673398110000053
wherein the coding polynomial A (x) is a polynomial which can be divided by the generator polynomial g (x), a i Is the coefficient of the ith bit in the polynomial encoding polynomial a (x).
By the above calculation, it is ensured that the coding polynomial a (x) is divisible by the generator polynomial g (x). In practice, when the decoding end decodes the coding polynomial, it is removed using the same generator polynomial g (x) as the encoding end, theoretically indicating that the information was received without errors if it could be divided exactly.
For step S1016: and obtaining a first coding sequence a with the length of N + M according to the coding polynomial.
Specifically, the coefficient a of the polynomial A (x) i The first code sequence a is assigned with values in sequence.
Further, the first coding sequence a is a combination of the original information sequence v and the check meta sequence r, and is expressed as:
a=[v 0 v 1 ...v N-1 r 0 r 1 ...r M-1 ]=[a 0 a 1 ...a N+M-1 ]
therefore, the length of the first code sequence a is N + M. In practice, the first coding sequence a is a syndrome sequence r which is added with M bits after the original information sequence v, wherein the syndrome sequence r is derived from the coefficients of the syndrome polynomial r (x).
Further, step S102 includes:
grouping first coded sequences a with the length of N + M to obtain first groups, wherein the length of each first group is Q, and setting the length as Q
Figure BDA0003673398110000064
For the rounding-up operation, the total number of groups H obtained is:
Figure BDA0003673398110000061
further, when the last group is not enough for Q bits, zero padding is performed, and the number of zero padding is as follows:
c(0)=H*Q-N-M
the zero-padded data is a zero-padded sequence b, the total length is H × Q, and the packet index is H, then the zero-padded sequence b can be represented as:
b=[a 0 a 1 ...a N+M-1 0...0]=[b 1 b h ...b H ]
b h =[b (h-1)*Q ...b h*Q-1 ]
wherein, b h For the first packet, the zero padding sequence b accordingly contains H first packets b h
Further, step S103 includes:
for the first packet b h And parity encoding is performed to obtain a second packet. The generator matrix used is:
Figure BDA0003673398110000062
where a is the identity matrix Q x Q and B is the full 1 column vector of length Q. For example, when Q is 4, the generator matrix is:
Figure BDA0003673398110000063
further, the second packet obtained after parity encoding is:
c h =b h ·G=[b (h-1)*Q ...b h*Q-1 ]·G=[c (h-1)*(Q+1) ...c h*(Q+1)-1 ],
h=1,2,...,H
wherein the second packet c h Is of length Q +1, a total of H second packets c are obtained h
Further, step S104 includes:
h second packets c obtained above h The second coding sequence c is obtained by sequential combination, as follows:
c=c 1 c 2 ...c H
the second code sequence c is fed into the transmission channel.
Example two
On the other hand, referring to fig. 5 and 6, the present invention provides a CRC-based error correction decoding method, which adds parity check and error correction decoding on the basis of error detection by using CRC, so that the receiving end does not need to notify the transmitting end to perform retransmission but directly performs error correction to obtain correct communication data, thereby improving reliability and real-time performance of communication, supporting unidirectional communication, and reducing occupation of channel resources.
In particular, with reference to fig. 5, the method comprises the following steps:
s201: generating a check pattern F;
s202: performing block parity check decoding on the received original bit sequence D to obtain a first check result D and a first decoding sequence e;
s203: performing CRC on the first decoding sequence e to obtain a second check result delta R (x); judging the second check result delta R (x): if the second check result Δ r (x) is zero, it indicates no error in transmission, go to step S204, and if the second check result Δ r (x) is not zero, it indicates an error in transmission, go to step S205;
s204: extracting a first original information sequence v' in a first decoding sequence e;
s205: and carrying out error correction processing on the first decoding sequence e according to the check pattern F to obtain a second original information sequence v' after error correction.
Further, step S201 includes:
at the receiving end, a plurality of groups of check patterns F can be generated by pre-calculation, and each group of check patterns has a length of M. Wherein, the check pattern is a local sequence sample used for error control at the receiving end in the communication field. The check pattern is generated in advance, so that the time for real-time data processing can be saved, and the data processing efficiency is improved. Furthermore, the check pattern can be generated in real time, so that the decoding of sequences with different lengths can be more flexibly adapted, and meanwhile, the storage space is saved, and the method is suitable for scenes with smaller storage space because a large number of check patterns do not need to be generated.
Furthermore, the number of groups of the check pattern F is M + P (P is greater than or equal to N), M and P are positive integers, P is greater than or equal to N, the length of each group is M, where N is the length of the original bit sequence, and the check pattern F includes two parts, namely a CRC check element and information data. Corresponding check pattern polynomial F k (x) Comprises the following steps:
Figure BDA0003673398110000071
wherein
Figure BDA0003673398110000072
Corresponding to CRC check element part, R k-M (x)-R 0 (x) In correspondence with the information data portion(s),
Figure BDA0003673398110000073
is a polynomial
Figure BDA0003673398110000074
The coefficient of the ith bit is also the ith bit of the CRC check element sequence.
Further, the CRC check element part of the check pattern F is generated as follows:
the pattern of the CRC check element part is essentially an error pattern corresponding to each bit of the M CRC check element information sequences when errors occur independently, so that M groups are total. For each group f k (k-1, …, M), the corresponding bit sequence is M-k +1 th bit 1, and the other bits are all zeros, so the set of all groups is a diagonal matrix f with a diagonal of 1:
Figure BDA0003673398110000081
correspondingly, the polynomial corresponding to the check pattern of the CRC check element part is:
Figure BDA0003673398110000082
further, the information data portion R of the check pattern F k-M (x)-R 0 (x) The generation method comprises the following steps:
the information data used for generating the check pattern is u, and has P +1 groups, the bit width of each group is P, all the groups are put together to form an information data matrix with P +1 rows and P columns:
Figure BDA0003673398110000083
wherein the nth group of information data
Figure BDA0003673398110000084
Is the n +1 th row in the information data matrix U, the first row
Figure BDA0003673398110000085
The values in each column are 0, which represents no error condition. Accordingly, the nth group of information data
Figure BDA0003673398110000086
The polynomial in the galois field GF (2) domain is:
Figure BDA0003673398110000087
calculate U n (x) With remainder R of generator polynomial g (x) n (x) The generator polynomial g (x) is the same as the generator polynomial g (x) used for the transmitting-end encoding in the first embodiment. The specific calculation method is as follows:
Figure BDA0003673398110000088
the remainder formula R is obtained by the above process n (x) Comprises the following steps:
Figure BDA0003673398110000089
wherein R is 0 (x) The residue obtained when u is all zero, namely the corresponding residue when no error occurs in the information data part representing the transmission process. The other residue formulas obtained in the above steps are respectively reacted with R in GF (2) domain 0 (x) Performing polynomial subtraction to obtain informationThe check pattern polynomial for the data portion is:
F n+M (x)=R k (x)-R 0 (x),n=1,2,...,P
the essence is the difference between the residual equation corresponding to each bit error of the information data and the residual equation corresponding to the error-free state. Thus, each set of the verification patterns F k (x) All correspond to the information data one by one according to a certain sequence.
Therefore, combining the contents of the above CRC check element and information data, the complete check pattern polynomial F k (x) Comprises the following steps:
Figure BDA0003673398110000091
further, step S202 includes:
the original bit sequence received by the receiving end is d, correspondingly, d is an observation sequence of the second coding sequence c sent by the sending end, and the original bit sequence d is grouped to obtain a third group d h As follows:
d=[d 1 d 2 ...d h ...d H ]
to d h Performing grouped parity check decoding, wherein a check matrix G' of Q +1 rows and Q +1 columns is as follows:
Figure BDA0003673398110000092
the check matrix G' corresponds to the transmitter G one to one.
Let a third group d h The check result is E h Then, there are:
Figure BDA0003673398110000093
wherein, C is obtained by combining all groups, specifically an information sequence matrix of H rows and Q columns, and if a first decoding sequence obtained after parity check decoding is finished is e, then:
e=[C 1 C 2 ...C H ]=[e 0 e 1 ...e H*Q-1 ]
wherein a packet C in a first decoding sequence e h Is longer than the third packet d in the received bit sequence d h Is one bit less because the parity bits are eliminated.
If the first check result obtained after the parity check decoding is finished is D, then:
D=[D 1 D 2 ...D H ]=[d 0 d 1 ...d H-1 ]
wherein the first check result D is a vector of length H.
Further, step S203 includes:
for the parity-check decoded first decoded sequence e, whose length is Q × H, the first original information sequence v 'and the original syndrome sequence r' contained therein are:
v′=[e 0 e 1 ...e N-1 ]
r′=[e N e N+1 ...e N+M-1 ]
correspondingly, the original information polynomial and the original check-element polynomial on the GF (2) field are v (x) and r (x), respectively.
The check polynomial of the first original information sequence v' is calculated by dividing the original information polynomial v (x) by g (x) to obtain a residue R (x "), i.e., a check polynomial R (x), as shown below:
Figure BDA0003673398110000101
subtracting the obtained syndrome polynomial R ″ (x) from the original syndrome polynomial R' (x) to obtain a second check result Δ R (x), as follows:
Figure BDA0003673398110000102
wherein, Δ r i Is a polynomial
Figure BDA0003673398110000103
The ith coefficient of (1).
Judging the second check result Δ r (x), and jumping to step S204 when the second check result Δ r (x) is zero, indicating no error in transmission; when the second check result Δ r (x) is not zero, indicating that there is an error in transmission, the process goes to step S205.
Further, referring to fig. 6, step S205 further includes:
s2051: determining the sequence number of the error packet according to the first check result D;
s2052: determining the error bit in the group of the error packet according to the check pattern F and the second check result delta R (x);
s2053: inverting the error bit to obtain a corrected second decoding sequence;
s2054: the second original information sequence v "in the second decoded sequence is extracted.
Specifically, step S2051 includes:
the error correction process determines the error code word group according to the first check result D obtained during the parity check decoding. Let the set of error groups be T, as follows:
T={t|D(t)=1},
the sequence number of the erroneous packet, i.e. the bit with a value of 1 in the first check result D, is obtained, and correspondingly t is the group number of the erroneous packet.
Step S2052 includes:
let the number of T elements be J, T j Represents the jth erroneous packet, z j Indicating the errored bit in the jth errored packet.
After determining which packets are in error, the check pattern corresponding to each bit may be traversed within the particular packet. As can be seen from the generation principle of the check pattern F, each set of check patterns corresponds to information data one to one, and this correspondence can be converted into a function represented by an error packet and an error bit. When t is j When a packet is in error, traverseTo the z-th in the erroneous packet j When the bit is one, the corresponding check pattern group is as follows:
k=N+M-Q*t j +Q-z j j∈(1,J),z j e (0, Q-1), wherein Q is the aforementioned Q.
The scheme of the invention takes error packets as a large frame, and takes the premise that each error packet has only one bit error, a check pattern corresponding to one bit is respectively taken from each error packet, the check patterns are added in a GF (2) field, and when all the bit traversed by each group is just the error bit, the obtained sum is the second check result delta R (x) calculated above.
Then the erroneous packet t can be uniquely determined when the following equation is established j Bit z of the group (b) in error j
Figure BDA0003673398110000111
Wherein Δ R (x) is the second check result, F k (x) Is a check pattern expression.
Step S2053 includes:
record z 1 ,z 2 ,…,z j Is calculated by taking the corresponding error z in the first decoded sequence e j And negating the value of (a) to obtain a corrected second decoded sequence e'.
For example, for the first decoded sequence e, the erroneous bits are respectively
Figure BDA0003673398110000112
After bit negation is carried out on the error correction code, error correction can be completed, and the negation comprises the following steps: if it is 0, it becomes 1, and if it is 1, it becomes 0.
Step S2054 includes:
and extracting a second original information sequence in the second decoding sequence to obtain an original information sequence v after error correction.
Setting the data sequence after error correction as g, and obtaining an information sequence after error correction decoding as the original sequence v of the sending end:
v=[g 0 g 1 ...g N-1 ]
further, as for step S2053 and step S2054, a judgment may be added, and if the error is not the sequence number of the original information sequence but the sequence number of the check meta sequence, the next error bit may be directly processed without processing. This is because the final purpose of decoding is to obtain the original information sequence carrying the communication data, and no inversion operation is required for the check elements. Therefore, the data processing time can be saved, and the performance is further improved.
EXAMPLE III
To more intuitively explain the CRC-based error correction decoding method and encoding method of the present invention, the following is a practical example:
a sending end:
the original information sequence v to be transmitted is 4 bytes of AA (hexadecimal), and the total bit length N is 8 × 4 — 32 bits, and the corresponding original information polynomial is:
Figure BDA0003673398110000113
the CRC check element has a length of M ═ 16 bits, and its generator polynomial is:
g(x)=x 16 +x 12 +x 5 +x 0
the calculated CRC coding polynomial is:
Figure BDA0003673398110000121
wherein R (x) x 12 +x 11 +x 10 +x 9 +x 7 +x 4 +x 2 +1, i.e. the 16-bit CRC check element sequence generated by v is 0001_1110_1001_0101
Thereby obtaining a first coding sequence a:
a=[101010101010101010101010101010100001111010010101]
the first coding sequence a is grouped into 5 bits each Q, so that the number of all groups is increased
Figure BDA0003673398110000122
The number of zero padding is:
c(0)=H*Q-N-M=10*5-32-16=2
parity check coding is performed every 5 bits, and the used generator matrix is:
Figure BDA0003673398110000123
the second packet obtained after parity encoding is:
c h =b h ·G=[b (h-1)*5 …b h*5-1 ]·G=[c (h-1)*6 …c h*6-1 ]h=1,2,…,10
h second packets c obtained above h And combining the sequences to obtain a second coding sequence c which is:
c=[c 1 c 2 ...c 10 ]
the second code sequence c is transmitted to the transmission channel [101011_010100_101011_010100_ 100001_111100_100100_101000 ].
Receiving end:
on the receiving side, a parity pattern with a bit width of M-16 is generated in an M + P-48 set (where P-32 and M-16), and information data U used for generating the parity pattern is a matrix U with 33 rows and 32 columns:
Figure BDA0003673398110000124
obtaining R after CRC check calculation k (x) Wherein
R 0 (x)=0
R 1 (x)=x 12 +x 5 +1
Figure BDA0003673398110000131
R 32 (x)=x 15 +x 14 +x 12 +x 11 +x 10 +x 8 +x 5 +x 4 +x 3
The check pattern is:
F k (x)=R k-16 (x)-R 0 (x)k=17,18,…,48
after the CRC check element part is added, the specific data of the check pattern is as follows:
Figure BDA0003673398110000132
Figure BDA0003673398110000141
the original bit sequence received by the receiving end has 10 groups d, and the original bit sequence d is grouped to obtain a third group d h And, as follows:
d=[d 1 d 2 …d 10 ]
=[001011_110100_101011_010100_101011_010100_100001_011100_100100_101000]to d is paired h Performing block parity check decoding, wherein a check matrix G' is as follows:
Figure BDA0003673398110000142
after the parity check decoding is completed, the obtained first decoding sequence e and the first check result D D are respectively:
e=[00101_11010_10101_01010_10101_01010_10000_01110_10010_10100]
D=[1100000100]
then the corresponding set of error groups T is:
T={t|D(t)=1}={1,2,8}
after e is disassembled, the original information sequence received by the receiving end is
v′=[e 0 e 1 ...e 31 ]=[00101110101010101010101010101010]
The original check element sequence is:
r′=[e 32 e 33 ...e 47 ]=[0000111010010101]
the original syndrome polynomial R' (x) is
R′(x)=x 11 +x 10 +x 9 +x 7 +x 4 +x 2 +1
The check elements obtained by calculating the information sequence v' are as follows:
r″=[0000100101011100]
obtaining a check element polynomial R' (x) as:
R″(x)=x 11 +x 8 +x 6 +x 4 +x 3 +x 2
thus, the difference between the obtained syndrome polynomial R "(x) and the original syndrome polynomial R' (x) in the GF (2) domain is:
ΔR(x)=R″(x)-R′(x)=x 10 +x 9 +x 8 +x 7 +x 6 +x 3 +1
after executing the traversal algorithm, when the values of the variables are as follows:
t 1 =1,t 2 =2,t 3 =8,z 1 =z 2 =z 3 =0,N=32,M=16,Q=5
the following equation may be made:
Figure BDA0003673398110000151
finally obtain z 1 =z 2 =z 3 After 0, then for the first decoded sequence e, the error bit position is: e.g. of the type 0 、e 5 、e 35 Thus the first decoded sequence e is outputAnd (3) inverting the error bit to obtain a data sequence g:
g=[10101010101010101010101010101010000111101001010100]
then the information sequence obtained after the error correction decoding is the original sequence v of the sending end, as follows:
v=[g 0 g 1 …g N-1 ]=[10101010101010101010101010101010]
it can be seen that through the check and error correction method of the sending end and the receiving end, the receiving end can directly obtain correct original data sent by the sending end, and only one communication is needed, and the sending end does not need to be informed to retransmit.
Example four
In another aspect, referring to fig. 7, the present invention provides an apparatus for error correction coding based on CRC, including:
the encoding device can implement the method of the first embodiment, and the communication data to be transmitted is encoded by using the CRC and the parity and transmitted to the device for error correction decoding based on the CRC for communication, and the specific implementation of the device for error correction decoding based on the CRC can refer to the fifth embodiment.
Preferably, the apparatus for error correction coding based on CRC includes: CRC encoding module, code grouping module, parity check encoding module and code merging module.
Specifically, the CRC coding module performs CRC coding on the original information sequence and converts the original information sequence into a first coded sequence.
The coding grouping module groups the first coding sequence to obtain one to more first groups with the length of Q, and when the length of the last first group is smaller than Q, zero padding is carried out at the tail to enable the length of the last first group to be equal to Q, wherein Q is a positive integer;
the parity check coding module carries out parity check coding on each first packet and converts the first packet into a second packet, wherein the length of the second packet is 1 bit more than that of the first packet;
the code combining module combines the second packets and converts the combined packets into a second code sequence, which is the code sequence that is ultimately sent into the communication channel.
For the related specific flows of the methods related to the modules, please refer to the previous method embodiments, which are not described herein again.
EXAMPLE five
In another aspect, referring to fig. 8, the present invention provides a CRC-based error correction decoding apparatus, which can implement the decoding method of the second embodiment to finally obtain accurate communication data.
Preferably, the apparatus for CRC-based error correction decoding includes: the device comprises a check pattern generation module, a decoding grouping module, a parity check decoding module, a decoding combination module, a CRC check decoding module, an error correction module and an extraction module.
Specifically, the check pattern generation module generates a check pattern in advance,
the decoding and grouping module groups the original bit sequence acquired by the receiving end, where the original bit sequence is the observation sequence of the second coding sequence in the fourth embodiment. Since the second encoded sequence is parity encoded and contains one or more second packets, at the receiving end, the decoding packet module also divides the original bit sequence into one or more third packets with the same length as the second packets.
And the parity check decoding module performs parity check on the third packets to obtain a check result of each third packet and a corresponding decoding sequence.
And the decoding and combining module combines the check result obtained after the third packet parity check and the decoding sequence respectively in sequence to obtain a first check result and a first decoding sequence. The first check result is used in a subsequent error correction module to calculate the group number of the erroneous packet, the first decoded sequence being input for a subsequent CRC check.
And the CRC check decoding module performs CRC check on the first decoding sequence to obtain a second check result. And judging a second check result: and if the second check result is zero, the transmission is free of errors, error correction processing is not needed, and the first decoding sequence is directly used for subsequent operation of extracting the original information sequence. And if the second check result is not zero and indicates that the transmission has errors, transmitting the second check result to an error correction module for subsequent error correction processing.
And the error correction module determines the serial number of the error packet according to the first check result, determines the error bit in the group of the error packet according to the check pattern F and the second check result, negates the error bit to obtain a corrected second decoding sequence, and uses the second decoding sequence for subsequent operation of extracting the original information sequence.
The extraction module carries out extraction operation on the input first decoding sequence or the second decoding sequence to obtain an original information sequence. The original information sequence is the original information sequence of the transmitting end.
For the related specific flows of the receiving methods related to the above modules, please refer to the foregoing receiving method embodiment, which is not described herein again.
EXAMPLE six
In another aspect, the present invention provides an error correction terminal, which includes the apparatus for error correction coding based on CRC in the fourth embodiment and/or the apparatus for error correction decoding based on CRC in the fifth embodiment, and two error correction terminals can communicate with each other by the method for error correction coding based on CRC in the first embodiment and the method for error correction decoding based on CRC in the second embodiment, so as to implement error control.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (10)

1. A method of CRC-based error correction coding, the method comprising the steps of:
s101: performing CRC coding on an original information sequence with the length of N to obtain a first coding sequence with the length of N + M, wherein M is the length of a check element sequence;
s102: grouping the first coding sequence to obtain one or more first groups with equal length;
s103: performing parity check coding on each first packet to obtain a second packet;
s104: and combining the second packets in sequence to obtain a second coded sequence, and sending the second coded sequence to a transmission channel.
2. The method of CRC-based error correction coding as claimed in claim 1, wherein the step S101 further comprises:
s1011: obtaining an original information sequence polynomial V (x) according to the original information sequence;
s1012: setting the length M of the check element sequence;
s1013: setting a generator polynomial g (x) according to the M, wherein the highest order of the generator polynomial g (x) is equal to M;
s1014: carrying out division calculation on the original information sequence polynomial V (x) and the generating polynomial g (x) to obtain a check element polynomial R (x);
s1015: performing addition calculation on the check element polynomial R (x) and the original information sequence polynomial V (x) to obtain a coding polynomial A (x);
s1016: obtaining a first coding sequence a with the length of N + M according to the coding polynomial A (x).
3. The CRC-based error correction coding method of claim 2, wherein the original information sequence polynomial v (x) is as follows:
Figure FDA0003673398100000011
where N is the length of the original information sequence, v i Is the coefficient of the ith bit in the polynomial v (x) of the original information sequence, corresponding to the coded value of the ith bit of the original information sequence.
4. The method of CRC-based error correction coding according to claim 3, wherein the check element polynomial R (x) is calculated by:
Figure FDA0003673398100000012
wherein the polynomial p (x) is a portion of the original information sequence polynomial v (x) divided by the generator polynomial g (x).
5. The method of CRC-based error correction coding according to claim 4, wherein the coding polynomial A (x) is calculated by:
Figure FDA0003673398100000013
wherein the coding polynomial A (x) is a polynomial which can be divided by the generator polynomial g (x), a i Is the coefficient of the ith bit in the coding polynomial a (x).
6. The method for error correction coding based on CRC according to claim 5, wherein the step S1016 comprises: will encode the coefficient a of the polynomial A (x) i Obtaining a first coding sequence a in sequence, wherein the first coding sequence a is the original information sequence [ v 0 v 1 ...v N-1 ]And check element sequence [ r ] 0 r 1 ...r M-1 ]As follows:
a=[v 0 v 1 ...v N-1 r 0 r 1 ...r M-1 ]=[a 0 a 1 ...a N+M-1 ],
wherein the check element sequence [ r ] 0 r 1 ...r M-1 ]The coefficients of the check element polynomial R (x) are arranged in sequence.
7. The method of CRC-based error correction coding according to claim 6, wherein the step S102 comprises:
the length of each first packet is Q, and the group number H of the first packets is:
Figure FDA0003673398100000021
when the last group is not enough to Q bit, zero filling is carried out, and the number of zero filling is as follows:
c(0)=H*Q-N-M。
8. the method of CRC-based error correction coding as claimed in claim 7, wherein the parity-check encoded generator matrix is:
Figure FDA0003673398100000022
where a is the identity matrix Q x Q and B is the full 1 column vector of length Q.
9. An apparatus for error correction coding based on CRC, comprising: the CRC encoding module, the encoding grouping module, the parity check encoding module and the encoding combination module;
the CRC coding module performs CRC coding on the original information sequence and converts the original information sequence into a first coding sequence;
the coding grouping module is used for grouping the first coding sequence to obtain one or more first groups with the length of Q, and when the length of the last first group is smaller than Q, zero filling is carried out at the tail to enable the length of the last first group to be equal to Q, wherein Q is a positive integer;
the parity encoding module carries out parity encoding on each first packet and converts the first packet into a second packet, wherein the length of the second packet is 1 bit more than that of the first packet;
and the code combining module combines the second packets and converts the second packets into a second code sequence, wherein the second code sequence is a code sequence finally sent into a communication channel.
10. A terminal, characterized in that it comprises means for CRC-based error correction coding as claimed in claim 9.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116346530A (en) * 2023-05-25 2023-06-27 合肥健天电子有限公司 Method for reducing transmission frame error omission rate based on Bosch CAN2.0 protocol

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040054960A1 (en) * 2002-07-03 2004-03-18 Mustafa Eroz Method and system for providing low density parity check (LDPC) encoding
CN101502002A (en) * 2006-08-25 2009-08-05 松下电器产业株式会社 Wireless communication device and error detection coding method
CN103312458A (en) * 2013-06-25 2013-09-18 合肥金星机电科技发展有限公司 Hybrid coding method
CN106788456A (en) * 2016-12-14 2017-05-31 电子科技大学 One kind polarization code coding/decoding method
CN107370488A (en) * 2016-05-13 2017-11-21 中兴通讯股份有限公司 Error correction/encoding method and device
CN110535560A (en) * 2019-08-05 2019-12-03 杭州电子科技大学 A kind of polarization code combines coding and interpretation method
CN111628780A (en) * 2020-05-07 2020-09-04 中国科学院微电子研究所 Data encoding method, data decoding method and data processing system
CN113067584A (en) * 2021-03-23 2021-07-02 重庆邮电大学 Coding method for common auxiliary polarization code of CRC (Cyclic redundancy check) code and PC (personal computer) code
US20210391945A1 (en) * 2018-10-10 2021-12-16 Nec Corporation Method and apparatus for construction of polar codes

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040054960A1 (en) * 2002-07-03 2004-03-18 Mustafa Eroz Method and system for providing low density parity check (LDPC) encoding
CN101502002A (en) * 2006-08-25 2009-08-05 松下电器产业株式会社 Wireless communication device and error detection coding method
CN103312458A (en) * 2013-06-25 2013-09-18 合肥金星机电科技发展有限公司 Hybrid coding method
CN107370488A (en) * 2016-05-13 2017-11-21 中兴通讯股份有限公司 Error correction/encoding method and device
CN106788456A (en) * 2016-12-14 2017-05-31 电子科技大学 One kind polarization code coding/decoding method
US20210391945A1 (en) * 2018-10-10 2021-12-16 Nec Corporation Method and apparatus for construction of polar codes
CN110535560A (en) * 2019-08-05 2019-12-03 杭州电子科技大学 A kind of polarization code combines coding and interpretation method
CN111628780A (en) * 2020-05-07 2020-09-04 中国科学院微电子研究所 Data encoding method, data decoding method and data processing system
CN113067584A (en) * 2021-03-23 2021-07-02 重庆邮电大学 Coding method for common auxiliary polarization code of CRC (Cyclic redundancy check) code and PC (personal computer) code

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116346530A (en) * 2023-05-25 2023-06-27 合肥健天电子有限公司 Method for reducing transmission frame error omission rate based on Bosch CAN2.0 protocol
CN116346530B (en) * 2023-05-25 2023-08-18 合肥健天电子有限公司 Method for reducing transmission frame error omission rate based on Bosch CAN2.0 protocol

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